arch/arm64/kvm/hyp/include/nvhe/trap_handler.h

17

type name = (type)cpu_reg(ctxt, (reg))

arch/arm64/kvm/hyp/nvhe/ffa.c

100

cpu_reg(ctxt, 0) = res->a0;

arch/arm64/kvm/hyp/nvhe/ffa.c

101

cpu_reg(ctxt, 1) = res->a1;

arch/arm64/kvm/hyp/nvhe/ffa.c

102

cpu_reg(ctxt, 2) = res->a2;

arch/arm64/kvm/hyp/nvhe/ffa.c

103

cpu_reg(ctxt, 3) = res->a3;

arch/arm64/kvm/hyp/nvhe/ffa.c

104

cpu_reg(ctxt, 4) = res->a4;

arch/arm64/kvm/hyp/nvhe/ffa.c

105

cpu_reg(ctxt, 5) = res->a5;

arch/arm64/kvm/hyp/nvhe/ffa.c

106

cpu_reg(ctxt, 6) = res->a6;

arch/arm64/kvm/hyp/nvhe/ffa.c

107

cpu_reg(ctxt, 7) = res->a7;

arch/arm64/kvm/hyp/nvhe/ffa.c

126

cpu_reg(ctxt, 8) = res->a8;

arch/arm64/kvm/hyp/nvhe/ffa.c

127

cpu_reg(ctxt, 9) = res->a9;

arch/arm64/kvm/hyp/nvhe/ffa.c

128

cpu_reg(ctxt, 10) = res->a10;

arch/arm64/kvm/hyp/nvhe/ffa.c

129

cpu_reg(ctxt, 11) = res->a11;

arch/arm64/kvm/hyp/nvhe/ffa.c

130

cpu_reg(ctxt, 12) = res->a12;

arch/arm64/kvm/hyp/nvhe/ffa.c

131

cpu_reg(ctxt, 13) = res->a13;

arch/arm64/kvm/hyp/nvhe/ffa.c

132

cpu_reg(ctxt, 14) = res->a14;

arch/arm64/kvm/hyp/nvhe/ffa.c

133

cpu_reg(ctxt, 15) = res->a15;

arch/arm64/kvm/hyp/nvhe/ffa.c

134

cpu_reg(ctxt, 16) = res->a16;

arch/arm64/kvm/hyp/nvhe/ffa.c

135

cpu_reg(ctxt, 17) = res->a17;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

239

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

273

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

294

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

313

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

334

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

356

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

374

cpu_reg(host_ctxt, 1) = ret;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

449

__kvm_timer_set_cntvoff(cpu_reg(host_ctxt, 1));

arch/arm64/kvm/hyp/nvhe/hyp-main.c

463

cpu_reg(host_ctxt, 1) = __vgic_v3_get_gic_config();

arch/arm64/kvm/hyp/nvhe/hyp-main.c

498

cpu_reg(host_ctxt, 1) = __pkvm_init(phys, size, nr_cpus, per_cpu_base,

arch/arm64/kvm/hyp/nvhe/hyp-main.c

506

cpu_reg(host_ctxt, 1) = pkvm_cpu_set_vector(slot);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

513

cpu_reg(host_ctxt, 1) = __pkvm_host_share_hyp(pfn);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

520

cpu_reg(host_ctxt, 1) = __pkvm_host_unshare_hyp(pfn);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

545

cpu_reg(host_ctxt, 1) = haddr;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

550

cpu_reg(host_ctxt, 1) = __pkvm_prot_finalize();

arch/arm64/kvm/hyp/nvhe/hyp-main.c

555

cpu_reg(host_ctxt, 1) = __pkvm_reserve_vm();

arch/arm64/kvm/hyp/nvhe/hyp-main.c

572

cpu_reg(host_ctxt, 1) = __pkvm_init_vm(host_kvm, vm_hva, pgd_hva);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

582

cpu_reg(host_ctxt, 1) = __pkvm_init_vcpu(handle, host_vcpu, vcpu_hva);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

589

cpu_reg(host_ctxt, 1) = __pkvm_teardown_vm(handle);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

663

cpu_reg(host_ctxt, 0) = SMCCC_RET_SUCCESS;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

668

cpu_reg(host_ctxt, 0) = SMCCC_RET_NOT_SUPPORTED;

arch/arm64/kvm/hyp/nvhe/psci-relay.c

215

cpu_reg(host_ctxt, 0) = boot_args->r0;

arch/arm64/kvm/hyp/nvhe/psci-relay.c

303

cpu_reg(host_ctxt, 0) = ret;

arch/arm64/kvm/hyp/nvhe/psci-relay.c

304

cpu_reg(host_ctxt, 1) = 0;

arch/arm64/kvm/hyp/nvhe/psci-relay.c

305

cpu_reg(host_ctxt, 2) = 0;

arch/arm64/kvm/hyp/nvhe/psci-relay.c

306

cpu_reg(host_ctxt, 3) = 0;

arch/arm64/kvm/hyp/nvhe/psci-relay.c

74

return psci_call(cpu_reg(host_ctxt, 0), cpu_reg(host_ctxt, 1),

arch/arm64/kvm/hyp/nvhe/psci-relay.c

75

cpu_reg(host_ctxt, 2), cpu_reg(host_ctxt, 3));

arch/arm64/kvm/hyp/nvhe/setup.c

339

cpu_reg(host_ctxt, 1) = ret;

drivers/cpufreq/mediatek-cpufreq-hw.c

375

struct regulator *cpu_reg;

drivers/cpufreq/mediatek-cpufreq-hw.c

384

cpu_reg = devm_regulator_get(cpu_dev, "cpu");

drivers/cpufreq/mediatek-cpufreq-hw.c

385

if (IS_ERR(cpu_reg))

drivers/cpufreq/mediatek-cpufreq-hw.c

386

return dev_err_probe(&pdev->dev, PTR_ERR(cpu_reg),

drivers/net/ethernet/broadcom/bnx2.c

3832

load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg,

drivers/net/ethernet/broadcom/bnx2.c

3841

val = bnx2_reg_rd_ind(bp, cpu_reg->mode);

drivers/net/ethernet/broadcom/bnx2.c

3842

val |= cpu_reg->mode_value_halt;

drivers/net/ethernet/broadcom/bnx2.c

3843

bnx2_reg_wr_ind(bp, cpu_reg->mode, val);

drivers/net/ethernet/broadcom/bnx2.c

3844

bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear);

drivers/net/ethernet/broadcom/bnx2.c

3852

offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base);

drivers/net/ethernet/broadcom/bnx2.c

3866

offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base);

drivers/net/ethernet/broadcom/bnx2.c

3880

offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base);

drivers/net/ethernet/broadcom/bnx2.c

3889

bnx2_reg_wr_ind(bp, cpu_reg->inst, 0);

drivers/net/ethernet/broadcom/bnx2.c

3892

bnx2_reg_wr_ind(bp, cpu_reg->pc, val);

drivers/net/ethernet/broadcom/bnx2.c

3895

val = bnx2_reg_rd_ind(bp, cpu_reg->mode);

drivers/net/ethernet/broadcom/bnx2.c

3896

val &= ~cpu_reg->mode_value_halt;

drivers/net/ethernet/broadcom/bnx2.c

3897

bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear);

drivers/net/ethernet/broadcom/bnx2.c

3898

bnx2_reg_wr_ind(bp, cpu_reg->mode, val);

drivers/net/ethernet/broadcom/bnx2_fw.h

12

static const struct cpu_reg cpu_reg_com = {

drivers/net/ethernet/broadcom/bnx2_fw.h

28

static const struct cpu_reg cpu_reg_cp = {

drivers/net/ethernet/broadcom/bnx2_fw.h

44

static const struct cpu_reg cpu_reg_rxp = {

drivers/net/ethernet/broadcom/bnx2_fw.h

60

static const struct cpu_reg cpu_reg_tpat = {

drivers/net/ethernet/broadcom/bnx2_fw.h

76

static const struct cpu_reg cpu_reg_txp = {