drivers/ata/acard-ahci.c

184

static unsigned int acard_ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)

drivers/ata/acard-ahci.c

187

struct acard_sg *acard_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;

drivers/ata/acard-ahci.c

218

void *cmd_tbl;

drivers/ata/acard-ahci.c

226

cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;

drivers/ata/acard-ahci.c

228

ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);

drivers/ata/acard-ahci.c

230

memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);

drivers/ata/acard-ahci.c

231

memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);

drivers/ata/acard-ahci.c

235

acard_ahci_fill_sg(qc, cmd_tbl);

drivers/ata/acard-ahci.c

338

pp->cmd_tbl = mem;

drivers/ata/ahci.h

311

void *cmd_tbl;

drivers/ata/libahci.c

1415

u8 *fis = pp->cmd_tbl;

drivers/ata/libahci.c

1652

static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)

drivers/ata/libahci.c

1655

struct ahci_sg *ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;

drivers/ata/libahci.c

1689

void *cmd_tbl;

drivers/ata/libahci.c

1698

cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;

drivers/ata/libahci.c

1700

ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);

drivers/ata/libahci.c

1702

memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);

drivers/ata/libahci.c

1703

memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);

drivers/ata/libahci.c

1708

n_elem = ahci_fill_sg(qc, cmd_tbl);

drivers/ata/libahci.c

2552

pp->cmd_tbl = mem;

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

739

if (!bp->cmd_tbl.transmitter_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

742

return bp->cmd_tbl.transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

751

if (!bp->cmd_tbl.select_crtc_source)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

754

return bp->cmd_tbl.select_crtc_source(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

764

if (!bp->cmd_tbl.dac1_encoder_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

767

return bp->cmd_tbl.dac1_encoder_control(

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

771

if (!bp->cmd_tbl.dac2_encoder_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

774

return bp->cmd_tbl.dac2_encoder_control(

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

779

if (!bp->cmd_tbl.dig_encoder_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

782

return bp->cmd_tbl.dig_encoder_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

791

if (!bp->cmd_tbl.external_encoder_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

794

return bp->cmd_tbl.external_encoder_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

826

if (!bp->cmd_tbl.dac_load_detection)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

830

bp_result = bp->cmd_tbl.dac_load_detection(bp, &bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

832

if (!bp->cmd_tbl.external_encoder_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

837

bp_result = bp->cmd_tbl.external_encoder_control(bp, &ext_cntl);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

857

if (!bp->cmd_tbl.adjust_display_pll)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

860

return bp->cmd_tbl.adjust_display_pll(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

869

if (!bp->cmd_tbl.set_pixel_clock)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

872

return bp->cmd_tbl.set_pixel_clock(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

881

if (!bp->cmd_tbl.set_dce_clock)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

884

return bp->cmd_tbl.set_dce_clock(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

894

if (!bp->cmd_tbl.enable_spread_spectrum_on_ppll)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

897

return bp->cmd_tbl.enable_spread_spectrum_on_ppll(

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

908

if (!bp->cmd_tbl.set_crtc_timing)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

911

return bp->cmd_tbl.set_crtc_timing(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

920

if (!bp->cmd_tbl.program_clock)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

923

return bp->cmd_tbl.program_clock(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

935

if (!bp->cmd_tbl.enable_crtc)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

938

return bp->cmd_tbl.enable_crtc(bp, id, enable);

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

948

if (!bp->cmd_tbl.enable_disp_power_gating)

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

951

return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1703

if (!bp->cmd_tbl.transmitter_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1706

return bp->cmd_tbl.transmitter_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1715

if (!bp->cmd_tbl.dig_encoder_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1718

return bp->cmd_tbl.dig_encoder_control(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1727

if (!bp->cmd_tbl.set_pixel_clock)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1730

return bp->cmd_tbl.set_pixel_clock(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1739

if (!bp->cmd_tbl.set_dce_clock)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1742

return bp->cmd_tbl.set_dce_clock(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1751

if (!bp->cmd_tbl.set_crtc_timing)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1754

return bp->cmd_tbl.set_crtc_timing(bp, bp_params);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1764

if (!bp->cmd_tbl.enable_crtc)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1767

return bp->cmd_tbl.enable_crtc(bp, id, enable);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1777

if (!bp->cmd_tbl.enable_disp_power_gating)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1780

return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1792

if (!bp->cmd_tbl.enable_lvtma_control)

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1795

return bp->cmd_tbl.enable_lvtma_control(bp, uc_pwr_on, pwrseq_instance, bypass_panel_control_wait);

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1901

if (bp->cmd_tbl.get_smu_clock_info != NULL) {

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1904

bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1988

if (bp->cmd_tbl.get_smu_clock_info != NULL) {

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1991

bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

1994

bp->cmd_tbl.get_smu_clock_info(bp, SMU11_SYSPLL3_0_ID) * 10;

drivers/gpu/drm/amd/display/dc/bios/bios_parser_types_internal.h

63

struct cmd_tbl cmd_tbl;

drivers/gpu/drm/amd/display/dc/bios/bios_parser_types_internal2.h

66

struct cmd_tbl cmd_tbl;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1278

bp->cmd_tbl.enable_spread_spectrum_on_ppll =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1282

bp->cmd_tbl.enable_spread_spectrum_on_ppll =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1286

bp->cmd_tbl.enable_spread_spectrum_on_ppll =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

129

bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v3;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1292

bp->cmd_tbl.enable_spread_spectrum_on_ppll = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

132

bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v4;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

136

bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v5;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1481

bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v2;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1484

bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v3;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1489

bp->cmd_tbl.adjust_display_pll = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

157

struct cmd_tbl *cmd_tbl = &bp->cmd_tbl;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

160

cmd_tbl->encoder_control_dig1 = encoder_control_dig1_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1612

bp->cmd_tbl.select_crtc_source = select_crtc_source_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1615

bp->cmd_tbl.select_crtc_source = select_crtc_source_v2;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1618

bp->cmd_tbl.select_crtc_source = select_crtc_source_v3;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

162

cmd_tbl->encoder_control_dig1 = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1621

bp->cmd_tbl.select_crtc_source = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

165

cmd_tbl->encoder_control_dig2 = encoder_control_dig2_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

167

cmd_tbl->encoder_control_dig2 = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

169

cmd_tbl->dig_encoder_control = encoder_control_dig_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

177

struct cmd_tbl *cmd_tbl = &bp->cmd_tbl;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1805

bp->cmd_tbl.dac1_encoder_control = dac1_encoder_control_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1808

bp->cmd_tbl.dac1_encoder_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1813

bp->cmd_tbl.dac2_encoder_control = dac2_encoder_control_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1816

bp->cmd_tbl.dac2_encoder_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

182

if (cmd_tbl->encoder_control_dig1 != NULL)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

184

cmd_tbl->encoder_control_dig1(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

187

if (cmd_tbl->encoder_control_dig2 != NULL)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

189

cmd_tbl->encoder_control_dig2(bp, cntl);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1904

bp->cmd_tbl.dac_load_detection = dac_load_detection_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1908

bp->cmd_tbl.dac_load_detection = dac_load_detection_v3;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1991

bp->cmd_tbl.dac1_output_control = dac1_output_control_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1994

bp->cmd_tbl.dac1_output_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1999

bp->cmd_tbl.dac2_output_control = dac2_output_control_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2002

bp->cmd_tbl.dac2_output_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2063

bp->cmd_tbl.set_crtc_timing =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2069

bp->cmd_tbl.set_crtc_timing = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2075

bp->cmd_tbl.set_crtc_timing = set_crtc_timing_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2080

bp->cmd_tbl.set_crtc_timing = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2256

bp->cmd_tbl.enable_crtc = enable_crtc_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2261

bp->cmd_tbl.enable_crtc = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2308

bp->cmd_tbl.enable_crtc_mem_req = enable_crtc_mem_req_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2311

bp->cmd_tbl.enable_crtc_mem_req = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2361

bp->cmd_tbl.program_clock = program_clock_v5;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2364

bp->cmd_tbl.program_clock = program_clock_v6;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2369

bp->cmd_tbl.program_clock = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2461

bp->cmd_tbl.external_encoder_control =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2465

bp->cmd_tbl.external_encoder_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2588

bp->cmd_tbl.enable_disp_power_gating =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2594

bp->cmd_tbl.enable_disp_power_gating = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2638

bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2643

bp->cmd_tbl.set_dce_clock = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

387

bp->cmd_tbl.transmitter_control = transmitter_control_v2;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

390

bp->cmd_tbl.transmitter_control = transmitter_control_v3;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

393

bp->cmd_tbl.transmitter_control = transmitter_control_v4;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

396

bp->cmd_tbl.transmitter_control = transmitter_control_v1_5;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

399

bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

403

bp->cmd_tbl.transmitter_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

933

bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v3;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

936

bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v5;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

939

bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v6;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

942

bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

947

bp->cmd_tbl.set_pixel_clock = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

101

bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

1032

bp->cmd_tbl.enable_lvtma_control = enable_lvtma_control;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

104

bp->cmd_tbl.dig_encoder_control = encoder_control_fallback;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

235

bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

238

bp->cmd_tbl.transmitter_control = transmitter_control_v1_7;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

241

bp->cmd_tbl.transmitter_control = transmitter_control_fallback;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

459

bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

462

bp->cmd_tbl.set_pixel_clock = set_pixel_clock_fallback;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

602

bp->cmd_tbl.set_crtc_timing =

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

606

bp->cmd_tbl.set_crtc_timing = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

719

bp->cmd_tbl.enable_crtc = enable_crtc_v1;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

722

bp->cmd_tbl.enable_crtc = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

779

bp->cmd_tbl.external_encoder_control =

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

783

bp->cmd_tbl.external_encoder_control = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

821

bp->cmd_tbl.enable_disp_power_gating =

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

827

bp->cmd_tbl.enable_disp_power_gating = enable_disp_power_gating_fallback;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

912

bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

915

bp->cmd_tbl.set_dce_clock = NULL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

993

bp->cmd_tbl.get_smu_clock_info = get_smu_clock_info_v3_1;

drivers/scsi/mvsas/mv_sas.c

339

hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));

drivers/scsi/mvsas/mv_sas.c

479

hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);

drivers/scsi/mvsas/mv_sas.c

592

hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);

drivers/scsi/mvsas/mv_sas.h

188

__le64 cmd_tbl; /* command table address */