drivers/crypto/caam/ctrl.c

1040

clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK,

drivers/crypto/caam/ctrl.c

1068

clrsetbits_32(&ctrl->jrstart, 0, JRSTART_JR0_START |

drivers/crypto/caam/ctrl.c

121

clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);

drivers/crypto/caam/ctrl.c

130

clrsetbits_32(&ctrl->deco_rq, 0, DECORR_RQD0ENABLE);

drivers/crypto/caam/ctrl.c

138

clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0);

drivers/crypto/caam/ctrl.c

154

clrsetbits_32(&deco->jr_ctl_hi, 0, flags);

drivers/crypto/caam/ctrl.c

182

clrsetbits_32(&ctrl->deco_rsr, DECORSR_JR0, 0);

drivers/crypto/caam/ctrl.c

185

clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0);

drivers/crypto/caam/ctrl.c

374

clrsetbits_32(&r4tst->rtmctl, 0, RTMCTL_PRGM | RTMCTL_ACC);

drivers/crypto/caam/ctrl.c

416

clrsetbits_32(&r4tst->rtmctl, RTMCTL_PRGM | RTMCTL_ACC,

drivers/crypto/caam/ctrl.c

501

clrsetbits_32(mcr, MCFGR_AXIPIPE_MASK,

drivers/crypto/caam/ctrl.c

749

clrsetbits_32(&ctrl->scfgr, 0, SCFGR_RDBENABLE);

drivers/crypto/caam/ctrl.c

825

clrsetbits_32(&ctrl->jrstart, 0, JRSTART_JR0_START |

drivers/crypto/caam/jr.c

133

clrsetbits_32(&jrp->rregs->jrintstatus, 0, JRINT_ERR_HALT_COMPLETE);

drivers/crypto/caam/jr.c

147

clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);

drivers/crypto/caam/jr.c

163

clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);

drivers/crypto/caam/jr.c

246

clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);

drivers/crypto/caam/jr.c

339

clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);

drivers/crypto/caam/jr.c

508

clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |

drivers/crypto/caam/jr.c

715

clrsetbits_32(&jrpriv->rregs->rconfig_lo, 0, JRCFG_IMSK);

drivers/crypto/caam/jr.c

764

clrsetbits_32(&jrpriv->rregs->rconfig_lo,

drivers/crypto/caam/jr.c

91

clrsetbits_32(&jrp->rregs->jrintstatus, JRINT_ERR_HALT_MASK, 0);