arch/sh/boards/mach-ap325rxa/setup.c

219

.clock_source = LCDC_CLK_EXTERNAL,

arch/sh/boards/mach-ecovec24/setup.c

1218

lcdc_info.clock_source = LCDC_CLK_EXTERNAL;

arch/sh/boards/mach-ecovec24/setup.c

1230

lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;

arch/sh/boards/mach-kfr2r09/setup.c

158

.clock_source = LCDC_CLK_BUS,

arch/sh/boards/mach-migor/setup.c

246

.clock_source = LCDC_CLK_BUS,

arch/sh/boards/mach-migor/setup.c

260

.clock_source = LCDC_CLK_PERIPHERAL,

arch/sh/boards/mach-se/7724/setup.c

191

.clock_source = LCDC_CLK_EXTERNAL,

drivers/comedi/drivers/ni_mio_common.c

5008

devpriv->clock_source = source;

drivers/comedi/drivers/ni_mio_common.c

5042

devpriv->clock_source = source;

drivers/comedi/drivers/ni_mio_common.c

5060

devpriv->clock_source = source;

drivers/comedi/drivers/ni_mio_common.c

5238

data[1] = devpriv->clock_source;

drivers/comedi/drivers/ni_stc.h

1029

unsigned int clock_source;

drivers/comedi/drivers/ni_tio.c

310

unsigned int clock_source = 0;

drivers/comedi/drivers/ni_tio.c

319

clock_source = NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

322

clock_source = NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

326

clock_source =

drivers/comedi/drivers/ni_tio.c

329

clock_source = NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

332

clock_source = NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

336

clock_source = NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

338

clock_source = NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

341

clock_source = NI_GPCT_PXI10_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

344

clock_source = NI_GPCT_NEXT_TC_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

349

clock_source = NI_GPCT_RTSI_CLOCK_SRC_BITS(i);

drivers/comedi/drivers/ni_tio.c

357

clock_source = NI_GPCT_PFI_CLOCK_SRC_BITS(i);

drivers/comedi/drivers/ni_tio.c

365

clock_source |= ni_tio_clock_src_modifiers(counter);

drivers/comedi/drivers/ni_tio.c

366

*clk_src = clock_source;

drivers/comedi/drivers/ni_tio.c

373

unsigned int clock_source = 0;

drivers/comedi/drivers/ni_tio.c

383

clock_source = NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

386

clock_source = NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

389

clock_source = NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

392

clock_source = NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

395

clock_source = NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

398

clock_source = NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

401

clock_source = NI_GPCT_NEXT_TC_CLOCK_SRC_BITS;

drivers/comedi/drivers/ni_tio.c

406

clock_source = NI_GPCT_RTSI_CLOCK_SRC_BITS(i);

drivers/comedi/drivers/ni_tio.c

414

clock_source =

drivers/comedi/drivers/ni_tio.c

423

clock_source |= ni_tio_clock_src_modifiers(counter);

drivers/comedi/drivers/ni_tio.c

424

*clk_src = clock_source;

drivers/comedi/drivers/ni_tio.c

615

static int ni_660x_clk_src(unsigned int clock_source, unsigned int *bits)

drivers/comedi/drivers/ni_tio.c

617

unsigned int clk_src = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;

drivers/comedi/drivers/ni_tio.c

666

static int ni_m_clk_src(unsigned int clock_source, unsigned int *bits)

drivers/comedi/drivers/ni_tio.c

668

unsigned int clk_src = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;

drivers/comedi/drivers/ni_tio.c

724

unsigned int clock_source)

drivers/comedi/drivers/ni_tio.c

733

switch (clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK) {

drivers/comedi/drivers/ni_tio.c

753

unsigned int clock_source,

drivers/comedi/drivers/ni_tio.c

763

ret = ni_660x_clk_src(clock_source, &bits);

drivers/comedi/drivers/ni_tio.c

768

ret = ni_m_clk_src(clock_source, &bits);

drivers/comedi/drivers/ni_tio.c

775

clock_source);

drivers/comedi/drivers/ni_tio.c

779

if (clock_source & NI_GPCT_INVERT_CLOCK_SRC_BIT)

drivers/comedi/drivers/ni_tio.c

783

ni_tio_set_source_subselect(counter, clock_source);

drivers/comedi/drivers/ni_tio.c

787

switch (clock_source & NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK) {

drivers/comedi/drivers/ni_tio.c

809

unsigned int *clock_source,

drivers/comedi/drivers/ni_tio.c

815

ret = ni_tio_generic_clock_src_select(counter, clock_source);

drivers/comedi/drivers/ni_tio.c

818

ret = ni_tio_clock_period_ps(counter, *clock_source, &temp64);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

781

uint32_t clock_source;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

784

REG_GET(CLK1_CLK2_BYPASS_CNTL, CLK2_BYPASS_SEL, &clock_source);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

787

if (dcn314_is_spll_ssc_enabled(&clk_mgr->base) && (clock_source < ARRAY_SIZE(ss_info_table.ss_percentage))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

788

clk_mgr->dprefclk_ss_percentage = ss_info_table.ss_percentage[clock_source];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

868

uint32_t clock_source = 0;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

870

clock_source = REG_READ(CLK1_CLK2_BYPASS_CNTL) & CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

873

if (dcn35_is_spll_ssc_enabled(&clk_mgr->base) && (clock_source < ARRAY_SIZE(ss_info_table.ss_percentage))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

874

clk_mgr->dprefclk_ss_percentage = ss_info_table.ss_percentage[clock_source];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

540

ASSERT(otg_master->clock_source);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

541

ASSERT(otg_master->clock_source->funcs->program_pix_clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

550

otg_master->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

551

otg_master->clock_source,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

627

uint32_t clock_source;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

629

clock_source = (REG_READ(CLK8_CLK2_BYPASS_CNTL) & CLK8_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

631

if (dcn42_is_spll_ssc_enabled(&clk_mgr->base) && (clock_source < ARRAY_SIZE(dcn42_ss_info_table.ss_percentage))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

632

clk_mgr->dprefclk_ss_percentage = dcn42_ss_info_table.ss_percentage[clock_source];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

335

uint32_t clock_source;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

337

clock_source = (REG_READ(CLK5_CLK2_BYPASS_CNTL) & CLK5_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

339

if (dcn42_is_spll_ssc_enabled(&clk_mgr->base) && (clock_source < ARRAY_SIZE(dcn42_ss_info_table.ss_percentage))) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

340

clk_mgr->dprefclk_ss_percentage = dcn42_ss_info_table.ss_percentage[clock_source];

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3188

otg_master->clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4748

pipe_ctx->clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4750

pipe_ctx->clock_source = dc->res_pool->dp_clock_source;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

4754

pipe_ctx->clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5161

struct clock_source *dc_resource_find_first_free_pll(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5241

pipe_ctx->clock_source = pool->dp_clock_source;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5243

pipe_ctx->clock_source = NULL;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5246

pipe_ctx->clock_source = resource_find_used_clk_src_for_sharing(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5250

if (pipe_ctx->clock_source == NULL)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5251

pipe_ctx->clock_source =

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5257

if (pipe_ctx->clock_source == NULL)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5262

pipe_ctx->clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5288

if (pipe_ctx_old->clock_source != pipe_ctx->clock_source

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

578

struct clock_source *clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

584

if (pool->clock_sources[i] == clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

593

struct clock_source *clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

595

int i = find_matching_clock_source(pool, clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

600

if (pool->dp_clock_source == clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

607

struct clock_source *clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

609

int i = find_matching_clock_source(pool, clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

614

if (pool->dp_clock_source == clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

621

struct clock_source *clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

623

int i = find_matching_clock_source(pool, clock_source);

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

628

if (pool->dp_clock_source == clock_source)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

738

if (pipe_with_clk_src->clock_source == NULL)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

765

struct clock_source *resource_find_used_clk_src_for_sharing(

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

773

return res_ctx->pipe_ctx[i].clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1020

bp_pc_params.pll_id = clock_source->id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1047

if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1060

if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1071

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1077

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1094

dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(clock_source->ctx->dc->clk_mgr);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1097

dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1114

clock_source->ctx->dc->res_pool->dccg->funcs->set_dp_dto(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1115

clock_source->ctx->dc->res_pool->dccg,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1117

if (clock_source->ctx->dc->caps.is_apu &&

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1121

clock_source->ctx->dc->res_pool->dccg->funcs->set_hdmistreamclk(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1122

clock_source->ctx->dc->res_pool->dccg,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1131

clock_source->ctx->dc->res_pool->dccg->funcs->set_dp_dto(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1132

clock_source->ctx->dc->res_pool->dccg,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1137

bp_pc_params.pll_id = clock_source->id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1164

if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1177

if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1188

struct clock_source *clk_src)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1211

const struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1215

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1218

unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1221

if (clock_source->id == CLOCK_SOURCE_ID_DP_DTO) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1224

if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization &&

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1225

clock_source->ctx->dc->config.vblank_alignment_max_frame_time_diff > 0) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1249

static bool dcn401_get_dp_dto_frequency_100hz(const struct clock_source *clock_source, unsigned int inst,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1252

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1258

if (clock_source->id == CLOCK_SOURCE_ID_DP_DTO) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1353

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1358

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1361

dce112_program_pix_clk(clock_source, pix_clk_params, encoding, pll_settings);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1363

if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization &&

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1364

clock_source->ctx->dc->config.vblank_alignment_max_frame_time_diff > 0) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1370

clock_source->ctx->dc->clk_mgr->dprefclk_khz*1000);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1376

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1381

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1399

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1404

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1406

unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1431

dce112_program_pix_clk(clock_source, pix_clk_params, encoding, pll_settings);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1437

struct clock_source *cs,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

566

struct clock_source *cs,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

598

struct clock_source *cs,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

840

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

846

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

853

if (clock_source->id != CLOCK_SOURCE_ID_EXTERNAL &&

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

855

clock_source->ctx->dce_version <= DCE_VERSION_11_0)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

860

bp_pc_params.pll_id = clock_source->id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

896

if (clock_source->id != CLOCK_SOURCE_ID_EXTERNAL

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

915

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

921

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

928

if (clock_source->id != CLOCK_SOURCE_ID_EXTERNAL &&

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

930

clock_source->ctx->dce_version <= DCE_VERSION_11_0)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

935

bp_pc_params.pll_id = clock_source->id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

940

if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

953

if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

963

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

968

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

970

unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

977

if (clock_source->ctx->dc->clk_mgr->dp_dto_source_clock_in_khz != 0 &&

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

980

dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dp_dto_source_clock_in_khz;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

258

struct clock_source base;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1171

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1185

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1209

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1221

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1258

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1275

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1297

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1314

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1337

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1354

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1376

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1393

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

247

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

256

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

262

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

267

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c

256

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c

266

dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c

282

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c

287

dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.h

88

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

1001

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

1023

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

1040

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

930

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

944

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

967

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

975

enc, clock_source, color_depth, signal, pixel_clock);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

984

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

590

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

597

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

606

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

612

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c

248

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c

255

dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.h

351

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

570

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

578

dcn20_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

617

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

625

dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.h

262

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.h

270

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

156

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

159

dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.h

46

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

326

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

331

dcn31_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

334

dcn20_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

341

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

346

dcn31_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

349

dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.h

153

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.h

161

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c

126

enum clock_source_id clock_source)

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c

129

dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.h

122

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

52

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

57

(void)clock_source;

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

66

enum clock_source_id clock_source) {

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

69

(void)clock_source;

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

75

enum clock_source_id clock_source) {

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

78

(void)clock_source;

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c

132

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c

144

cntl.pll_id = clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

176

struct clock_source *clk_src,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

1288

struct clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

1310

struct clock_source *clk_src,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1655

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1656

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2467

struct clock_source *old_clk = pipe_ctx_old->clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2681

if (pipe_ctx_old->clock_source != pipe_ctx->clock_source)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2683

pipe_ctx->clock_source, i);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3462

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3468

clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3476

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3483

clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3503

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3510

struct clock_source *dp_cs =

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3532

if (pipes[i].clock_source != NULL &&

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3533

pipes[i].clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3534

pipes[i].clock_source = dp_cs;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3537

pipes[i].clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3538

pipes[i].clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3561

clock_source, link_settings);

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

104

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

111

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h

99

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1247

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1248

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2013

struct clock_source *old_clk = pipe_ctx_old->clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2938

struct clock_source *old_clk = pipe_ctx_old->clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

874

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

875

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

648

struct clock_source *old_clk = pipe_ctx_old->clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

493

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

494

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1407

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1408

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1583

struct clock_source *old_clk = pipe_ctx_old->clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1795

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1796

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1082

pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1083

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2172

struct clock_source *old_clk = pipe_ctx_old->clock_source;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

860

if (false == pipe_ctx->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

861

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1410

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1415

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1420

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

163

struct clock_source *);

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

165

struct clock_source *,

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

170

struct clock_source *,

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

174

const struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

178

struct clock_source *clock_source,

drivers/gpu/drm/amd/display/dc/inc/clock_source.h

33

struct clock_source;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

315

struct clock_source *dp_clock_source;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

317

struct clock_source *clock_sources[MAX_CLOCK_SOURCES];

drivers/gpu/drm/amd/display/dc/inc/core_types.h

470

struct clock_source *clock_source;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

141

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

147

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

150

enum clock_source_id clock_source);

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

152

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

355

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/inc/link_hwss.h

57

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/inc/resource.h

137

struct clock_source *clock_source);

drivers/gpu/drm/amd/display/dc/inc/resource.h

142

struct clock_source *clock_source);

drivers/gpu/drm/amd/display/dc/inc/resource.h

147

struct clock_source *clock_source);

drivers/gpu/drm/amd/display/dc/inc/resource.h

157

struct clock_source *resource_find_used_clk_src_for_sharing(

drivers/gpu/drm/amd/display/dc/inc/resource.h

161

struct clock_source *dc_resource_find_first_free_pll(

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

109

pipes[i]->clock_source->funcs->program_pix_clk(

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

110

pipes[i]->clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

160

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

176

clock_source);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

181

clock_source);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h

43

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c

165

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c

171

enable_dio_dp_link_output(link, link_res, signal, clock_source, link_settings);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

117

enable_dio_dp_link_output(link, link_res, signal, clock_source, link_settings);

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c

93

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

110

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c

114

(void)clock_source;

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.h

45

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

199

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

205

enable_hpo_dp_link_output(link, link_res, signal, clock_source, link_settings);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

1919

pipe_ctx->clock_source->id,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2174

pipe_ctx->clock_source->id,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2225

pipe_ctx->clock_source->id,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

285

struct clock_source *dp_cs = link->dc->res_pool->dp_clock_source;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

62

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

67

clock_source, link_settings);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.h

34

enum clock_source_id clock_source,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1665

pipe_ctx->clock_source->id,

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

752

static struct clock_source *dce100_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

776

static void dce100_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

776

static struct clock_source *dce110_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

800

static void dce110_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

927

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

928

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

752

static struct clock_source *dce112_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

776

static void dce112_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

851

static struct clock_source *find_matching_pll(

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

981

pipe_ctx->clock_source =

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

984

pipe_ctx->clock_source =

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

988

pipe_ctx->clock_source = find_matching_pll(

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

993

if (pipe_ctx->clock_source == NULL)

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

999

pipe_ctx->clock_source);

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

537

static struct clock_source *dce120_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

560

static void dce120_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

780

static struct clock_source *dce60_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

804

static void dce60_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

787

static struct clock_source *dce80_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

811

static void dce80_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1069

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1070

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

807

static struct clock_source *dcn10_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

913

static void dcn10_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1083

void dcn20_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1321

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1322

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

987

static struct clock_source *dcn20_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

99

void dcn20_clock_source_destroy(struct clock_source **clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

845

static struct clock_source *dcn201_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

933

static void dcn201_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

988

static struct clock_source *dcn21_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1452

static struct clock_source *dcn30_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1285

static struct clock_source *dcn301_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

561

static struct clock_source *dcn302_clock_source_create(struct dc_context *ctx, struct dc_bios *bios,

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

545

static struct clock_source *dcn303_clock_source_create(struct dc_context *ctx, struct dc_bios *bios,

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1743

static struct clock_source *dcn31_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2020

static struct clock_source *dcn30_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1802

static struct clock_source *dcn31_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1948

static struct clock_source *dcn30_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1745

static struct clock_source *dcn31_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1735

static struct clock_source *dcn31_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

868

static struct clock_source *dcn32_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

856

static struct clock_source *dcn321_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1854

static struct clock_source *dcn35_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1834

static struct clock_source *dcn35_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1841

static struct clock_source *dcn35_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1901

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1902

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

858

static struct clock_source *dcn401_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1695

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1696

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

899

static struct clock_source *dcn42_clock_source_create(

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1660

pipe_ctx->clock_source->funcs->get_pix_clk_dividers(

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1661

pipe_ctx->clock_source,

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

933

static struct clock_source *dcn42b_clock_source_create(

drivers/net/can/mscan/mpc5xxx_can.c

110

const char *clock_source, int *mscan_clksrc)

drivers/net/can/mscan/mpc5xxx_can.c

132

clock_source ? clock_source : "<NULL>", clockdiv);

drivers/net/can/mscan/mpc5xxx_can.c

148

if (clock_source) {

drivers/net/can/mscan/mpc5xxx_can.c

150

if (!strcmp(clock_source, "ip"))

drivers/net/can/mscan/mpc5xxx_can.c

152

else if (!strcmp(clock_source, "sys"))

drivers/net/can/mscan/mpc5xxx_can.c

154

else if (!strcmp(clock_source, "ref"))

drivers/platform/x86/intel/int3472/discrete.c

486

int3472->clock.imgclk_index = cldb.clock_source;

drivers/ptp/ptp_ocp.c

3908

static DEVICE_ATTR_RW(clock_source);

drivers/soundwire/intel.c

347

u32 clock_source;

drivers/soundwire/intel.c

371

clock_source = SDW_SHIM_MLCS_CARDINAL_CLK;

drivers/soundwire/intel.c

380

clock_source = SDW_SHIM_MLCS_XTAL_CLK;

drivers/soundwire/intel.c

385

clock_source = SDW_SHIM_MLCS_AUDIO_PLL_CLK;

drivers/soundwire/intel.c

388

clock_source = SDW_SHIM_MLCS_XTAL_CLK;

drivers/soundwire/intel.c

434

u32p_replace_bits(&link_control, clock_source, SDW_SHIM_LCTL_MLCS_MASK);

drivers/soundwire/intel_ace2x.c

521

u32 clock_source;

drivers/soundwire/intel_ace2x.c

528

clock_source = SDW_SHIM2_MLCS_CARDINAL_CLK;

drivers/soundwire/intel_ace2x.c

531

clock_source = SDW_SHIM2_MLCS_XTAL_CLK;

drivers/soundwire/intel_ace2x.c

535

clock_source = SDW_SHIM2_MLCS_AUDIO_PLL_CLK;

drivers/soundwire/intel_ace2x.c

547

intel_shim_vs_set_clock_source(sdw, clock_source);

drivers/video/fbdev/sh_mobile_lcdcfb.c

2580

error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);

drivers/video/fbdev/sh_mobile_lcdcfb.c

356

int clock_source)

drivers/video/fbdev/sh_mobile_lcdcfb.c

361

switch (clock_source) {

include/linux/platform_data/x86/int3472.h

92

u8 clock_source;

include/sound/emu10k1.h

1691

unsigned int clock_source;

include/sound/vx_core.h

172

unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */

include/uapi/sound/hdsp.h

51

unsigned char clock_source;

include/uapi/sound/hdspm.h

57

unsigned char clock_source;

include/video/sh_mobile_lcdc.h

191

int clock_source;

sound/drivers/vx/vx_core.c

556

chip->clock_source = INTERNAL_QUARTZ;

sound/drivers/vx/vx_core.c

621

snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]);

sound/drivers/vx/vx_uer.c

181

chip->clock_source = source;

sound/drivers/vx/vx_uer.c

242

if (chip->clock_source != UER_SYNC) {

sound/drivers/vx/vx_uer.c

250

if (chip->clock_source != INTERNAL_QUARTZ) {

sound/drivers/vx/vx_uer.c

278

if (chip->clock_source == INTERNAL_QUARTZ)

sound/firewire/dice/dice-proc.c

109

u32 clock_source;

sound/firewire/dice/dice-proc.c

231

buf.ext_sync.clock_source));

sound/firewire/fireworks/fireworks_pcm.c

177

enum snd_efw_clock_source clock_source;

sound/firewire/fireworks/fireworks_pcm.c

188

err = snd_efw_command_get_clock_source(efw, &clock_source);

sound/firewire/fireworks/fireworks_pcm.c

196

if ((clock_source != SND_EFW_CLOCK_SOURCE_INTERNAL) ||

sound/firewire/fireworks/fireworks_proc.c

108

enum snd_efw_clock_source clock_source;

sound/firewire/fireworks/fireworks_proc.c

111

if (snd_efw_command_get_clock_source(efw, &clock_source) < 0)

sound/firewire/fireworks/fireworks_proc.c

117

snd_iprintf(buffer, "Clock Source: %d\n", clock_source);

sound/pci/echoaudio/layla20_dsp.c

173

static int set_input_clock(struct echoaudio *chip, u16 clock_source)

sound/pci/echoaudio/layla20_dsp.c

179

switch (clock_source) {

sound/pci/echoaudio/layla20_dsp.c

196

clock_source);

sound/pci/echoaudio/layla20_dsp.c

199

chip->input_clock = clock_source;

sound/pci/emu10k1/emu10k1_main.c

750

emu->emu1010.clock_source = emu->emu1010.clock_fallback;

sound/pci/emu10k1/emu10k1_main.c

751

emu->emu1010.wclock = 1 - emu->emu1010.clock_source;

sound/pci/emu10k1/emu10k1_main.c

877

emu->emu1010.clock_source = 1; /* 48000 */

sound/pci/emu10k1/emumixer.c

970

ucontrol->value.enumerated.item[0] = emu->emu1010.clock_source;

sound/pci/emu10k1/emumixer.c

987

if (emu->emu1010.clock_source == val)

sound/pci/emu10k1/emumixer.c

989

emu->emu1010.clock_source = val;

sound/pci/rme9652/hdsp.c

3355

char *clock_source;

sound/pci/rme9652/hdsp.c

3422

clock_source = "AutoSync";

sound/pci/rme9652/hdsp.c

3425

clock_source = "Internal 32 kHz";

sound/pci/rme9652/hdsp.c

3428

clock_source = "Internal 44.1 kHz";

sound/pci/rme9652/hdsp.c

3431

clock_source = "Internal 48 kHz";

sound/pci/rme9652/hdsp.c

3434

clock_source = "Internal 64 kHz";

sound/pci/rme9652/hdsp.c

3437

clock_source = "Internal 88.2 kHz";

sound/pci/rme9652/hdsp.c

3440

clock_source = "Internal 96 kHz";

sound/pci/rme9652/hdsp.c

3443

clock_source = "Internal 128 kHz";

sound/pci/rme9652/hdsp.c

3446

clock_source = "Internal 176.4 kHz";

sound/pci/rme9652/hdsp.c

3449

clock_source = "Internal 192 kHz";

sound/pci/rme9652/hdsp.c

3452

clock_source = "Error";

sound/pci/rme9652/hdsp.c

3454

snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);

sound/pci/rme9652/hdsp.c

4731

info.clock_source = (unsigned char)hdsp_clock_source(hdsp);

sound/pci/rme9652/hdspm.c

6206

info.clock_source = hdspm_clock_source(hdspm);