Symbol: clk_mask
drivers/clk/sunxi/clk-usb.c
113
qty = find_last_bit((unsigned long *)&data->clk_mask,
drivers/clk/sunxi/clk-usb.c
126
for_each_set_bit(i, (unsigned long *)&data->clk_mask,
drivers/clk/sunxi/clk-usb.c
169
.clk_mask = BIT(8) | BIT(7) | BIT(6),
drivers/clk/sunxi/clk-usb.c
182
.clk_mask = BIT(8) | BIT(6),
drivers/clk/sunxi/clk-usb.c
193
.clk_mask = BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8),
drivers/clk/sunxi/clk-usb.c
204
.clk_mask = BIT(16) | BIT(11) | BIT(10) | BIT(9) | BIT(8),
drivers/clk/sunxi/clk-usb.c
215
.clk_mask = BIT(19) | BIT(18) | BIT(17) | BIT(16) |
drivers/clk/sunxi/clk-usb.c
227
.clk_mask = BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1),
drivers/clk/sunxi/clk-usb.c
241
.clk_mask = BIT(10) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1),
drivers/clk/sunxi/clk-usb.c
80
u32 clk_mask;
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
2605
memset(smu->user_dpm_profile.clk_mask, 0, sizeof(smu->user_dpm_profile.clk_mask));
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
2640
smu->user_dpm_profile.clk_mask[clk_type] = mask;
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
533
smu->user_dpm_profile.clk_mask[clk_type]) {
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
535
smu->user_dpm_profile.clk_mask[clk_type]);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
244
uint32_t clk_mask[SMU_CLK_COUNT];
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
447
clk_mask(hwsq, mast, mastm, 0x00000000);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
448
clk_mask(hwsq, divs, divsm, divsv);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
449
clk_mask(hwsq, mast, mastm, mastv);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
455
clk_mask(hwsq, mast, 0x001000b0, 0x00100080);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
457
clk_mask(hwsq, mast, 0x000000b3, 0x00000081);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
464
clk_mask(hwsq, nvpll[0], 0xc03f0100,
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
466
clk_mask(hwsq, nvpll[1], 0x0000ffff, (N << 8) | M);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
475
clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16));
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
476
clk_mask(hwsq, mast, 0x00100033, 0x00000023);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
482
clk_mask(hwsq, spll[0], 0xc03f0100,
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
484
clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c
485
clk_mask(hwsq, mast, 0x00100033, 0x00000033);
drivers/gpu/drm/radeon/radeon_combios.c
401
u32 clk_mask,
drivers/gpu/drm/radeon/radeon_combios.c
505
if (clk_mask && data_mask) {
drivers/gpu/drm/radeon/radeon_combios.c
507
i2c.mask_clk_mask = clk_mask;
drivers/gpu/drm/radeon/radeon_combios.c
509
i2c.a_clk_mask = clk_mask;
drivers/gpu/drm/radeon/radeon_combios.c
511
i2c.en_clk_mask = clk_mask;
drivers/gpu/drm/radeon/radeon_combios.c
513
i2c.y_clk_mask = clk_mask;
drivers/pmdomain/imx/imx8m-blk-ctrl.c
122
regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
drivers/pmdomain/imx/imx8m-blk-ctrl.c
124
regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
drivers/pmdomain/imx/imx8m-blk-ctrl.c
134
regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
drivers/pmdomain/imx/imx8m-blk-ctrl.c
172
regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
drivers/pmdomain/imx/imx8m-blk-ctrl.c
47
u32 clk_mask;
drivers/pmdomain/imx/imx8m-blk-ctrl.c
473
.clk_mask = BIT(1),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
481
.clk_mask = BIT(0),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
489
.clk_mask = BIT(2),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
507
.clk_mask = BIT(1),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
517
.clk_mask = BIT(0),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
527
.clk_mask = BIT(2),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
599
.clk_mask = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
606
.clk_mask = BIT(6) | BIT(7),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
614
.clk_mask = BIT(8) | BIT(9),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
623
.clk_mask = BIT(10) | BIT(11),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
668
.clk_mask = BIT(0) | BIT(1),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
677
.clk_mask = BIT(2) | BIT(3),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
686
.clk_mask = BIT(4) | BIT(5),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
695
.clk_mask = BIT(6) | BIT(7),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
766
.clk_mask = BIT(0) | BIT(1),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
775
.clk_mask = BIT(2) | BIT(3),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
784
.clk_mask = BIT(4) | BIT(5) | BIT(23),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
794
.clk_mask = BIT(6) | BIT(7),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
804
.clk_mask = BIT(9) | BIT(10),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
813
.clk_mask = BIT(11) | BIT(12) | BIT(24),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
823
.clk_mask = BIT(16) | BIT(17) | BIT(18),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
833
.clk_mask = BIT(19) | BIT(20) | BIT(21),
drivers/pmdomain/imx/imx8m-blk-ctrl.c
843
.clk_mask = BIT(22),
drivers/pmdomain/imx/imx93-blk-ctrl.c
163
regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
drivers/pmdomain/imx/imx93-blk-ctrl.c
189
regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
drivers/pmdomain/imx/imx93-blk-ctrl.c
373
.clk_mask = BIT(11),
drivers/pmdomain/imx/imx93-blk-ctrl.c
381
.clk_mask = BIT(9) | BIT(10),
drivers/pmdomain/imx/imx93-blk-ctrl.c
389
.clk_mask = BIT(7) | BIT(8),
drivers/pmdomain/imx/imx93-blk-ctrl.c
411
.clk_mask = BIT(4) | BIT(5) | BIT(6),
drivers/pmdomain/imx/imx93-blk-ctrl.c
428
.clk_mask = BIT(2) | BIT(3),
drivers/pmdomain/imx/imx93-blk-ctrl.c
460
.clk_mask = BIT(12),
drivers/pmdomain/imx/imx93-blk-ctrl.c
83
u32 clk_mask;
sound/pci/ice1712/ak4xxx.c
77
tmp &= ~priv->clk_mask;
sound/pci/ice1712/ak4xxx.c
88
tmp |= priv->clk_mask;
sound/pci/ice1712/delta.c
438
.clk_mask = ICE1712_DELTA_AP_CCLK,
sound/pci/ice1712/delta.c
459
.clk_mask = ICE1712_DELTA_AP_CCLK,
sound/pci/ice1712/delta.c
481
.clk_mask = ICE1712_DELTA_1010LT_CCLK,
sound/pci/ice1712/delta.c
503
.clk_mask = ICE1712_DELTA_66E_CCLK,
sound/pci/ice1712/delta.c
526
.clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
sound/pci/ice1712/delta.c
548
.clk_mask = ICE1712_VX442_CCLK,
sound/pci/ice1712/ews.c
342
.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
sound/pci/ice1712/ews.c
363
.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
sound/pci/ice1712/ews.c
384
.clk_mask = ICE1712_6FIRE_SERIAL_CLOCK,
sound/pci/ice1712/hoontech.c
287
.clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
sound/pci/ice1712/ice1712.h
255
unsigned int clk_mask; /* CLK gpio bit */
sound/pci/ice1712/phase.c
101
.clk_mask = 1 << 5,
sound/pci/ice1712/revo.c
237
.clk_mask = VT1724_REVO_CCLK,
sound/pci/ice1712/revo.c
259
.clk_mask = VT1724_REVO_CCLK,
sound/pci/ice1712/revo.c
280
.clk_mask = VT1724_REVO_CCLK,
sound/pci/ice1712/revo.c
298
.clk_mask = VT1724_REVO_CCLK,
sound/pci/ice1712/revo.c
348
.clk_mask = VT1724_REVO_CCLK,