control_phy
__func__, control_phy->type);
writel(val, control_phy->power);
struct omap_control_phy *control_phy;
struct omap_control_phy *control_phy;
control_phy = devm_kzalloc(&pdev->dev, sizeof(*control_phy),
if (!control_phy)
control_phy->dev = &pdev->dev;
control_phy->type = *(enum omap_control_phy_type *)device_get_match_data(&pdev->dev);
if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) {
control_phy->otghs_control =
if (IS_ERR(control_phy->otghs_control))
return PTR_ERR(control_phy->otghs_control);
control_phy->power =
if (IS_ERR(control_phy->power)) {
return PTR_ERR(control_phy->power);
if (control_phy->type == OMAP_CTRL_TYPE_PIPE3 ||
control_phy->type == OMAP_CTRL_TYPE_PCIE) {
control_phy->sys_clk = devm_clk_get(control_phy->dev,
if (IS_ERR(control_phy->sys_clk)) {
if (control_phy->type == OMAP_CTRL_TYPE_PCIE) {
control_phy->pcie_pcs =
if (IS_ERR(control_phy->pcie_pcs))
return PTR_ERR(control_phy->pcie_pcs);
dev_set_drvdata(control_phy->dev, control_phy);
control_phy = dev_get_drvdata(dev);
if (!control_phy) {
if (control_phy->type != OMAP_CTRL_TYPE_PCIE) {
val = readl(control_phy->pcie_pcs);
writel(val, control_phy->pcie_pcs);
struct omap_control_phy *control_phy;
control_phy = dev_get_drvdata(dev);
if (!control_phy) {
if (control_phy->type == OMAP_CTRL_TYPE_OTGHS)
val = readl(control_phy->power);
switch (control_phy->type) {
rate = clk_get_rate(control_phy->sys_clk);
struct control_phy control_phy;
struct control_phy *control_phy = &scb->control_phy;
u8 phy_id = control_phy->phy_id;
switch (control_phy->sub_func) {
phy_id, control_phy->sub_func);
phy_id, control_phy->sub_func);
struct control_phy *control_phy = &scb->control_phy;
control_phy->phy_id = (u8) phy_id;
control_phy->sub_func = subfunc;
control_phy->hot_plug_delay = HOTPLUG_DELAY_TIMEOUT;
set_speed_mask(&control_phy->speed_mask, phy->phy_desc);
control_phy->port_type = SAS_PROTOCOL_ALL << 4;
control_phy->port_type = SAS_PROTOCOL_ALL;
control_phy->port_type =
control_phy->link_reset_retries = 10;
control_phy->func_mask = FUNCTION_MASK_DEFAULT;
control_phy->func_mask &= ~SPINUP_HOLD_DIS;
control_phy->func_mask |= SPINUP_HOLD_DIS;
control_phy->conn_handle = cpu_to_le16(0xFFFF);