Symbol: consts
arch/arm64/crypto/aes-glue.c
128
u8 __aligned(8) consts[];
arch/arm64/crypto/aes-glue.c
786
be128 *consts = (be128 *)ctx->consts;
arch/arm64/crypto/aes-glue.c
796
aes_ecb_encrypt(ctx->consts, (u8[AES_BLOCK_SIZE]){},
arch/arm64/crypto/aes-glue.c
799
cmac_gf128_mul_by_x(consts, consts);
arch/arm64/crypto/aes-glue.c
800
cmac_gf128_mul_by_x(consts + 1, consts);
arch/arm64/crypto/aes-glue.c
825
aes_ecb_encrypt(ctx->consts, ks[1], ctx->key.key_enc, rounds, 2);
arch/arm64/crypto/aes-glue.c
884
u8 *consts = tctx->consts;
arch/arm64/crypto/aes-glue.c
889
consts += AES_BLOCK_SIZE;
arch/arm64/crypto/aes-glue.c
891
mac_do_update(&tctx->key, consts, 1, ctx->dg, 0);
arch/arm64/crypto/sm4-ce-glue.c
508
be128 *consts = (be128 *)ctx->consts;
arch/arm64/crypto/sm4-ce-glue.c
514
memset(consts, 0, SM4_BLOCK_SIZE);
arch/arm64/crypto/sm4-ce-glue.c
521
sm4_ce_crypt_block(ctx->key.rkey_enc, (u8 *)consts, (const u8 *)consts);
arch/arm64/crypto/sm4-ce-glue.c
525
a = be64_to_cpu(consts[0].a);
arch/arm64/crypto/sm4-ce-glue.c
526
b = be64_to_cpu(consts[0].b);
arch/arm64/crypto/sm4-ce-glue.c
527
consts[0].a = cpu_to_be64((a << 1) | (b >> 63));
arch/arm64/crypto/sm4-ce-glue.c
528
consts[0].b = cpu_to_be64((b << 1) ^ ((a >> 63) ? 0x87 : 0));
arch/arm64/crypto/sm4-ce-glue.c
530
a = be64_to_cpu(consts[0].a);
arch/arm64/crypto/sm4-ce-glue.c
531
b = be64_to_cpu(consts[0].b);
arch/arm64/crypto/sm4-ce-glue.c
532
consts[1].a = cpu_to_be64((a << 1) | (b >> 63));
arch/arm64/crypto/sm4-ce-glue.c
533
consts[1].b = cpu_to_be64((b << 1) ^ ((a >> 63) ? 0x87 : 0));
arch/arm64/crypto/sm4-ce-glue.c
557
sm4_ce_crypt(ctx->key.rkey_enc, ctx->consts, ks[1], 2);
arch/arm64/crypto/sm4-ce-glue.c
593
const u8 *consts = tctx->consts;
arch/arm64/crypto/sm4-ce-glue.c
598
consts += SM4_BLOCK_SIZE;
arch/arm64/crypto/sm4-ce-glue.c
601
sm4_ce_mac_update(tctx->key.rkey_enc, ctx->digest, consts, 1,
arch/arm64/crypto/sm4-ce-glue.c
62
u8 __aligned(8) consts[];
arch/mips/cavium-octeon/octeon-irq.c
2882
union cvmx_ciu3_const consts;
arch/mips/cavium-octeon/octeon-irq.c
2897
consts.u64 = cvmx_read_csr(base_addr + CIU3_CONST);
crypto/cmac.c
132
crypto_xor(prev, (const u8 *)tctx->consts + offset, bs);
crypto/cmac.c
34
__be64 consts[];
crypto/cmac.c
42
__be64 *consts = ctx->consts;
crypto/cmac.c
52
memset(consts, 0, bs);
crypto/cmac.c
53
crypto_cipher_encrypt_one(ctx->child, (u8 *)consts, (u8 *)consts);
crypto/cmac.c
58
_const[0] = be64_to_cpu(consts[1]);
crypto/cmac.c
59
_const[1] = be64_to_cpu(consts[0]);
crypto/cmac.c
67
consts[i + 0] = cpu_to_be64(_const[1]);
crypto/cmac.c
68
consts[i + 1] = cpu_to_be64(_const[0]);
crypto/cmac.c
74
_const[0] = be64_to_cpu(consts[0]);
crypto/cmac.c
81
consts[i] = cpu_to_be64(_const[0]);
crypto/xcbc.c
100
crypto_xor(prev, &tctx->consts[offset], bs);
crypto/xcbc.c
33
u8 consts[];
crypto/xcbc.c
42
u8 *consts = ctx->consts;
crypto/xcbc.c
50
crypto_cipher_encrypt_one(ctx->child, consts, (u8 *)ks + bs);
crypto/xcbc.c
51
crypto_cipher_encrypt_one(ctx->child, consts + bs, (u8 *)ks + bs * 2);
drivers/crypto/inside-secure/safexcel_hash.c
2059
__be64 consts[4];
drivers/crypto/inside-secure/safexcel_hash.c
2074
memset(consts, 0, AES_BLOCK_SIZE);
drivers/crypto/inside-secure/safexcel_hash.c
2075
aes_encrypt(ctx->aes, (u8 *)consts, (u8 *)consts);
drivers/crypto/inside-secure/safexcel_hash.c
2078
_const[0] = be64_to_cpu(consts[1]);
drivers/crypto/inside-secure/safexcel_hash.c
2079
_const[1] = be64_to_cpu(consts[0]);
drivers/crypto/inside-secure/safexcel_hash.c
2087
consts[i + 0] = cpu_to_be64(_const[1]);
drivers/crypto/inside-secure/safexcel_hash.c
2088
consts[i + 1] = cpu_to_be64(_const[0]);
drivers/crypto/inside-secure/safexcel_hash.c
2093
ctx->base.ipad.be[i] = cpu_to_be32(((u32 *)consts)[i]);
drivers/gpu/drm/i915/gt/intel_llc.c
110
ia_freq = consts->max_ia_freq - diff * scale / 2;
drivers/gpu/drm/i915/gt/intel_llc.c
120
struct ia_constants consts;
drivers/gpu/drm/i915/gt/intel_llc.c
123
if (!get_ia_constants(llc, &consts))
drivers/gpu/drm/i915/gt/intel_llc.c
130
if (consts.max_gpu_freq <= consts.min_gpu_freq)
drivers/gpu/drm/i915/gt/intel_llc.c
137
for (gpu_freq = consts.max_gpu_freq;
drivers/gpu/drm/i915/gt/intel_llc.c
138
gpu_freq >= consts.min_gpu_freq;
drivers/gpu/drm/i915/gt/intel_llc.c
142
calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq);
drivers/gpu/drm/i915/gt/intel_llc.c
51
struct ia_constants *consts)
drivers/gpu/drm/i915/gt/intel_llc.c
59
consts->max_ia_freq = cpu_max_MHz();
drivers/gpu/drm/i915/gt/intel_llc.c
61
consts->min_ring_freq =
drivers/gpu/drm/i915/gt/intel_llc.c
64
consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3);
drivers/gpu/drm/i915/gt/intel_llc.c
66
consts->min_gpu_freq = intel_rps_get_min_raw_freq(rps);
drivers/gpu/drm/i915/gt/intel_llc.c
67
consts->max_gpu_freq = intel_rps_get_max_raw_freq(rps);
drivers/gpu/drm/i915/gt/intel_llc.c
74
const struct ia_constants *consts,
drivers/gpu/drm/i915/gt/intel_llc.c
79
const int diff = consts->max_gpu_freq - gpu_freq;
drivers/gpu/drm/i915/gt/intel_llc.c
90
ring_freq = max(consts->min_ring_freq, gpu_freq);
drivers/gpu/drm/i915/gt/intel_llc.c
93
ring_freq = max(consts->min_ring_freq, ring_freq);
drivers/gpu/drm/i915/gt/selftest_llc.c
12
struct ia_constants consts;
drivers/gpu/drm/i915/gt/selftest_llc.c
19
if (!get_ia_constants(llc, &consts))
drivers/gpu/drm/i915/gt/selftest_llc.c
22
for (gpu_freq = consts.min_gpu_freq;
drivers/gpu/drm/i915/gt/selftest_llc.c
23
gpu_freq <= consts.max_gpu_freq;
drivers/gpu/drm/i915/gt/selftest_llc.c
30
calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq);
drivers/gpu/drm/i915/gt/selftest_llc.c
36
gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq);
drivers/gpu/drm/i915/gt/selftest_llc.c
44
gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
drivers/gpu/drm/i915/gt/selftest_llc.c
54
gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c
355
.consts = &lan969x_consts,
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c
97
if (portno < sparx5->data->consts->n_ports_all)
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c
103
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c
115
port = fi.src_port < consts->n_ports ? sparx5->ports[fi.src_port] :
drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c
220
for (int idx = 0; idx < sparx5->data->consts->n_ports; ++idx) {
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
122
if (portno >= sparx5->data->consts->n_ports) {
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
156
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
172
for (portno = 0; portno < consts->n_ports_all; portno++) {
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
180
if (portno < consts->n_ports)
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
212
for (idx = 0; idx < consts->n_auto_cals; idx++)
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
303
if (portno < sparx5->data->consts->n_ports_all) {
drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c
592
for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) {
drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c
241
for (i = 0; i < sparx5->data->consts->n_ports; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c
390
for (i = 0; i < sparx5->data->consts->n_ports; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c
1125
for (idx = 0; idx < sparx5->data->consts->n_ports; idx++)
drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c
1249
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c
1257
consts->n_ports_all *
drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c
1265
for (portno = 0; portno < consts->n_ports; portno++)
drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c
156
port = fi.src_port < sparx5->data->consts->n_ports ?
drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c
290
for (idx = 0; idx < sparx5->data->consts->n_ports; ++idx) {
drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c
376
if (port >= sparx5->data->consts->n_ports)
drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c
83
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c
86
if (pgid < consts->n_ports) {
drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c
92
addr = pgid - consts->n_ports;
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
1116
.consts = &sparx5_consts,
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
607
for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++)
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
629
return (sparx5->data->consts->buf_size / SPX5_BUFFER_CELL_SZ - 100) *
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
635
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
642
consts->qres_max_prio_idx +
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
648
consts->qres_max_colour_idx +
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
678
for (idx = 0; idx < sparx5->data->consts->n_ports; idx++)
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
689
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
696
for (idx = 0; idx < consts->n_own_upsids; idx++) {
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
704
for (idx = consts->n_ports; idx < consts->n_ports_all; idx++)
drivers/net/ethernet/microchip/sparx5/sparx5_main.h
361
const struct sparx5_consts *consts;
drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c
202
sparx5->data->consts->n_ports);
drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c
301
for (portno = 0; portno < sparx5->data->consts->n_ports; portno++)
drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c
320
for (portno = 0; portno < sparx5->data->consts->n_ports; portno++) {
drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c
338
for (portno = 0; portno < sparx5->data->consts->n_ports; portno++)
drivers/net/ethernet/microchip/sparx5/sparx5_packet.c
79
port = fi.src_port < sparx5->data->consts->n_ports ?
drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c
26
i < spx5->data->consts->n_pgids; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c
40
idx >= spx5->data->consts->n_pgids)
drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c
52
return sparx5->data->consts->n_ports + pgid;
drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c
8
for (i = 0; i < spx5->data->consts->n_pgids; i++)
drivers/net/ethernet/microchip/sparx5/sparx5_port.c
1423
return sparx5->data->consts->n_ports + port;
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
26
sparx5->data->consts->n_filters, id);
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
32
sparx5->data->consts->n_filters, id);
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
326
for (i = 0; i < sparx5->data->consts->n_lb_groups; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
38
sparx5->data->consts->n_gates, idx, id);
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
44
sparx5->data->consts->n_gates, id);
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
50
sparx5->data->consts->n_sdlbs, idx, id);
drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c
56
sparx5->data->consts->n_sdlbs, id);
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
281
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
293
sparx5, PTP_PTP_PIN_CFG(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
295
ts->tv_sec = spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
296
curr_nsec = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
448
const struct sparx5_consts *consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
451
consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
462
sparx5, PTP_PTP_PIN_CFG(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
466
sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
468
sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
469
spx5_wr(ts->tv_nsec, sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
478
sparx5, PTP_PTP_PIN_CFG(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
489
const struct sparx5_consts *consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
494
consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
504
sparx5, PTP_PTP_PIN_CFG(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
506
s = spx5_rd(sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
508
s |= spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
509
ns = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
529
const struct sparx5_consts *consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
531
consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
545
sparx5, PTP_PTP_PIN_CFG(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
548
sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
557
sparx5, PTP_PTP_PIN_CFG(consts->tod_pin));
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
647
for (i = 0; i < sparx5->data->consts->n_ports; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c
663
for (i = 0; i < sparx5->data->consts->n_ports; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_sdlb.c
189
for (i = sparx5->data->consts->n_lb_groups - 1; i >= 0; i--) {
drivers/net/ethernet/microchip/sparx5/sparx5_sdlb.c
213
for (i = 0; i < sparx5->data->consts->n_lb_groups; i++) {
drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c
575
for (i = 0; i < spx5->data->consts->n_ports; i++)
drivers/net/ethernet/microchip/sparx5/sparx5_tc_flower.c
789
sg_idx = sparx5_pool_idx_to_id(sparx5->data->consts->n_gates -
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1780
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1792
for (portno = 0; portno < consts->n_ports; ++portno) {
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1807
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1818
for (portno = 0; portno < consts->n_ports; ++portno) {
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1824
for (portno = 0; portno < consts->n_ports; ++portno)
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1835
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1840
for (portno = 0; portno < consts->n_ports; ++portno)
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1852
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1860
for (portno = 0; portno < consts->n_ports; ++portno)
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1892
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1898
for (portno = 0; portno < consts->n_ports; ++portno)
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1905
for (portno = 0; portno < consts->n_ports; ++portno)
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
1917
for (portno = 0; portno < consts->n_ports; ++portno)
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
2034
const struct sparx5_consts *consts = sparx5->data->consts;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
2056
ctrl->vcaps = consts->vcaps;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
2057
ctrl->stats = consts->vcap_stats;
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
2063
cfg = &consts->vcaps_cfg[idx];
drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c
2078
for (idx = 0; idx < consts->n_ports; ++idx)
drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c
171
for (port = 0; port < sparx5->data->consts->n_ports; port++) {
drivers/phy/microchip/sparx5_serdes.c
1132
for (i = 0; i < priv->data->consts.cmu_max; i++) {
drivers/phy/microchip/sparx5_serdes.c
2599
.consts = {
drivers/phy/microchip/sparx5_serdes.c
2614
.consts = {
drivers/phy/microchip/sparx5_serdes.c
2638
for (idx = 0; idx < priv->data->consts.sd_max; idx++) {
drivers/phy/microchip/sparx5_serdes.c
2708
for (idx = 0; idx < priv->data->consts.sd_max; idx++) {
drivers/phy/microchip/sparx5_serdes.h
66
const struct sparx5_serdes_consts consts;
include/sound/sdca_regmap.h
26
struct reg_default *consts);
lib/crc/riscv/crc-clmul-template.h
118
tmp = clmul(msgpoly, consts->barrett_reduction_const_1);
lib/crc/riscv/crc-clmul-template.h
120
tmp = clmulr(msgpoly, consts->barrett_reduction_const_1);
lib/crc/riscv/crc-clmul-template.h
146
return clmulr(tmp, consts->barrett_reduction_const_2);
lib/crc/riscv/crc-clmul-template.h
148
return clmul(tmp, consts->barrett_reduction_const_2);
lib/crc/riscv/crc-clmul-template.h
155
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc-clmul-template.h
157
return crc_clmul_long(crc_clmul_prep(crc, msgpoly), consts);
lib/crc/riscv/crc-clmul-template.h
163
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc-clmul-template.h
184
return crc_clmul_long(msgpoly, consts);
lib/crc/riscv/crc-clmul-template.h
188
return crc_clmul_long(msgpoly, consts) ^ (crc >> (8*len));
lib/crc/riscv/crc-clmul-template.h
191
return crc_clmul_long(msgpoly, consts) ^ (crc << (8*len));
lib/crc/riscv/crc-clmul-template.h
197
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc-clmul-template.h
208
crc = crc_clmul_update_partial(crc, p, align, consts);
lib/crc/riscv/crc-clmul-template.h
239
p0 = clmulh(m0, consts->fold_across_2_longs_const_hi);
lib/crc/riscv/crc-clmul-template.h
240
p1 = clmul(m0, consts->fold_across_2_longs_const_hi);
lib/crc/riscv/crc-clmul-template.h
241
p2 = clmulh(m1, consts->fold_across_2_longs_const_lo);
lib/crc/riscv/crc-clmul-template.h
242
p3 = clmul(m1, consts->fold_across_2_longs_const_lo);
lib/crc/riscv/crc-clmul-template.h
251
crc = crc_clmul_long(m0, consts);
lib/crc/riscv/crc-clmul-template.h
252
crc = crc_clmul_update_long(crc, m1, consts);
lib/crc/riscv/crc-clmul-template.h
256
crc = crc_clmul_update_long(crc, crc_load_long(p), consts);
lib/crc/riscv/crc-clmul-template.h
262
crc = crc_clmul_update_partial(crc, p, len, consts);
lib/crc/riscv/crc-clmul-template.h
91
crc_clmul_long(unsigned long msgpoly, const struct crc_clmul_consts *consts)
lib/crc/riscv/crc-clmul.h
11
const struct crc_clmul_consts *consts);
lib/crc/riscv/crc-clmul.h
13
const struct crc_clmul_consts *consts);
lib/crc/riscv/crc-clmul.h
15
const struct crc_clmul_consts *consts);
lib/crc/riscv/crc-clmul.h
18
const struct crc_clmul_consts *consts);
lib/crc/riscv/crc-clmul.h
20
const struct crc_clmul_consts *consts);
lib/crc/riscv/crc16_msb.c
15
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc16_msb.c
17
return crc_clmul(crc, p, len, consts);
lib/crc/riscv/crc32_lsb.c
15
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc32_lsb.c
17
return crc_clmul(crc, p, len, consts);
lib/crc/riscv/crc32_msb.c
15
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc32_msb.c
17
return crc_clmul(crc, p, len, consts);
lib/crc/riscv/crc64_lsb.c
15
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc64_lsb.c
17
return crc_clmul(crc, p, len, consts);
lib/crc/riscv/crc64_msb.c
15
const struct crc_clmul_consts *consts)
lib/crc/riscv/crc64_msb.c
17
return crc_clmul(crc, p, len, consts);
lib/crc/x86/crc-pclmul-template.h
56
#define CRC_PCLMUL(crc, p, len, prefix, consts, have_pclmulqdq) \
lib/crc/x86/crc-pclmul-template.h
62
consts_ptr = (consts).fold_across_128_bits_consts; \
sound/soc/sdca/sdca_regmap.c
248
struct reg_default *consts)
sound/soc/sdca/sdca_regmap.c
266
consts[k].reg = SDW_SDCA_CTL(function->desc->adr,
sound/soc/sdca/sdca_regmap.c
270
consts[k].def = control->values[l];
sound/soc/sdca/sdca_regmap.c
272
consts[k].def = control->reset;