cobalt_info
cobalt_info("CPLD revision %u is not supported!\n", rev);
cobalt_info("CPLD System control register (read/write)\n");
cobalt_info("\t\tSystem control: 0x%04x (0x0f00)\n",
cobalt_info("Needed %d retries\n", 2 - retries);
cobalt_info("CPLD Clock control register (read/write)\n");
cobalt_info("\t\tClock control: 0x%04x (0x0000)\n",
cobalt_info("CPLD HSMA Clk Osc register (read/write) - Must set wr trigger to load default values\n");
cobalt_info("\t\tRegister #7:\t0x%04x (0x0022)\n",
cobalt_info("\t\tRegister #8:\t0x%04x (0x0047)\n",
cobalt_info("\t\tRegister #9:\t0x%04x (0x00fa)\n",
cobalt_info("\t\tRegister #10:\t0x%04x (0x0061)\n",
cobalt_info("\t\tRegister #11:\t0x%04x (0x001e)\n",
cobalt_info("\t\tRegister #12:\t0x%04x (0x0045)\n",
cobalt_info("\t\tRegister #135:\t0x%04x\n",
cobalt_info("\t\tRegister #137:\t0x%04x\n",
cobalt_info("CPLD System status register (read only)\n");
cobalt_info("\t\tSystem status: 0x%04x\n",
cobalt_info("CPLD MAXII info register (read only)\n");
cobalt_info("\t\tBoard serial number: 0x%04x\n",
cobalt_info("\t\tMAXII program revision: 0x%04x\n",
cobalt_info("CPLD temp and voltage ADT7411 registers (read only)\n");
cobalt_info("\t\tBoard temperature: %u Celsius\n",
cobalt_info("\t\tFPGA temperature: %u Celsius\n",
cobalt_info("\t\tVDD 3V3: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("\t\tADC ch3 5V: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("\t\tADC ch4 3V: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("\t\tADC ch5 2V5: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("\t\tADC ch6 1V8: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("\t\tADC ch7 1V5: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("\t\tADC ch8 0V9: %u,%03uV\n", tmp / 1000, tmp % 1000);
cobalt_info("PCIe device capability 0x%08x: Max payload %d\n",
cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n",
cobalt_info("PCIe device status 0x%04x\n", stat);
cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n",
cobalt_info("PCIe link control 0x%04x\n", ctrl);
cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n",
cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n",
cobalt_info("PCIe slot capability 0x%08x\n", capa);
cobalt_info("PCIe slot control 0x%04x\n", ctrl);
cobalt_info("PCIe slot status 0x%04x\n", stat);
cobalt_info("MSI %s\n", ctrl & 1 ? "enable" : "disable");
cobalt_info("MSI multiple message: Capable %u. Enable %u\n",
cobalt_info("MSI: 64-bit address capable\n");
cobalt_info("MSI: Address 0x%08x%08x. Data 0x%04x\n",
cobalt_info("MSI: Address 0x%08x. Data 0x%04x\n",
cobalt_info("PCI Express interface from Omnitek\n");
cobalt_info("PCI Express interface provider is unknown!\n");
cobalt_info("64-bit BAR\n");
cobalt_info("stream #%d -> dma channel #%d <- video channel %d\n",
cobalt_info("Initializing card %d\n", cobalt->instance);
cobalt_info("Not able to read the HDL info\n");
cobalt_info("%s", cobalt->hdl_info);
cobalt_info("Initialized cobalt card\n");
cobalt_info("removed cobalt card\n");
cobalt_info("registered bus %s\n", adap->name);
cobalt_info("full rx FIFO %d\n", i);
cobalt_info("irq: adv1=%u adv2=%u advout=%u none=%u full=%u\n",
cobalt_info("irq: dma_tot=%u (", cobalt->irq_dma_tot);
cobalt_info("Omnitek DMA capability: ID 0x%02x Version 0x%02x Next 0x%x Size 0x%x\n",
cobalt_info("Omnitek DMA: 32 bits PCIe and Local\n");
cobalt_info("Omnitek DMA: 64 bits PCIe, 32 bits Local\n");
cobalt_info("Omnitek DMA: 64 bits PCIe and Local\n");
cobalt_info("Omnitek DMA channel #%d: %s %s\n", i,
cobalt_info("registered node %d\n", node);
cobalt_info("cobalt_cobaltc: adrs = %p\n", adrs);
cobalt_info("rx%d: cvi resolution: %dx%d\n", rx,
cobalt_info("rx%d: cvi control: %s%s%s\n", rx,
cobalt_info("rx%d: cvi status: %s%s\n", rx,
cobalt_info("rx%d: Measurements: %s%s%s%s%s%s%s\n", rx,
cobalt_info("rx%d: irq_status: 0x%02x irq_triggers: 0x%02x\n", rx,
cobalt_info("rx%d: vsync: %d\n", rx, ioread32(&vmr->vsync_time));
cobalt_info("rx%d: vbp: %d\n", rx, ioread32(&vmr->vback_porch));
cobalt_info("rx%d: vact: %d\n", rx, ioread32(&vmr->vactive_area));
cobalt_info("rx%d: vfb: %d\n", rx, ioread32(&vmr->vfront_porch));
cobalt_info("rx%d: hsync: %d\n", rx, ioread32(&vmr->hsync_time));
cobalt_info("rx%d: hbp: %d\n", rx, ioread32(&vmr->hback_porch));
cobalt_info("rx%d: hact: %d\n", rx, ioread32(&vmr->hactive_area));
cobalt_info("rx%d: hfb: %d\n", rx, ioread32(&vmr->hfront_porch));
cobalt_info("rx%d: Freewheeling: %s%s%s\n", rx,
cobalt_info("rx%d: Clock Loss Detection: %s%s\n", rx,
cobalt_info("rx%d: Packer: %x\n", rx, ioread32(&packer->control));
cobalt_info("%s", cobalt->hdl_info);
cobalt_info("sysctrl: %08x, sysstat: %08x\n",
cobalt_info("dma channel: %d, video channel: %d\n",
cobalt_info("tx: status: %s%s\n",
cobalt_info("tx: evcnt: %d\n", ioread32(&vo->rd_evcnt_count));
cobalt_info("data will not fit into plane (%lu < %u)\n",