Symbol: cn10k_ddr_pmu
drivers/perf/marvell_cn10k_ddr_pmu.c
1089
struct cn10k_ddr_pmu *ddr_pmu = platform_get_drvdata(pdev);
drivers/perf/marvell_cn10k_ddr_pmu.c
161
void (*enable_read_freerun_counter)(struct cn10k_ddr_pmu *pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
163
void (*enable_write_freerun_counter)(struct cn10k_ddr_pmu *pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
165
void (*clear_read_freerun_counter)(struct cn10k_ddr_pmu *pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
166
void (*clear_write_freerun_counter)(struct cn10k_ddr_pmu *pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
167
void (*pmu_overflow_handler)(struct cn10k_ddr_pmu *pmu, int evt_idx);
drivers/perf/marvell_cn10k_ddr_pmu.c
170
#define to_cn10k_ddr_pmu(p) container_of(p, struct cn10k_ddr_pmu, pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
365
struct cn10k_ddr_pmu *pmu = dev_get_drvdata(dev);
drivers/perf/marvell_cn10k_ddr_pmu.c
409
struct cn10k_ddr_pmu *ddr_pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
438
static int cn10k_ddr_perf_alloc_counter(struct cn10k_ddr_pmu *pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
467
static void cn10k_ddr_perf_free_counter(struct cn10k_ddr_pmu *pmu, int counter)
drivers/perf/marvell_cn10k_ddr_pmu.c
474
struct cn10k_ddr_pmu *pmu = to_cn10k_ddr_pmu(event->pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
503
static void cn10k_ddr_perf_counter_start(struct cn10k_ddr_pmu *ddr_pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
513
static void cn10k_ddr_perf_counter_stop(struct cn10k_ddr_pmu *ddr_pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
523
static void cn10k_ddr_perf_counter_enable(struct cn10k_ddr_pmu *pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
572
static u64 cn10k_ddr_perf_read_counter(struct cn10k_ddr_pmu *pmu, int counter)
drivers/perf/marvell_cn10k_ddr_pmu.c
592
struct cn10k_ddr_pmu *pmu = to_cn10k_ddr_pmu(event->pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
609
struct cn10k_ddr_pmu *pmu = to_cn10k_ddr_pmu(event->pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
622
struct cn10k_ddr_pmu *pmu = to_cn10k_ddr_pmu(event->pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
668
struct cn10k_ddr_pmu *pmu = to_cn10k_ddr_pmu(event->pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
682
struct cn10k_ddr_pmu *pmu = to_cn10k_ddr_pmu(event->pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
699
struct cn10k_ddr_pmu *ddr_pmu = to_cn10k_ddr_pmu(pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
708
struct cn10k_ddr_pmu *ddr_pmu = to_cn10k_ddr_pmu(pmu);
drivers/perf/marvell_cn10k_ddr_pmu.c
715
static void cn10k_ddr_perf_event_update_all(struct cn10k_ddr_pmu *pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
737
static void ddr_pmu_enable_read_freerun(struct cn10k_ddr_pmu *pmu, bool enable)
drivers/perf/marvell_cn10k_ddr_pmu.c
751
static void ddr_pmu_enable_write_freerun(struct cn10k_ddr_pmu *pmu, bool enable)
drivers/perf/marvell_cn10k_ddr_pmu.c
765
static void ddr_pmu_read_clear_freerun(struct cn10k_ddr_pmu *pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
774
static void ddr_pmu_write_clear_freerun(struct cn10k_ddr_pmu *pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
783
static void ddr_pmu_overflow_hander(struct cn10k_ddr_pmu *pmu, int evt_idx)
drivers/perf/marvell_cn10k_ddr_pmu.c
790
static void ddr_pmu_ody_enable_read_freerun(struct cn10k_ddr_pmu *pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
805
static void ddr_pmu_ody_enable_write_freerun(struct cn10k_ddr_pmu *pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
820
static void ddr_pmu_ody_read_clear_freerun(struct cn10k_ddr_pmu *pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
829
static void ddr_pmu_ody_write_clear_freerun(struct cn10k_ddr_pmu *pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
838
static void ddr_pmu_ody_overflow_hander(struct cn10k_ddr_pmu *pmu, int evt_idx)
drivers/perf/marvell_cn10k_ddr_pmu.c
850
static irqreturn_t cn10k_ddr_pmu_overflow_handler(struct cn10k_ddr_pmu *pmu)
drivers/perf/marvell_cn10k_ddr_pmu.c
902
struct cn10k_ddr_pmu *pmu = container_of(hrtimer, struct cn10k_ddr_pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
916
struct cn10k_ddr_pmu *pmu = hlist_entry_safe(node, struct cn10k_ddr_pmu,
drivers/perf/marvell_cn10k_ddr_pmu.c
989
struct cn10k_ddr_pmu *ddr_pmu;