cmpxchg_relaxed
_pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
_pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
_pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
_pcp_protect_return(cmpxchg_relaxed, pcp, o, n)
pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
} while (cmpxchg_relaxed(oldp, state, new) != state);
pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
!cmpxchg_relaxed(&cpu_data[cpu].asid_cache, old_active_mmid, ctx)) {
old = cmpxchg_relaxed(&cmdq->q.llq.val, llq.val, head.val);
old = cmpxchg_relaxed(ptep, curr, new);
if (!_io_pte_none(pte) && cmpxchg_relaxed(ptr + i, pte, 0) == pte)
if (cmpxchg_relaxed(ptr, old, pte) != old) {
if (cmpxchg_relaxed(ptr, old, pte) != old)
if (cmpxchg_relaxed(ptr, old, 0) != old)
old = cmpxchg_relaxed((unsigned long *)ddtp, ddt, new);
if (!cmpxchg_relaxed(&tbl_registered, 0, 1))
cmpxchg_relaxed(flag, 0, 1) == 0,
KCSAN_EXPECT_READ_BARRIER(cmpxchg_relaxed(&test_var, 0, 0), false);
KCSAN_EXPECT_WRITE_BARRIER(cmpxchg_relaxed(&test_var, 0, 0), false);
KCSAN_EXPECT_RW_BARRIER(cmpxchg_relaxed(&test_var, 0, 0), false);
if (cmpxchg_relaxed(&rtrcp_chker->rtc_assigner, NULL, rtrcp) ||
cmpxchg_relaxed(&rtp->rtort_chkp, NULL, rtrcp))
(void)cmpxchg_relaxed(&rtrcp_chker->rtc_assigner, rtrcp, NULL); // Back out.
if (unlikely(cmpxchg_relaxed(&node->next, NULL, WAKE_Q_TAIL)))
prev = cmpxchg_relaxed(&highest, curr, used);