Symbol: cmd_tbl
drivers/ata/acard-ahci.c
182
static unsigned int acard_ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
drivers/ata/acard-ahci.c
185
struct acard_sg *acard_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
drivers/ata/acard-ahci.c
216
void *cmd_tbl;
drivers/ata/acard-ahci.c
224
cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;
drivers/ata/acard-ahci.c
226
ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);
drivers/ata/acard-ahci.c
228
memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
drivers/ata/acard-ahci.c
229
memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
drivers/ata/acard-ahci.c
233
acard_ahci_fill_sg(qc, cmd_tbl);
drivers/ata/acard-ahci.c
336
pp->cmd_tbl = mem;
drivers/ata/ahci.h
311
void *cmd_tbl;
drivers/ata/libahci.c
1419
u8 *fis = pp->cmd_tbl;
drivers/ata/libahci.c
1656
static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
drivers/ata/libahci.c
1659
struct ahci_sg *ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
drivers/ata/libahci.c
1693
void *cmd_tbl;
drivers/ata/libahci.c
1702
cmd_tbl = pp->cmd_tbl + qc->hw_tag * AHCI_CMD_TBL_SZ;
drivers/ata/libahci.c
1704
ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, cmd_tbl);
drivers/ata/libahci.c
1706
memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
drivers/ata/libahci.c
1707
memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
drivers/ata/libahci.c
1712
n_elem = ahci_fill_sg(qc, cmd_tbl);
drivers/ata/libahci.c
2555
pp->cmd_tbl = mem;
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
737
if (!bp->cmd_tbl.transmitter_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
740
return bp->cmd_tbl.transmitter_control(bp, cntl);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
749
if (!bp->cmd_tbl.select_crtc_source)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
752
return bp->cmd_tbl.select_crtc_source(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
762
if (!bp->cmd_tbl.dac1_encoder_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
765
return bp->cmd_tbl.dac1_encoder_control(
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
769
if (!bp->cmd_tbl.dac2_encoder_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
772
return bp->cmd_tbl.dac2_encoder_control(
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
777
if (!bp->cmd_tbl.dig_encoder_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
780
return bp->cmd_tbl.dig_encoder_control(bp, cntl);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
803
if (!bp->cmd_tbl.dac_load_detection)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
818
bp_result = bp->cmd_tbl.dac_load_detection(bp, &bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
837
if (!bp->cmd_tbl.adjust_display_pll)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
840
return bp->cmd_tbl.adjust_display_pll(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
849
if (!bp->cmd_tbl.set_pixel_clock)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
852
return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
861
if (!bp->cmd_tbl.set_dce_clock)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
864
return bp->cmd_tbl.set_dce_clock(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
874
if (!bp->cmd_tbl.enable_spread_spectrum_on_ppll)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
877
return bp->cmd_tbl.enable_spread_spectrum_on_ppll(
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
888
if (!bp->cmd_tbl.set_crtc_timing)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
891
return bp->cmd_tbl.set_crtc_timing(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
900
if (!bp->cmd_tbl.program_clock)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
903
return bp->cmd_tbl.program_clock(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
915
if (!bp->cmd_tbl.enable_crtc)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
918
return bp->cmd_tbl.enable_crtc(bp, id, enable);
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
928
if (!bp->cmd_tbl.enable_disp_power_gating)
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
931
return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1619
if (!bp->cmd_tbl.transmitter_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1622
return bp->cmd_tbl.transmitter_control(bp, cntl);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1631
if (!bp->cmd_tbl.dig_encoder_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1634
return bp->cmd_tbl.dig_encoder_control(bp, cntl);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1643
if (!bp->cmd_tbl.set_pixel_clock)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1646
return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1655
if (!bp->cmd_tbl.set_dce_clock)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1658
return bp->cmd_tbl.set_dce_clock(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1667
if (!bp->cmd_tbl.set_crtc_timing)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1670
return bp->cmd_tbl.set_crtc_timing(bp, bp_params);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1680
if (!bp->cmd_tbl.enable_crtc)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1683
return bp->cmd_tbl.enable_crtc(bp, id, enable);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1693
if (!bp->cmd_tbl.enable_disp_power_gating)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1696
return bp->cmd_tbl.enable_disp_power_gating(bp, controller_id,
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1708
if (!bp->cmd_tbl.enable_lvtma_control)
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1711
return bp->cmd_tbl.enable_lvtma_control(bp, uc_pwr_on, pwrseq_instance, bypass_panel_control_wait);
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1817
if (bp->cmd_tbl.get_smu_clock_info != NULL) {
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1820
bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1904
if (bp->cmd_tbl.get_smu_clock_info != NULL) {
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1907
bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
1910
bp->cmd_tbl.get_smu_clock_info(bp, SMU11_SYSPLL3_0_ID) * 10;
drivers/gpu/drm/amd/display/dc/bios/bios_parser_types_internal.h
63
struct cmd_tbl cmd_tbl;
drivers/gpu/drm/amd/display/dc/bios/bios_parser_types_internal2.h
66
struct cmd_tbl cmd_tbl;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
129
bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v3;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1304
bp->cmd_tbl.enable_spread_spectrum_on_ppll =
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1308
bp->cmd_tbl.enable_spread_spectrum_on_ppll =
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1312
bp->cmd_tbl.enable_spread_spectrum_on_ppll =
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1318
bp->cmd_tbl.enable_spread_spectrum_on_ppll = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
132
bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v4;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
136
bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v5;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1507
bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v2;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1510
bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v3;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1515
bp->cmd_tbl.adjust_display_pll = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
157
struct cmd_tbl *cmd_tbl = &bp->cmd_tbl;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
160
cmd_tbl->encoder_control_dig1 = encoder_control_dig1_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
162
cmd_tbl->encoder_control_dig1 = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1638
bp->cmd_tbl.select_crtc_source = select_crtc_source_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1641
bp->cmd_tbl.select_crtc_source = select_crtc_source_v2;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1644
bp->cmd_tbl.select_crtc_source = select_crtc_source_v3;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1647
bp->cmd_tbl.select_crtc_source = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
165
cmd_tbl->encoder_control_dig2 = encoder_control_dig2_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
167
cmd_tbl->encoder_control_dig2 = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
169
cmd_tbl->dig_encoder_control = encoder_control_dig_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
177
struct cmd_tbl *cmd_tbl = &bp->cmd_tbl;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
182
if (cmd_tbl->encoder_control_dig1 != NULL)
drivers/gpu/drm/amd/display/dc/bios/command_table.c
184
cmd_tbl->encoder_control_dig1(bp, cntl);
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1854
bp->cmd_tbl.dac1_encoder_control = dac1_encoder_control_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1857
bp->cmd_tbl.dac1_encoder_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1862
bp->cmd_tbl.dac2_encoder_control = dac2_encoder_control_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1865
bp->cmd_tbl.dac2_encoder_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
187
if (cmd_tbl->encoder_control_dig2 != NULL)
drivers/gpu/drm/amd/display/dc/bios/command_table.c
189
cmd_tbl->encoder_control_dig2(bp, cntl);
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1953
bp->cmd_tbl.dac_load_detection = dac_load_detection_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
1957
bp->cmd_tbl.dac_load_detection = dac_load_detection_v3;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2040
bp->cmd_tbl.dac1_output_control = dac1_output_control_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2043
bp->cmd_tbl.dac1_output_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2048
bp->cmd_tbl.dac2_output_control = dac2_output_control_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2051
bp->cmd_tbl.dac2_output_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2112
bp->cmd_tbl.set_crtc_timing =
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2118
bp->cmd_tbl.set_crtc_timing = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2124
bp->cmd_tbl.set_crtc_timing = set_crtc_timing_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2129
bp->cmd_tbl.set_crtc_timing = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2305
bp->cmd_tbl.enable_crtc = enable_crtc_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2310
bp->cmd_tbl.enable_crtc = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2357
bp->cmd_tbl.enable_crtc_mem_req = enable_crtc_mem_req_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2360
bp->cmd_tbl.enable_crtc_mem_req = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2410
bp->cmd_tbl.program_clock = program_clock_v5;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2413
bp->cmd_tbl.program_clock = program_clock_v6;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2418
bp->cmd_tbl.program_clock = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2510
bp->cmd_tbl.external_encoder_control =
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2514
bp->cmd_tbl.external_encoder_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2638
bp->cmd_tbl.enable_disp_power_gating =
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2644
bp->cmd_tbl.enable_disp_power_gating = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2688
bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
2693
bp->cmd_tbl.set_dce_clock = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
413
bp->cmd_tbl.transmitter_control = transmitter_control_v2;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
416
bp->cmd_tbl.transmitter_control = transmitter_control_v3;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
419
bp->cmd_tbl.transmitter_control = transmitter_control_v4;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
422
bp->cmd_tbl.transmitter_control = transmitter_control_v1_5;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
425
bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
429
bp->cmd_tbl.transmitter_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
959
bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v3;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
962
bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v5;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
965
bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v6;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
968
bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
drivers/gpu/drm/amd/display/dc/bios/command_table.c
973
bp->cmd_tbl.set_pixel_clock = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
101
bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
1024
bp->cmd_tbl.enable_lvtma_control = enable_lvtma_control;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
104
bp->cmd_tbl.dig_encoder_control = encoder_control_fallback;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
235
bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
238
bp->cmd_tbl.transmitter_control = transmitter_control_v1_7;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
241
bp->cmd_tbl.transmitter_control = transmitter_control_fallback;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
453
bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
456
bp->cmd_tbl.set_pixel_clock = set_pixel_clock_fallback;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
596
bp->cmd_tbl.set_crtc_timing =
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
600
bp->cmd_tbl.set_crtc_timing = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
713
bp->cmd_tbl.enable_crtc = enable_crtc_v1;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
716
bp->cmd_tbl.enable_crtc = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
773
bp->cmd_tbl.external_encoder_control =
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
777
bp->cmd_tbl.external_encoder_control = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
813
bp->cmd_tbl.enable_disp_power_gating =
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
819
bp->cmd_tbl.enable_disp_power_gating = enable_disp_power_gating_fallback;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
904
bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
907
bp->cmd_tbl.set_dce_clock = NULL;
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
985
bp->cmd_tbl.get_smu_clock_info = get_smu_clock_info_v3_1;
drivers/scsi/mvsas/mv_sas.c
339
hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
drivers/scsi/mvsas/mv_sas.c
479
hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
drivers/scsi/mvsas/mv_sas.c
592
hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
drivers/scsi/mvsas/mv_sas.h
188
__le64 cmd_tbl; /* command table address */