drivers/dma/switchtec_dma.c

398

return channel_op(swdma_chan, ENABLE_CHAN);

drivers/dma/switchtec_dma.c

403

return channel_op(swdma_chan, DISABLE_CHAN);

drivers/gpu/host1x/dev.h

153

const struct host1x_channel_ops *channel_op;

drivers/gpu/host1x/dev.h

268

return host->channel_op->init(channel, host, id);

drivers/gpu/host1x/dev.h

274

return host->channel_op->submit(job);

drivers/gpu/host1x/hw/host1x01.c

25

host->channel_op = &host1x_channel_ops;

drivers/gpu/host1x/hw/host1x02.c

25

host->channel_op = &host1x_channel_ops;

drivers/gpu/host1x/hw/host1x04.c

25

host->channel_op = &host1x_channel_ops;

drivers/gpu/host1x/hw/host1x05.c

25

host->channel_op = &host1x_channel_ops;

drivers/gpu/host1x/hw/host1x06.c

25

host->channel_op = &host1x_channel_ops;

drivers/gpu/host1x/hw/host1x07.c

25

host->channel_op = &host1x_channel_ops;

drivers/gpu/host1x/hw/host1x08.c

25

host->channel_op = &host1x_channel_ops;