clockman_read
u32 pwr = clockman_read(clockman, data->pwr_reg);
if (!(clockman_read(clockman, data->cs_reg) & PLL_CS_LOCK)) {
fbdiv_frac = clockman_read(clockman, data->fbdiv_frac_reg);
clockman_read(clockman, data->cs_reg) |
fbdiv_int = clockman_read(clockman, data->fbdiv_int_reg);
fbdiv_frac = clockman_read(clockman, data->fbdiv_frac_reg);
prim = clockman_read(clockman, data->ctrl_reg);
prim = clockman_read(clockman, data->ctrl_reg);
return !!(clockman_read(clockman, data->ph_reg) & PLL_PH_EN);
ph_reg = clockman_read(clockman, data->ph_reg);
clockman_read(clockman, data->ph_reg) & ~PLL_PH_EN);
return !(clockman_read(clockman, data->ctrl_reg) & PLL_SEC_RST);
WARN_ON(!(clockman_read(clockman, data->ctrl_reg) & PLL_SEC_IMPL));
clockman_read(clockman, data->ctrl_reg) & ~PLL_SEC_RST);
clockman_read(clockman, data->ctrl_reg) | PLL_SEC_RST);
sec = clockman_read(clockman, data->ctrl_reg);
return !!(clockman_read(clockman, data->ctrl_reg) & CLK_CTRL_ENABLE);
div = clockman_read(clockman, data->div_int_reg);
clockman_read(clockman, data->div_frac_reg) : 0;
clockman_read(clockman, data->ctrl_reg) | CLK_CTRL_ENABLE);
clockman_read(clockman, GPCLK_OE_CTRL) | data->oe_mask);
clockman_read(clockman, data->ctrl_reg) & ~CLK_CTRL_ENABLE);
clockman_read(clockman, GPCLK_OE_CTRL) & ~data->oe_mask);
sel = clockman_read(clockman, data->sel_reg);
ctrl = clockman_read(clockman, data->ctrl_reg);
ctrl = clockman_read(clockman, data->ctrl_reg);
ctrl = clockman_read(clockman, data->ctrl_reg);