clk_set_rate_exclusive
EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
ret = clk_set_rate_exclusive(backend->mod_clk, 300000000);
ret = clk_set_rate_exclusive(drc->mod_clk, 300000000);
clk_set_rate_exclusive(dsi->mod_clk, 297000000);
ret = clk_set_rate_exclusive(i2c_dev->bus_clk, bus_clk_rate);
ret = clk_set_rate_exclusive(csi_dev->clock_mod,
ret = clk_set_rate_exclusive(csi2_dev->clock_mod, 297000000);
ret = clk_set_rate_exclusive(csi2_dev->clock_mod, 297000000);
ret = clk_set_rate_exclusive(dev->mod_clk, 300000000);
clk_set_rate_exclusive(dphy->mod_clk, 150000000);
ret = clk_set_rate_exclusive(isp_dev->clock_mod, 297000000);
int clk_set_rate_exclusive(struct clk *clk, unsigned long rate);
ret = clk_set_rate_exclusive(i2s->i2smclk, freq);
ret = clk_set_rate_exclusive(sai->sai_mclk, freq);
ret = (aif->open_streams ? clk_set_rate : clk_set_rate_exclusive)(scodec->clk_module,