Symbol: clk_register_divider
arch/powerpc/platforms/512x/clock-commonclk.c
239
return clk_register_divider(NULL, name, parent_name, clkflags,
drivers/clk/davinci/pll.c
559
return clk_register_divider(dev, name, OSCIN_CLK_NAME, 0, base + BPDIV,
drivers/clk/keystone/pll.c
282
clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,
drivers/clk/microchip/clk-pic32mzda.c
192
clks[FRCDIVCLK] = clk_register_divider(&pdev->dev, "frcdiv_clk",
drivers/clk/mmp/clk.c
160
clk = clk_register_divider(NULL, clks[i].name,
drivers/clk/pistachio/clk.c
99
clk = clk_register_divider(NULL, div[i].name, div[i].parent,
drivers/clk/renesas/clk-emev2.c
73
clk = clk_register_divider(NULL, np->name, parent_name, 0,
drivers/clk/rockchip/clk.c
560
clk = clk_register_divider(NULL, list->name,
drivers/clk/spear/spear3xx_clock.c
429
clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",
drivers/clk/spear/spear3xx_clock.c
563
clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",
drivers/clk/spear/spear6xx_clock.c
155
clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",
drivers/clk/spear/spear6xx_clock.c
282
clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",
drivers/clk/sunxi/clk-a10-pll2.c
62
prediv_clk = clk_register_divider(NULL, "pll2-prediv",
drivers/clk/sunxi/clk-sun8i-apb0.c
37
clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,
drivers/clk/tegra/clk-tegra-super-gen4.c
117
clk = clk_register_divider(NULL, "sclk", "sclk_mux",
drivers/clk/tegra/clk-tegra-super-gen4.c
141
clk = clk_register_divider(NULL, "hclk_div", "sclk", 0,
drivers/clk/tegra/clk-tegra-super-gen4.c
156
clk = clk_register_divider(NULL, "pclk_div", "hclk", 0,
drivers/clk/tegra/clk-tegra20.c
815
clk_register_divider(NULL, "dev1_osc_div", "clk_m",
drivers/clk/tegra/clk-tegra20.c
821
clk_register_divider(NULL, "dev2_osc_div", "clk_m",
drivers/clk/ti/adpll.c
251
clock = clk_register_divider(d->dev, child_name, parent_name, 0,
drivers/clk/zynq/clkc.c
138
clk_register_divider(NULL, div0_name, mux_name,
drivers/clk/zynq/clkc.c
142
clk_register_divider(NULL, div1_name, div0_name,
drivers/clk/zynq/clkc.c
194
clk_register_divider(NULL, div_name, mux_name, 0, clk_ctrl, 8, 6,
drivers/clk/zynq/clkc.c
281
clk_register_divider(NULL, "cpu_div", "cpu_mux", 0,
drivers/clk/zynq/clkc.c
325
clk_register_divider(NULL, "ddr2x_div", "ddrpll", 0,
drivers/clk/zynq/clkc.c
331
clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0,
drivers/clk/zynq/clkc.c
338
clk_register_divider(NULL, "dci_div0", "ddrpll", 0,
drivers/clk/zynq/clkc.c
341
clk_register_divider(NULL, "dci_div1", "dci_div0",
drivers/clk/zynq/clkc.c
390
clk_register_divider(NULL, "gem0_div0", "gem0_mux", 0,
drivers/clk/zynq/clkc.c
393
clk_register_divider(NULL, "gem0_div1", "gem0_div0",
drivers/clk/zynq/clkc.c
415
clk_register_divider(NULL, "gem1_div0", "gem1_mux", 0,
drivers/clk/zynq/clkc.c
418
clk_register_divider(NULL, "gem1_div1", "gem1_div0",
drivers/clk/zynq/clkc.c
444
clk_register_divider(NULL, "can_div0", "can_mux", 0,
drivers/clk/zynq/clkc.c
447
clk_register_divider(NULL, "can_div1", "can_div0",
drivers/clk/zynq/clkc.c
484
clk_register_divider(NULL, "dbg_div", "dbg_mux", 0,
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
319
fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
sound/soc/mxs/mxs-saif.c
762
clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk",
sound/soc/samsung/i2s.c
1318
priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,