drivers/clk/clk-pwm.c

105

clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);

drivers/clk/clk-pwm.c

106

if (!clk_pwm)

drivers/clk/clk-pwm.c

119

if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))

drivers/clk/clk-pwm.c

120

clk_pwm->fixed_rate = div64_u64(NSEC_PER_SEC, pargs.period);

drivers/clk/clk-pwm.c

122

if (!clk_pwm->fixed_rate) {

drivers/clk/clk-pwm.c

127

if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&

drivers/clk/clk-pwm.c

128

pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {

drivers/clk/clk-pwm.c

134

pwm_init_state(pwm, &clk_pwm->state);

drivers/clk/clk-pwm.c

135

pwm_set_relative_duty_cycle(&clk_pwm->state, 1, 2);

drivers/clk/clk-pwm.c

136

clk_pwm->state.enabled = true;

drivers/clk/clk-pwm.c

150

clk_pwm->pwm = pwm;

drivers/clk/clk-pwm.c

151

clk_pwm->hw.init = &init;

drivers/clk/clk-pwm.c

152

ret = devm_clk_hw_register(&pdev->dev, &clk_pwm->hw);

drivers/clk/clk-pwm.c

156

return of_clk_add_hw_provider(node, of_clk_hw_simple_get, &clk_pwm->hw);

drivers/clk/clk-pwm.c

21

static inline struct clk_pwm *to_clk_pwm(struct clk_hw *hw)

drivers/clk/clk-pwm.c

23

return container_of(hw, struct clk_pwm, hw);

drivers/clk/clk-pwm.c

28

struct clk_pwm *clk_pwm = to_clk_pwm(hw);

drivers/clk/clk-pwm.c

30

return pwm_apply_atomic(clk_pwm->pwm, &clk_pwm->state);

drivers/clk/clk-pwm.c

35

struct clk_pwm *clk_pwm = to_clk_pwm(hw);

drivers/clk/clk-pwm.c

36

struct pwm_state state = clk_pwm->state;

drivers/clk/clk-pwm.c

40

pwm_apply_atomic(clk_pwm->pwm, &state);

drivers/clk/clk-pwm.c

45

struct clk_pwm *clk_pwm = to_clk_pwm(hw);

drivers/clk/clk-pwm.c

47

return pwm_apply_might_sleep(clk_pwm->pwm, &clk_pwm->state);

drivers/clk/clk-pwm.c

52

struct clk_pwm *clk_pwm = to_clk_pwm(hw);

drivers/clk/clk-pwm.c

54

pwm_disable(clk_pwm->pwm);

drivers/clk/clk-pwm.c

60

struct clk_pwm *clk_pwm = to_clk_pwm(hw);

drivers/clk/clk-pwm.c

62

return clk_pwm->fixed_rate;

drivers/clk/clk-pwm.c

67

struct clk_pwm *clk_pwm = to_clk_pwm(hw);

drivers/clk/clk-pwm.c

71

ret = pwm_get_state_hw(clk_pwm->pwm, &state);

drivers/clk/clk-pwm.c

99

struct clk_pwm *clk_pwm;

drivers/clk/sophgo/clk-cv1800.c

1089

[CLK_PWM] = &clk_pwm.common.hw,

drivers/clk/sophgo/clk-cv1800.c

1320

[CLK_PWM] = &clk_pwm.common.hw,

drivers/clk/sophgo/clk-cv1800.c

890

static CV1800_GATE(clk_pwm, clk_pwm_parents,

drivers/pwm/pwm-sprd.c

218

struct clk *clk_pwm;

drivers/pwm/pwm-sprd.c

238

clk_pwm = chn[i].clks[SPRD_PWM_CHN_OUTPUT_CLK].clk;

drivers/pwm/pwm-sprd.c

239

chn[i].clk_rate = clk_get_rate(clk_pwm);