drivers/clk/sunxi/clk-usb.c

113

qty = find_last_bit((unsigned long *)&data->clk_mask,

drivers/clk/sunxi/clk-usb.c

126

for_each_set_bit(i, (unsigned long *)&data->clk_mask,

drivers/clk/sunxi/clk-usb.c

169

.clk_mask = BIT(8) | BIT(7) | BIT(6),

drivers/clk/sunxi/clk-usb.c

182

.clk_mask = BIT(8) | BIT(6),

drivers/clk/sunxi/clk-usb.c

193

.clk_mask = BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8),

drivers/clk/sunxi/clk-usb.c

204

.clk_mask = BIT(16) | BIT(11) | BIT(10) | BIT(9) | BIT(8),

drivers/clk/sunxi/clk-usb.c

215

.clk_mask = BIT(19) | BIT(18) | BIT(17) | BIT(16) |

drivers/clk/sunxi/clk-usb.c

227

.clk_mask = BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1),

drivers/clk/sunxi/clk-usb.c

241

.clk_mask = BIT(10) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1),

drivers/clk/sunxi/clk-usb.c

80

u32 clk_mask;

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

816

const struct clk_mgr_mask *clk_mask)

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

826

clk_mgr_dce->clk_mgr_mask = clk_mask;

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

849

const struct clk_mgr_mask *clk_mask)

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

863

clk_mgr_dce, ctx, regs, clk_shift, clk_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

872

const struct clk_mgr_mask *clk_mask)

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

886

clk_mgr_dce, ctx, regs, clk_shift, clk_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

897

const struct clk_mgr_mask *clk_mask)

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

911

clk_mgr_dce, ctx, regs, clk_shift, clk_mask);

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2574

memset(smu->user_dpm_profile.clk_mask, 0, sizeof(smu->user_dpm_profile.clk_mask));

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

2609

smu->user_dpm_profile.clk_mask[clk_type] = mask;

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

532

smu->user_dpm_profile.clk_mask[clk_type]) {

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

534

smu->user_dpm_profile.clk_mask[clk_type]);

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

244

uint32_t clk_mask[SMU_CLK_COUNT];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

447

clk_mask(hwsq, mast, mastm, 0x00000000);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

448

clk_mask(hwsq, divs, divsm, divsv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

449

clk_mask(hwsq, mast, mastm, mastv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

455

clk_mask(hwsq, mast, 0x001000b0, 0x00100080);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

457

clk_mask(hwsq, mast, 0x000000b3, 0x00000081);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

464

clk_mask(hwsq, nvpll[0], 0xc03f0100,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

466

clk_mask(hwsq, nvpll[1], 0x0000ffff, (N << 8) | M);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

475

clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

476

clk_mask(hwsq, mast, 0x00100033, 0x00000023);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

482

clk_mask(hwsq, spll[0], 0xc03f0100,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

484

clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

485

clk_mask(hwsq, mast, 0x00100033, 0x00000033);

drivers/gpu/drm/radeon/radeon_combios.c

401

u32 clk_mask,

drivers/gpu/drm/radeon/radeon_combios.c

505

if (clk_mask && data_mask) {

drivers/gpu/drm/radeon/radeon_combios.c

507

i2c.mask_clk_mask = clk_mask;

drivers/gpu/drm/radeon/radeon_combios.c

509

i2c.a_clk_mask = clk_mask;

drivers/gpu/drm/radeon/radeon_combios.c

511

i2c.en_clk_mask = clk_mask;

drivers/gpu/drm/radeon/radeon_combios.c

513

i2c.y_clk_mask = clk_mask;

drivers/pmdomain/imx/imx8m-blk-ctrl.c

111

regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

156

regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

457

.clk_mask = BIT(1),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

465

.clk_mask = BIT(0),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

47

u32 clk_mask;

drivers/pmdomain/imx/imx8m-blk-ctrl.c

473

.clk_mask = BIT(2),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

491

.clk_mask = BIT(1),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

501

.clk_mask = BIT(0),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

511

.clk_mask = BIT(2),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

557

.clk_mask = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

564

.clk_mask = BIT(6) | BIT(7),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

572

.clk_mask = BIT(8) | BIT(9),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

581

.clk_mask = BIT(10) | BIT(11),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

626

.clk_mask = BIT(0) | BIT(1),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

635

.clk_mask = BIT(2) | BIT(3),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

644

.clk_mask = BIT(4) | BIT(5),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

653

.clk_mask = BIT(6) | BIT(7),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

724

.clk_mask = BIT(0) | BIT(1),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

733

.clk_mask = BIT(2) | BIT(3),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

742

.clk_mask = BIT(4) | BIT(5) | BIT(23),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

752

.clk_mask = BIT(6) | BIT(7),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

762

.clk_mask = BIT(9) | BIT(10),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

771

.clk_mask = BIT(11) | BIT(12) | BIT(24),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

781

.clk_mask = BIT(16) | BIT(17) | BIT(18),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

791

.clk_mask = BIT(19) | BIT(20) | BIT(21),

drivers/pmdomain/imx/imx8m-blk-ctrl.c

801

.clk_mask = BIT(22),

drivers/pmdomain/imx/imx93-blk-ctrl.c

154

regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);

drivers/pmdomain/imx/imx93-blk-ctrl.c

180

regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);

drivers/pmdomain/imx/imx93-blk-ctrl.c

334

.clk_mask = BIT(11) | BIT(12),

drivers/pmdomain/imx/imx93-blk-ctrl.c

341

.clk_mask = BIT(9) | BIT(10),

drivers/pmdomain/imx/imx93-blk-ctrl.c

348

.clk_mask = BIT(7) | BIT(8),

drivers/pmdomain/imx/imx93-blk-ctrl.c

369

.clk_mask = BIT(4) | BIT(5) | BIT(6),

drivers/pmdomain/imx/imx93-blk-ctrl.c

385

.clk_mask = BIT(2) | BIT(3),

drivers/pmdomain/imx/imx93-blk-ctrl.c

75

u32 clk_mask;

sound/pci/ice1712/ak4xxx.c

77

tmp &= ~priv->clk_mask;

sound/pci/ice1712/ak4xxx.c

88

tmp |= priv->clk_mask;

sound/pci/ice1712/delta.c

438

.clk_mask = ICE1712_DELTA_AP_CCLK,

sound/pci/ice1712/delta.c

459

.clk_mask = ICE1712_DELTA_AP_CCLK,

sound/pci/ice1712/delta.c

481

.clk_mask = ICE1712_DELTA_1010LT_CCLK,

sound/pci/ice1712/delta.c

503

.clk_mask = ICE1712_DELTA_66E_CCLK,

sound/pci/ice1712/delta.c

526

.clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,

sound/pci/ice1712/delta.c

548

.clk_mask = ICE1712_VX442_CCLK,

sound/pci/ice1712/ews.c

342

.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,

sound/pci/ice1712/ews.c

363

.clk_mask = ICE1712_EWS88_SERIAL_CLOCK,

sound/pci/ice1712/ews.c

384

.clk_mask = ICE1712_6FIRE_SERIAL_CLOCK,

sound/pci/ice1712/hoontech.c

287

.clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,

sound/pci/ice1712/ice1712.h

255

unsigned int clk_mask; /* CLK gpio bit */

sound/pci/ice1712/phase.c

101

.clk_mask = 1 << 5,

sound/pci/ice1712/revo.c

237

.clk_mask = VT1724_REVO_CCLK,

sound/pci/ice1712/revo.c

259

.clk_mask = VT1724_REVO_CCLK,

sound/pci/ice1712/revo.c

280

.clk_mask = VT1724_REVO_CCLK,

sound/pci/ice1712/revo.c

298

.clk_mask = VT1724_REVO_CCLK,

sound/pci/ice1712/revo.c

348

.clk_mask = VT1724_REVO_CCLK,