drivers/clk/aspeed/clk-aspeed.c

451

hw = clk_hw_register_divider_table(dev, "sd_extclk", "sd_extclk_gate",

drivers/clk/aspeed/clk-aspeed.c

460

hw = clk_hw_register_divider_table(dev, "mac", "hpll", 0,

drivers/clk/aspeed/clk-aspeed.c

493

hw = clk_hw_register_divider_table(dev, "lhclk", "hpll", 0,

drivers/clk/aspeed/clk-aspeed.c

502

hw = clk_hw_register_divider_table(dev, "bclk", "hpll", 0,

drivers/clk/aspeed/clk-aspeed.c

525

hw = clk_hw_register_divider_table(dev, "eclk", "eclk-mux", 0,

drivers/clk/aspeed/clk-aspeed.c

646

hw = clk_hw_register_divider_table(NULL, "apb", "hpll", 0,

drivers/clk/aspeed/clk-ast2600.c

555

hw = clk_hw_register_divider_table(dev, "emmc_extclk",

drivers/clk/aspeed/clk-ast2600.c

571

hw = clk_hw_register_divider_table(dev, "sd_extclk", "sd_extclk_gate",

drivers/clk/aspeed/clk-ast2600.c

585

hw = clk_hw_register_divider_table(dev, "mac12", "hpll", 0,

drivers/clk/aspeed/clk-ast2600.c

615

hw = clk_hw_register_divider_table(dev, "mac34", "hpll", 0,

drivers/clk/aspeed/clk-ast2600.c

640

hw = clk_hw_register_divider_table(dev, "lhclk", "hpll", 0,

drivers/clk/aspeed/clk-ast2600.c

663

hw = clk_hw_register_divider_table(dev, "bclk", "epll", 0,

drivers/clk/aspeed/clk-ast2600.c

681

hw = clk_hw_register_divider_table(dev, "eclk", NULL, 0,

drivers/clk/clk-clps711x.c

118

clk_hw_register_divider_table(NULL, "timer1", "timer_ref", 0,

drivers/clk/clk-clps711x.c

122

clk_hw_register_divider_table(NULL, "timer2", "timer_ref", 0,

drivers/clk/clk-clps711x.c

130

clk_hw_register_divider_table(NULL, "spi", "spi_ref", 0,

drivers/clk/clk-stm32h7.c

513

hws[SYS_D1CPRE] = clk_hw_register_divider_table(NULL, "d1cpre",

drivers/clk/clk-stm32h7.c

517

hws[HCLK] = clk_hw_register_divider_table(NULL, "hclk", "d1cpre",

drivers/clk/clk-stm32h7.c

527

hws[PCLK3] = clk_hw_register_divider_table(NULL, "pclk3", "hclk", 0,

drivers/clk/clk-stm32h7.c

533

hws[PCLK1] = clk_hw_register_divider_table(NULL, "pclk1", "hclk", 0,

drivers/clk/clk-stm32h7.c

542

hws[PCLK2] = clk_hw_register_divider_table(NULL, "pclk2", "hclk", 0,

drivers/clk/clk-stm32h7.c

551

hws[PCLK4] = clk_hw_register_divider_table(NULL, "pclk4", "hclk", 0,

drivers/clk/imx/clk-imx6q.c

544

hws[IMX6QDL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,

drivers/clk/imx/clk-imx6q.c

597

hws[IMX6QDL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6q.c

602

hws[IMX6QDL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6q.c

603

hws[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6sl.c

266

hws[IMX6SL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6sl.c

268

hws[IMX6SL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6sl.c

269

hws[IMX6SL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6sl.c

270

hws[IMX6SL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, base + 0xe0, 0, 2, 0, clk_enet_ref_table, &imx_ccm_lock);

drivers/clk/imx/clk-imx6sll.c

174

hws[IMX6SLL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio",

drivers/clk/imx/clk-imx6sll.c

178

hws[IMX6SLL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video",

drivers/clk/imx/clk-imx6sll.c

180

hws[IMX6SLL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div",

drivers/clk/imx/clk-imx6sx.c

218

hws[IMX6SX_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,

drivers/clk/imx/clk-imx6sx.c

221

hws[IMX6SX_CLK_ENET2_REF] = clk_hw_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0,

drivers/clk/imx/clk-imx6sx.c

247

hws[IMX6SX_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio",

drivers/clk/imx/clk-imx6sx.c

251

hws[IMX6SX_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video",

drivers/clk/imx/clk-imx6sx.c

253

hws[IMX6SX_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div",

drivers/clk/imx/clk-imx6ul.c

221

hws[IMX6UL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet1_ref", "pll6_enet", 0,

drivers/clk/imx/clk-imx6ul.c

223

hws[IMX6UL_CLK_ENET2_REF] = clk_hw_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0,

drivers/clk/imx/clk-imx6ul.c

231

hws[IMX6UL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio",

drivers/clk/imx/clk-imx6ul.c

235

hws[IMX6UL_CLK_PLL5_POST_DIV] = clk_hw_register_divider_table(NULL, "pll5_post_div", "pll5_video",

drivers/clk/imx/clk-imx6ul.c

237

hws[IMX6UL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div",

drivers/clk/imx/clk-imx7d.c

428

hws[IMX7D_PLL_DRAM_TEST_DIV] = clk_hw_register_divider_table(NULL, "pll_dram_test_div", "pll_dram_main_bypass",

drivers/clk/imx/clk-imx7d.c

430

hws[IMX7D_PLL_AUDIO_TEST_DIV] = clk_hw_register_divider_table(NULL, "pll_audio_test_div", "pll_audio_main_clk",

drivers/clk/imx/clk-imx7d.c

432

hws[IMX7D_PLL_AUDIO_POST_DIV] = clk_hw_register_divider_table(NULL, "pll_audio_post_div", "pll_audio_test_div",

drivers/clk/imx/clk-imx7d.c

434

hws[IMX7D_PLL_VIDEO_TEST_DIV] = clk_hw_register_divider_table(NULL, "pll_video_test_div", "pll_video_main_clk",

drivers/clk/imx/clk-imx7d.c

436

hws[IMX7D_PLL_VIDEO_POST_DIV] = clk_hw_register_divider_table(NULL, "pll_video_post_div", "pll_video_test_div",

drivers/clk/renesas/rzg2l-cpg.c

452

clk_hw = clk_hw_register_divider_table(dev, core->name,

drivers/clk/samsung/clk.c

222

clk_hw = clk_hw_register_divider_table(ctx->dev,

drivers/clk/stm32/clk-stm32mp1.c

430

return clk_hw_register_divider_table(dev,