drivers/media/i2c/alvium-csi2.h

25

#define REG_BCRM_V4L2_32BIT(n) (REG_BCRM_V4L2 | CCI_REG32(n))

drivers/media/i2c/ccs/ccs-regs.h

284

#define CCS_R_REQUESTED_LINK_RATE CCI_REG32(0x0820)

drivers/media/i2c/ccs/ccs-regs.h

480

#define CCS_R_ADC_BIT_DEPTH_CAPABILITY CCI_REG32(0x10f4)

drivers/media/i2c/ccs/ccs-regs.h

481

#define CCS_R_MIN_EXT_CLK_FREQ_MHZ (CCI_REG32(0x1100) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

482

#define CCS_R_MAX_EXT_CLK_FREQ_MHZ (CCI_REG32(0x1104) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

485

#define CCS_R_MIN_PLL_IP_CLK_FREQ_MHZ (CCI_REG32(0x110c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

486

#define CCS_R_MAX_PLL_IP_CLK_FREQ_MHZ (CCI_REG32(0x1110) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

489

#define CCS_R_MIN_PLL_OP_CLK_FREQ_MHZ (CCI_REG32(0x1118) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

490

#define CCS_R_MAX_PLL_OP_CLK_FREQ_MHZ (CCI_REG32(0x111c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

493

#define CCS_R_MIN_VT_SYS_CLK_FREQ_MHZ (CCI_REG32(0x1124) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

494

#define CCS_R_MAX_VT_SYS_CLK_FREQ_MHZ (CCI_REG32(0x1128) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

495

#define CCS_R_MIN_VT_PIX_CLK_FREQ_MHZ (CCI_REG32(0x112c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

496

#define CCS_R_MAX_VT_PIX_CLK_FREQ_MHZ (CCI_REG32(0x1130) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

51

#define CCS_R_SERIAL_NUMBER CCI_REG32(0x001c)

drivers/media/i2c/ccs/ccs-regs.h

526

#define CCS_R_MIN_OP_SYS_CLK_FREQ_MHZ (CCI_REG32(0x1164) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

527

#define CCS_R_MAX_OP_SYS_CLK_FREQ_MHZ (CCI_REG32(0x1168) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

530

#define CCS_R_MIN_OP_PIX_CLK_FREQ_MHZ (CCI_REG32(0x1170) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

531

#define CCS_R_MAX_OP_PIX_CLK_FREQ_MHZ (CCI_REG32(0x1174) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

555

#define CCS_R_MIN_OP_PLL_IP_CLK_FREQ_MHZ (CCI_REG32(0x11a4) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

556

#define CCS_R_MAX_OP_PLL_IP_CLK_FREQ_MHZ (CCI_REG32(0x11a8) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

559

#define CCS_R_MIN_OP_PLL_OP_CLK_FREQ_MHZ (CCI_REG32(0x11b0) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

560

#define CCS_R_MAX_OP_PLL_OP_CLK_FREQ_MHZ (CCI_REG32(0x11b4) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

644

#define CCS_R_MIN_OP_SYS_CLK_FREQ_REV_MHZ (CCI_REG32(0x123c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

645

#define CCS_R_MAX_OP_SYS_CLK_FREQ_REV_MHZ (CCI_REG32(0x1240) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

646

#define CCS_R_MIN_OP_PIX_CLK_FREQ_REV_MHZ (CCI_REG32(0x1244) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

647

#define CCS_R_MAX_OP_PIX_CLK_FREQ_REV_MHZ (CCI_REG32(0x1248) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

648

#define CCS_R_MAX_BITRATE_REV_D_MODE_MBPS (CCI_REG32(0x124c) | CCS_FL_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

649

#define CCS_R_MAX_SYMRATE_REV_C_MODE_MSPS (CCI_REG32(0x1250) | CCS_FL_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

65

#define CCS_R_FRAME_FORMAT_DESCRIPTOR_4(n) CCI_REG32(0x0060 + (n) * 4)

drivers/media/i2c/ccs/ccs-regs.h

722

#define CCS_R_MAX_PER_LANE_BITRATE_LANE_D_MODE_MBPS(n) (CCI_REG32(0x1608 + ((n) < 4 ? (n) * 4 : 0x32 + ((n) - 4) * 4)) | CCS_FL_IREAL)

drivers/media/i2c/ccs/ccs-regs.h

729

#define CCS_R_MAX_PER_LANE_BITRATE_LANE_C_MODE_MBPS(n) (CCI_REG32(0x161a + ((n) < 4 ? (n) * 4 : 0x30 + ((n) - 4) * 4)) | CCS_FL_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

142

#define SMIAPP_REG_U32_REQUESTED_LINK_BIT_RATE_MBPS CCI_REG32(0x0820)

drivers/media/i2c/ccs/smiapp-reg-defs.h

37

#define SMIAPP_REG_U32_SERIAL_NUMBER CCI_REG32(0x001c)

drivers/media/i2c/ccs/smiapp-reg-defs.h

378

#define SMIAPP_REG_F32_MIN_EXT_CLK_FREQ_HZ (CCI_REG32(0x1100) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

379

#define SMIAPP_REG_F32_MAX_EXT_CLK_FREQ_HZ (CCI_REG32(0x1104) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

382

#define SMIAPP_REG_F32_MIN_PLL_IP_FREQ_HZ (CCI_REG32(0x110c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

383

#define SMIAPP_REG_F32_MAX_PLL_IP_FREQ_HZ (CCI_REG32(0x1110) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

386

#define SMIAPP_REG_F32_MIN_PLL_OP_FREQ_HZ (CCI_REG32(0x1118) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

387

#define SMIAPP_REG_F32_MAX_PLL_OP_FREQ_HZ (CCI_REG32(0x111c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

390

#define SMIAPP_REG_F32_MIN_VT_SYS_CLK_FREQ_HZ (CCI_REG32(0x1124) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

391

#define SMIAPP_REG_F32_MAX_VT_SYS_CLK_FREQ_HZ (CCI_REG32(0x1128) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

392

#define SMIAPP_REG_F32_MIN_VT_PIX_CLK_FREQ_HZ (CCI_REG32(0x112c) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

393

#define SMIAPP_REG_F32_MAX_VT_PIX_CLK_FREQ_HZ (CCI_REG32(0x1130) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

405

#define SMIAPP_REG_F32_MIN_OP_SYS_CLK_FREQ_HZ (CCI_REG32(0x1164) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

406

#define SMIAPP_REG_F32_MAX_OP_SYS_CLK_FREQ_HZ (CCI_REG32(0x1168) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

409

#define SMIAPP_REG_F32_MIN_OP_PIX_CLK_FREQ_HZ (CCI_REG32(0x1170) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

41

#define SMIAPP_REG_U32_FRAME_FORMAT_DESCRIPTOR_4(n) CCI_REG32(0x0060 + ((n) << 2)) /* 0 <= n <= 7 */

drivers/media/i2c/ccs/smiapp-reg-defs.h

410

#define SMIAPP_REG_F32_MAX_OP_PIX_CLK_FREQ_HZ (CCI_REG32(0x1174) | CCS_FL_FLOAT_IREAL)

drivers/media/i2c/ccs/smiapp-reg-defs.h

447

#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS CCI_REG32(0x1608)

drivers/media/i2c/ccs/smiapp-reg-defs.h

448

#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS CCI_REG32(0x160c)

drivers/media/i2c/ccs/smiapp-reg-defs.h

449

#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS CCI_REG32(0x1610)

drivers/media/i2c/ccs/smiapp-reg-defs.h

450

#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS CCI_REG32(0x1614)

drivers/media/i2c/imx214.c

140

#define IMX214_REG_REQ_LINK_BIT_RATE CCI_REG32(0x0820)

drivers/media/i2c/mt9m114.c

303

#define MT9M114_PATCHLDR_FIRMWARE_ID CCI_REG32(0xe004)

drivers/media/i2c/mt9m114.c

96

#define MT9M114_CAM_SENSOR_CFG_PIXCLK CCI_REG32(0xc808)

drivers/media/i2c/ov02e10.c

36

#define OV02E10_REG_CHIP_ID CCI_REG32(0x00)

drivers/media/i2c/thp7312.c

108

#define THP7312_REG_FW_DRIVABILITY CCI_REG32(0xd65c)

drivers/media/i2c/thp7312.c

109

#define THP7312_REG_FW_DEST_BANK_ADDR CCI_REG32(0xff08)

drivers/media/i2c/thp7312.c

115

#define THP7312_REG_FW_CRC_RESULT CCI_REG32(0xff64)