cik_update_cg
cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false);
cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true);
cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, true);
cik_update_cg(rdev, (RADEON_CG_BLOCK_MC |
cik_update_cg(rdev, (RADEON_CG_BLOCK_MC |
cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, false);
void cik_update_cg(struct radeon_device *rdev, u32 block, bool enable);
cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false);
cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true);
cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);
cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);
extern void cik_update_cg(struct radeon_device *rdev,