Symbol: chan_base
drivers/dma/bcm2835-dma.c
395
void __iomem *chan_base = c->chan_base;
drivers/dma/bcm2835-dma.c
402
if (!readl(chan_base + BCM2835_DMA_ADDR))
drivers/dma/bcm2835-dma.c
406
writel(0, chan_base + BCM2835_DMA_CS);
drivers/dma/bcm2835-dma.c
409
while ((readl(chan_base + BCM2835_DMA_CS) &
drivers/dma/bcm2835-dma.c
418
writel(BCM2835_DMA_RESET, chan_base + BCM2835_DMA_CS);
drivers/dma/bcm2835-dma.c
435
writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
drivers/dma/bcm2835-dma.c
436
writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
drivers/dma/bcm2835-dma.c
448
flags = readl(c->chan_base + BCM2835_DMA_CS);
drivers/dma/bcm2835-dma.c
464
c->chan_base + BCM2835_DMA_CS);
drivers/dma/bcm2835-dma.c
472
} else if (!readl(c->chan_base + BCM2835_DMA_ADDR)) {
drivers/dma/bcm2835-dma.c
567
pos = readl(c->chan_base + BCM2835_DMA_SOURCE_AD);
drivers/dma/bcm2835-dma.c
569
pos = readl(c->chan_base + BCM2835_DMA_DEST_AD);
drivers/dma/bcm2835-dma.c
78
void __iomem *chan_base;
drivers/dma/bcm2835-dma.c
812
c->chan_base = BCM2835_DMA_CHANIO(d->base, chan_id);
drivers/dma/bcm2835-dma.c
818
if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
drivers/dma/bcm2835-dma.c
868
void __iomem *chan_base = c->chan_base;
drivers/dma/bcm2835-dma.c
871
if (readl(chan_base + BCM2835_DMA_ADDR))
drivers/dma/sh/rcar-dmac.c
1848
void __iomem *chan_base;
drivers/dma/sh/rcar-dmac.c
1895
dmac->chan_base = devm_platform_ioremap_resource(pdev, 1);
drivers/dma/sh/rcar-dmac.c
1896
if (IS_ERR(dmac->chan_base))
drivers/dma/sh/rcar-dmac.c
1897
return PTR_ERR(dmac->chan_base);
drivers/dma/sh/rcar-dmac.c
1899
chan_base = dmac->chan_base;
drivers/dma/sh/rcar-dmac.c
1901
chan_base = dmac->dmac_base + data->chan_offset_base;
drivers/dma/sh/rcar-dmac.c
1906
chan->iomem = chan_base + i * data->chan_offset_stride;
drivers/dma/sh/rcar-dmac.c
203
void __iomem *chan_base;
drivers/dma/sh/rcar-dmac.c
347
if (dmac->chan_base)
drivers/dma/sh/rcar-dmac.c
358
if (dmac->chan_base) {
drivers/dma/ste_dma40.c
1182
void __iomem *addr = chan_base(d40c) + reg;
drivers/dma/ste_dma40.c
1279
void __iomem *chanbase = chan_base(d40c);
drivers/dma/ste_dma40.c
1391
void __iomem *chanbase = chan_base(d40c);
drivers/dma/ste_dma40.c
1415
u32 val = readl(chan_base(d40c) + D40_CHAN_REG_SDELT);
drivers/dma/ste_dma40.c
1430
is_link = readl(chan_base(d40c) + D40_CHAN_REG_SDLNK)
drivers/dma/ste_dma40.c
2067
void __iomem *chanbase = chan_base(d40c);
drivers/dma/ste_dma40.c
833
void __iomem *base = chan_base(chan);
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
1314
u16 chan_base; /* Starting channel number */
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
2052
u16 chan_base;
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
2218
u16 chan_base; /* MCS channel base */
drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
405
mcs_set_lmac_channels(req->mcs_id, req->chan_base);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
587
u16 chan_base, chan, bpid;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
611
chan_base = pfvf->rx_chan_base + req->chan_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
612
for (chan = chan_base; chan < (chan_base + req->chan_cnt); chan++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
678
if ((req->chan_base + req->chan_cnt) > NIX_BPIDS_PER_LMAC)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
683
(lmac_id * NIX_BPIDS_PER_LMAC) + req->chan_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
705
if ((req->chan_base + req->chan_cnt) > bp->sdp_bpid_cnt)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
714
bpid = bp->cgx_bpid_cnt + req->chan_base + sdp_chan_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
735
u16 chan_base, chan;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
757
chan_base = pfvf->rx_chan_base + req->chan_base;
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
760
for (chan = chan_base; chan < (chan_base + req->chan_cnt); chan++) {
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
778
rsp->chan_bpid[chan] = ((req->chan_base + chan) & 0x7F) << 10 |
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
114
rsp->chan_base = NIX_CHAN_SDP_CH_START;
drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c
118
rsp->chan_base = hw->sdp_chan_base;
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
1826
req->chan_base = 0;
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
1851
req->chan_base = 0;