Symbol: cci_pmu
drivers/perf/arm-cci.c
1016
struct cci_pmu *cci_pmu = dev;
drivers/perf/arm-cci.c
1017
struct cci_pmu_hw_events *events = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
1023
__cci_pmu_disable(cci_pmu);
drivers/perf/arm-cci.c
1029
for (idx = 0; idx <= CCI_PMU_CNTR_LAST(cci_pmu); idx++) {
drivers/perf/arm-cci.c
1036
if (!(pmu_read_register(cci_pmu, idx, CCI_PMU_OVRFLW) &
drivers/perf/arm-cci.c
1040
pmu_write_register(cci_pmu, CCI_PMU_OVRFLW_FLAG, idx,
drivers/perf/arm-cci.c
1049
__cci_pmu_enable_sync(cci_pmu);
drivers/perf/arm-cci.c
1055
static int cci_pmu_get_hw(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
1057
int ret = pmu_request_irq(cci_pmu, pmu_handle_irq);
drivers/perf/arm-cci.c
1059
pmu_free_irq(cci_pmu);
drivers/perf/arm-cci.c
1065
static void cci_pmu_put_hw(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
1067
pmu_free_irq(cci_pmu);
drivers/perf/arm-cci.c
1072
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1073
atomic_t *active_events = &cci_pmu->active_events;
drivers/perf/arm-cci.c
1074
struct mutex *reserve_mutex = &cci_pmu->reserve_mutex;
drivers/perf/arm-cci.c
1077
cci_pmu_put_hw(cci_pmu);
drivers/perf/arm-cci.c
1084
struct cci_pmu *cci_pmu = to_cci_pmu(pmu);
drivers/perf/arm-cci.c
1085
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
1086
bool enabled = !bitmap_empty(hw_events->used_mask, cci_pmu->num_cntrs);
drivers/perf/arm-cci.c
1093
__cci_pmu_enable_sync(cci_pmu);
drivers/perf/arm-cci.c
1100
struct cci_pmu *cci_pmu = to_cci_pmu(pmu);
drivers/perf/arm-cci.c
1101
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
1105
__cci_pmu_disable(cci_pmu);
drivers/perf/arm-cci.c
1114
static bool pmu_fixed_hw_idx(struct cci_pmu *cci_pmu, int idx)
drivers/perf/arm-cci.c
1116
return (idx >= 0) && (idx < cci_pmu->model->fixed_hw_cntrs);
drivers/perf/arm-cci.c
112
#define to_cci_pmu(c) (container_of(c, struct cci_pmu, pmu))
drivers/perf/arm-cci.c
1121
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1122
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
1136
if (unlikely(!pmu_is_valid_counter(cci_pmu, idx))) {
drivers/perf/arm-cci.c
1137
dev_err(&cci_pmu->plat_device->dev, "Invalid CCI PMU counter %d\n", idx);
drivers/perf/arm-cci.c
114
static struct cci_pmu *g_cci_pmu;
drivers/perf/arm-cci.c
1144
if (!pmu_fixed_hw_idx(cci_pmu, idx))
drivers/perf/arm-cci.c
1145
pmu_set_event(cci_pmu, idx, hwc->config_base);
drivers/perf/arm-cci.c
1148
pmu_enable_counter(cci_pmu, idx);
drivers/perf/arm-cci.c
1155
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1162
if (unlikely(!pmu_is_valid_counter(cci_pmu, idx))) {
drivers/perf/arm-cci.c
1163
dev_err(&cci_pmu->plat_device->dev, "Invalid CCI PMU counter %d\n", idx);
drivers/perf/arm-cci.c
1171
pmu_disable_counter(cci_pmu, idx);
drivers/perf/arm-cci.c
1178
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1179
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
1203
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1204
struct cci_pmu_hw_events *hw_events = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
1215
static int validate_event(struct pmu *cci_pmu,
drivers/perf/arm-cci.c
1227
if (event->pmu != cci_pmu)
drivers/perf/arm-cci.c
1242
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1251
bitmap_zero(mask, cci_pmu->num_cntrs);
drivers/perf/arm-cci.c
128
static void pmu_write_counters(struct cci_pmu *cci_pmu,
drivers/perf/arm-cci.c
1305
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
1306
atomic_t *active_events = &cci_pmu->active_events;
drivers/perf/arm-cci.c
1327
event->cpu = cci_pmu->cpu;
drivers/perf/arm-cci.c
1331
mutex_lock(&cci_pmu->reserve_mutex);
drivers/perf/arm-cci.c
1333
err = cci_pmu_get_hw(cci_pmu);
drivers/perf/arm-cci.c
1336
mutex_unlock(&cci_pmu->reserve_mutex);
drivers/perf/arm-cci.c
1352
struct cci_pmu *cci_pmu = to_cci_pmu(pmu);
drivers/perf/arm-cci.c
1354
return cpumap_print_to_pagebuf(true, buf, cpumask_of(cci_pmu->cpu));
drivers/perf/arm-cci.c
1386
static int cci_pmu_init(struct cci_pmu *cci_pmu, struct platform_device *pdev)
drivers/perf/arm-cci.c
1388
const struct cci_pmu_model *model = cci_pmu->model;
drivers/perf/arm-cci.c
1400
cci_pmu->pmu = (struct pmu) {
drivers/perf/arm-cci.c
1403
.name = cci_pmu->model->name,
drivers/perf/arm-cci.c
1417
cci_pmu->plat_device = pdev;
drivers/perf/arm-cci.c
1418
num_cntrs = pmu_get_max_counters(cci_pmu);
drivers/perf/arm-cci.c
1419
if (num_cntrs > cci_pmu->model->num_hw_cntrs) {
drivers/perf/arm-cci.c
1423
num_cntrs, cci_pmu->model->num_hw_cntrs);
drivers/perf/arm-cci.c
1424
num_cntrs = cci_pmu->model->num_hw_cntrs;
drivers/perf/arm-cci.c
1426
cci_pmu->num_cntrs = num_cntrs + cci_pmu->model->fixed_hw_cntrs;
drivers/perf/arm-cci.c
1428
return perf_pmu_register(&cci_pmu->pmu, name, -1);
drivers/perf/arm-cci.c
1582
static struct cci_pmu *cci_pmu_alloc(struct device *dev)
drivers/perf/arm-cci.c
1584
struct cci_pmu *cci_pmu;
drivers/perf/arm-cci.c
1592
cci_pmu = devm_kzalloc(dev, sizeof(*cci_pmu), GFP_KERNEL);
drivers/perf/arm-cci.c
1593
if (!cci_pmu)
drivers/perf/arm-cci.c
1596
cci_pmu->ctrl_base = *(void __iomem **)dev->platform_data;
drivers/perf/arm-cci.c
1602
model = probe_cci_model(cci_pmu);
drivers/perf/arm-cci.c
1609
cci_pmu->model = model;
drivers/perf/arm-cci.c
1610
cci_pmu->irqs = devm_kcalloc(dev, CCI_PMU_MAX_HW_CNTRS(model),
drivers/perf/arm-cci.c
1611
sizeof(*cci_pmu->irqs), GFP_KERNEL);
drivers/perf/arm-cci.c
1612
if (!cci_pmu->irqs)
drivers/perf/arm-cci.c
1614
cci_pmu->hw_events.events = devm_kcalloc(dev,
drivers/perf/arm-cci.c
1616
sizeof(*cci_pmu->hw_events.events),
drivers/perf/arm-cci.c
1618
if (!cci_pmu->hw_events.events)
drivers/perf/arm-cci.c
1620
cci_pmu->hw_events.used_mask = devm_bitmap_zalloc(dev,
drivers/perf/arm-cci.c
1623
if (!cci_pmu->hw_events.used_mask)
drivers/perf/arm-cci.c
1626
return cci_pmu;
drivers/perf/arm-cci.c
1631
struct cci_pmu *cci_pmu;
drivers/perf/arm-cci.c
1634
cci_pmu = cci_pmu_alloc(&pdev->dev);
drivers/perf/arm-cci.c
1635
if (IS_ERR(cci_pmu))
drivers/perf/arm-cci.c
1636
return PTR_ERR(cci_pmu);
drivers/perf/arm-cci.c
1638
cci_pmu->base = devm_platform_ioremap_resource(pdev, 0);
drivers/perf/arm-cci.c
1639
if (IS_ERR(cci_pmu->base))
drivers/perf/arm-cci.c
1646
cci_pmu->nr_irqs = 0;
drivers/perf/arm-cci.c
1647
for (i = 0; i < CCI_PMU_MAX_HW_CNTRS(cci_pmu->model); i++) {
drivers/perf/arm-cci.c
1652
if (is_duplicate_irq(irq, cci_pmu->irqs, cci_pmu->nr_irqs))
drivers/perf/arm-cci.c
1655
cci_pmu->irqs[cci_pmu->nr_irqs++] = irq;
drivers/perf/arm-cci.c
1662
if (i < CCI_PMU_MAX_HW_CNTRS(cci_pmu->model)) {
drivers/perf/arm-cci.c
1664
i, CCI_PMU_MAX_HW_CNTRS(cci_pmu->model));
drivers/perf/arm-cci.c
1668
raw_spin_lock_init(&cci_pmu->hw_events.pmu_lock);
drivers/perf/arm-cci.c
1669
mutex_init(&cci_pmu->reserve_mutex);
drivers/perf/arm-cci.c
1670
atomic_set(&cci_pmu->active_events, 0);
drivers/perf/arm-cci.c
1672
cci_pmu->cpu = raw_smp_processor_id();
drivers/perf/arm-cci.c
1673
g_cci_pmu = cci_pmu;
drivers/perf/arm-cci.c
1678
ret = cci_pmu_init(cci_pmu, pdev);
drivers/perf/arm-cci.c
1682
pr_info("ARM %s PMU driver probed", cci_pmu->model->name);
drivers/perf/arm-cci.c
307
static int cci400_get_event_idx(struct cci_pmu *cci_pmu,
drivers/perf/arm-cci.c
321
for (idx = CCI400_PMU_CNTR0_IDX; idx <= CCI_PMU_CNTR_LAST(cci_pmu); ++idx)
drivers/perf/arm-cci.c
329
static int cci400_validate_hw_event(struct cci_pmu *cci_pmu, unsigned long hw_event)
drivers/perf/arm-cci.c
360
if (ev_code >= cci_pmu->model->event_ranges[if_type].min &&
drivers/perf/arm-cci.c
361
ev_code <= cci_pmu->model->event_ranges[if_type].max)
drivers/perf/arm-cci.c
367
static int probe_cci400_revision(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
370
rev = readl_relaxed(cci_pmu->ctrl_base + CCI_PID2) & CCI_PID2_REV_MASK;
drivers/perf/arm-cci.c
379
static const struct cci_pmu_model *probe_cci_model(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
38
#define CCI_PMU_CNTR_LAST(cci_pmu) (cci_pmu->num_cntrs - 1)
drivers/perf/arm-cci.c
382
return &cci_pmu_models[probe_cci400_revision(cci_pmu)];
drivers/perf/arm-cci.c
386
static inline struct cci_pmu_model *probe_cci_model(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
536
static int cci500_validate_hw_event(struct cci_pmu *cci_pmu,
drivers/perf/arm-cci.c
571
if (ev_code >= cci_pmu->model->event_ranges[if_type].min &&
drivers/perf/arm-cci.c
572
ev_code <= cci_pmu->model->event_ranges[if_type].max)
drivers/perf/arm-cci.c
587
static int cci550_validate_hw_event(struct cci_pmu *cci_pmu,
drivers/perf/arm-cci.c
623
if (ev_code >= cci_pmu->model->event_ranges[if_type].min &&
drivers/perf/arm-cci.c
624
ev_code <= cci_pmu->model->event_ranges[if_type].max)
drivers/perf/arm-cci.c
637
static void cci_pmu_sync_counters(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
640
struct cci_pmu_hw_events *cci_hw = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
644
for_each_set_bit(i, cci_pmu->hw_events.used_mask, cci_pmu->num_cntrs) {
drivers/perf/arm-cci.c
659
pmu_write_counters(cci_pmu, mask);
drivers/perf/arm-cci.c
663
static void __cci_pmu_enable_nosync(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
668
val = readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) | CCI_PMCR_CEN;
drivers/perf/arm-cci.c
669
writel(val, cci_pmu->ctrl_base + CCI_PMCR);
drivers/perf/arm-cci.c
673
static void __cci_pmu_enable_sync(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
675
cci_pmu_sync_counters(cci_pmu);
drivers/perf/arm-cci.c
676
__cci_pmu_enable_nosync(cci_pmu);
drivers/perf/arm-cci.c
680
static void __cci_pmu_disable(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
685
val = readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) & ~CCI_PMCR_CEN;
drivers/perf/arm-cci.c
686
writel(val, cci_pmu->ctrl_base + CCI_PMCR);
drivers/perf/arm-cci.c
699
static int pmu_is_valid_counter(struct cci_pmu *cci_pmu, int idx)
drivers/perf/arm-cci.c
701
return 0 <= idx && idx <= CCI_PMU_CNTR_LAST(cci_pmu);
drivers/perf/arm-cci.c
704
static u32 pmu_read_register(struct cci_pmu *cci_pmu, int idx, unsigned int offset)
drivers/perf/arm-cci.c
706
return readl_relaxed(cci_pmu->base +
drivers/perf/arm-cci.c
707
CCI_PMU_CNTR_BASE(cci_pmu->model, idx) + offset);
drivers/perf/arm-cci.c
710
static void pmu_write_register(struct cci_pmu *cci_pmu, u32 value,
drivers/perf/arm-cci.c
713
writel_relaxed(value, cci_pmu->base +
drivers/perf/arm-cci.c
714
CCI_PMU_CNTR_BASE(cci_pmu->model, idx) + offset);
drivers/perf/arm-cci.c
717
static void pmu_disable_counter(struct cci_pmu *cci_pmu, int idx)
drivers/perf/arm-cci.c
719
pmu_write_register(cci_pmu, 0, idx, CCI_PMU_CNTR_CTRL);
drivers/perf/arm-cci.c
722
static void pmu_enable_counter(struct cci_pmu *cci_pmu, int idx)
drivers/perf/arm-cci.c
724
pmu_write_register(cci_pmu, 1, idx, CCI_PMU_CNTR_CTRL);
drivers/perf/arm-cci.c
728
pmu_counter_is_enabled(struct cci_pmu *cci_pmu, int idx)
drivers/perf/arm-cci.c
730
return (pmu_read_register(cci_pmu, idx, CCI_PMU_CNTR_CTRL) & 0x1) != 0;
drivers/perf/arm-cci.c
733
static void pmu_set_event(struct cci_pmu *cci_pmu, int idx, unsigned long event)
drivers/perf/arm-cci.c
735
pmu_write_register(cci_pmu, event, idx, CCI_PMU_EVT_SEL);
drivers/perf/arm-cci.c
74
struct cci_pmu;
drivers/perf/arm-cci.c
751
pmu_save_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
drivers/perf/arm-cci.c
755
for (i = 0; i < cci_pmu->num_cntrs; i++) {
drivers/perf/arm-cci.c
756
if (pmu_counter_is_enabled(cci_pmu, i)) {
drivers/perf/arm-cci.c
758
pmu_disable_counter(cci_pmu, i);
drivers/perf/arm-cci.c
768
pmu_restore_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
drivers/perf/arm-cci.c
772
for_each_set_bit(i, mask, cci_pmu->num_cntrs)
drivers/perf/arm-cci.c
773
pmu_enable_counter(cci_pmu, i);
drivers/perf/arm-cci.c
780
static u32 pmu_get_max_counters(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
782
return (readl_relaxed(cci_pmu->ctrl_base + CCI_PMCR) &
drivers/perf/arm-cci.c
788
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
792
if (cci_pmu->model->get_event_idx)
drivers/perf/arm-cci.c
793
return cci_pmu->model->get_event_idx(cci_pmu, hw, cci_event);
drivers/perf/arm-cci.c
796
for (idx = 0; idx <= CCI_PMU_CNTR_LAST(cci_pmu); idx++)
drivers/perf/arm-cci.c
806
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
809
!cci_pmu->model->validate_hw_event)
drivers/perf/arm-cci.c
812
return cci_pmu->model->validate_hw_event(cci_pmu, event->attr.config);
drivers/perf/arm-cci.c
815
static int pmu_request_irq(struct cci_pmu *cci_pmu, irq_handler_t handler)
drivers/perf/arm-cci.c
818
struct platform_device *pmu_device = cci_pmu->plat_device;
drivers/perf/arm-cci.c
823
if (cci_pmu->nr_irqs < 1) {
drivers/perf/arm-cci.c
835
for (i = 0; i < cci_pmu->nr_irqs; i++) {
drivers/perf/arm-cci.c
836
int err = request_irq(cci_pmu->irqs[i], handler, IRQF_SHARED,
drivers/perf/arm-cci.c
837
"arm-cci-pmu", cci_pmu);
drivers/perf/arm-cci.c
840
cci_pmu->irqs[i]);
drivers/perf/arm-cci.c
844
set_bit(i, &cci_pmu->active_irqs);
drivers/perf/arm-cci.c
850
static void pmu_free_irq(struct cci_pmu *cci_pmu)
drivers/perf/arm-cci.c
854
for (i = 0; i < cci_pmu->nr_irqs; i++) {
drivers/perf/arm-cci.c
855
if (!test_and_clear_bit(i, &cci_pmu->active_irqs))
drivers/perf/arm-cci.c
858
free_irq(cci_pmu->irqs[i], cci_pmu);
drivers/perf/arm-cci.c
864
struct cci_pmu *cci_pmu = to_cci_pmu(event->pmu);
drivers/perf/arm-cci.c
869
if (unlikely(!pmu_is_valid_counter(cci_pmu, idx))) {
drivers/perf/arm-cci.c
870
dev_err(&cci_pmu->plat_device->dev, "Invalid CCI PMU counter %d\n", idx);
drivers/perf/arm-cci.c
873
value = pmu_read_register(cci_pmu, idx, CCI_PMU_CNTR);
drivers/perf/arm-cci.c
878
static void pmu_write_counter(struct cci_pmu *cci_pmu, u32 value, int idx)
drivers/perf/arm-cci.c
880
pmu_write_register(cci_pmu, value, idx, CCI_PMU_CNTR);
drivers/perf/arm-cci.c
883
static void __pmu_write_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
drivers/perf/arm-cci.c
886
struct cci_pmu_hw_events *cci_hw = &cci_pmu->hw_events;
drivers/perf/arm-cci.c
888
for_each_set_bit(i, mask, cci_pmu->num_cntrs) {
drivers/perf/arm-cci.c
89
int (*validate_hw_event)(struct cci_pmu *, unsigned long);
drivers/perf/arm-cci.c
893
pmu_write_counter(cci_pmu, local64_read(&event->hw.prev_count), i);
drivers/perf/arm-cci.c
897
static void pmu_write_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
drivers/perf/arm-cci.c
899
if (cci_pmu->model->write_counters)
drivers/perf/arm-cci.c
90
int (*get_event_idx)(struct cci_pmu *, struct cci_pmu_hw_events *, unsigned long);
drivers/perf/arm-cci.c
900
cci_pmu->model->write_counters(cci_pmu, mask);
drivers/perf/arm-cci.c
902
__pmu_write_counters(cci_pmu, mask);
drivers/perf/arm-cci.c
91
void (*write_counters)(struct cci_pmu *, unsigned long *);
drivers/perf/arm-cci.c
936
static void cci5xx_pmu_write_counters(struct cci_pmu *cci_pmu, unsigned long *mask)
drivers/perf/arm-cci.c
941
bitmap_zero(saved_mask, cci_pmu->num_cntrs);
drivers/perf/arm-cci.c
942
pmu_save_counters(cci_pmu, saved_mask);
drivers/perf/arm-cci.c
948
__cci_pmu_enable_nosync(cci_pmu);
drivers/perf/arm-cci.c
950
for_each_set_bit(i, mask, cci_pmu->num_cntrs) {
drivers/perf/arm-cci.c
951
struct perf_event *event = cci_pmu->hw_events.events[i];
drivers/perf/arm-cci.c
956
pmu_set_event(cci_pmu, i, CCI5xx_INVALID_EVENT);
drivers/perf/arm-cci.c
957
pmu_enable_counter(cci_pmu, i);
drivers/perf/arm-cci.c
958
pmu_write_counter(cci_pmu, local64_read(&event->hw.prev_count), i);
drivers/perf/arm-cci.c
959
pmu_disable_counter(cci_pmu, i);
drivers/perf/arm-cci.c
960
pmu_set_event(cci_pmu, i, event->hw.config_base);
drivers/perf/arm-cci.c
963
__cci_pmu_disable(cci_pmu);
drivers/perf/arm-cci.c
965
pmu_restore_counters(cci_pmu, saved_mask);