cc770_read_reg
cc770_read_reg(priv, interrupt);
cc770_read_reg(priv, interrupt);
cc770_read_reg(priv, interrupt);
if (cc770_read_reg(priv, cpu_interface) & CPUIF_RST) {
if ((cc770_read_reg(priv, msgobj[1].data[1]) != 0x25) ||
(cc770_read_reg(priv, msgobj[2].data[3]) != 0x52) ||
(cc770_read_reg(priv, msgobj[10].data[6]) != 0xc3)) {
if (cc770_read_reg(priv, control) & CTRL_EAF)
bec->txerr = cc770_read_reg(priv, tx_error_counter);
bec->rxerr = cc770_read_reg(priv, rx_error_counter);
if ((cc770_read_reg(priv,
config = cc770_read_reg(priv, msgobj[mo].config);
id = cc770_read_reg(priv, msgobj[mo].id[3]);
id |= cc770_read_reg(priv, msgobj[mo].id[2]) << 8;
id |= cc770_read_reg(priv, msgobj[mo].id[1]) << 16;
id |= cc770_read_reg(priv, msgobj[mo].id[0]) << 24;
id = cc770_read_reg(priv, msgobj[mo].id[1]);
id |= cc770_read_reg(priv, msgobj[mo].id[0]) << 8;
cf->data[i] = cc770_read_reg(priv, msgobj[mo].data[i]);
cf->data[6] = cc770_read_reg(priv, tx_error_counter);
cf->data[7] = cc770_read_reg(priv, rx_error_counter);
status = cc770_read_reg(priv, status);
ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);
if (!(cc770_read_reg(priv, msgobj[mo].ctrl0) &
ctrl0 = cc770_read_reg(priv, msgobj[mo].ctrl0);
ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);
ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);
intid = cc770_read_reg(priv, interrupt);