cal_set_field
cal_set_field(&val, mipi_csi2->clock_lane + 1, lane_mask);
cal_set_field(&val, mipi_csi2->lane_polarities[0], polarity_mask);
cal_set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask);
cal_set_field(&val, mipi_csi2->lane_polarities[lane + 1],
cal_set_field(®0, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE,
cal_set_field(®0, ths_term, CAL_CSI2_PHY_REG0_THS_TERM_MASK);
cal_set_field(®0, ths_settle, CAL_CSI2_PHY_REG0_THS_SETTLE_MASK);
cal_set_field(®1, TCLK_TERM, CAL_CSI2_PHY_REG1_TCLK_TERM_MASK);
cal_set_field(®1, 0xb8, CAL_CSI2_PHY_REG1_DPHY_HS_SYNC_PATTERN_MASK);
cal_set_field(®1, TCLK_MISS,
cal_set_field(®1, TCLK_SETTLE, CAL_CSI2_PHY_REG1_TCLK_SETTLE_MASK);
cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X16_IO1_MASK);
cal_set_field(&val, 1, CAL_CSI2_TIMING_STOP_STATE_X4_IO1_MASK);
cal_set_field(&val, sscounter,
cal_set_field(®10, 1, CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK);
cal_set_field(&val, CAL_CTRL_BURSTSIZE_BURST128,
cal_set_field(&val, 0xf, CAL_CTRL_TAGCNT_MASK);
cal_set_field(&val, CAL_CTRL_POSTED_WRITES_NONPOSTED,
cal_set_field(&val, 0xff, CAL_CTRL_MFLAGL_MASK);
cal_set_field(&val, 0xff, CAL_CTRL_MFLAGH_MASK);
cal_set_field(&val, ctx->cport, CAL_CSI2_CTX_CPORT_MASK);
cal_set_field(&val, ctx->datatype, CAL_CSI2_CTX_DT_MASK);
cal_set_field(&val, ctx->vc, CAL_CSI2_CTX_VC_MASK);
cal_set_field(&val, ctx->v_fmt.fmt.pix.height, CAL_CSI2_CTX_LINES_MASK);
cal_set_field(&val, CAL_CSI2_CTX_ATT_PIX, CAL_CSI2_CTX_ATT_MASK);
cal_set_field(&val, CAL_CSI2_CTX_PACK_MODE_LINE,
cal_set_field(&val, extract, CAL_PIX_PROC_EXTRACT_MASK);
cal_set_field(&val, CAL_PIX_PROC_DPCMD_BYPASS, CAL_PIX_PROC_DPCMD_MASK);
cal_set_field(&val, CAL_PIX_PROC_DPCME_BYPASS, CAL_PIX_PROC_DPCME_MASK);
cal_set_field(&val, pack, CAL_PIX_PROC_PACK_MASK);
cal_set_field(&val, ctx->cport, CAL_PIX_PROC_CPORT_MASK);
cal_set_field(&val, 1, CAL_PIX_PROC_EN_MASK);
cal_set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK);
cal_set_field(&val, ctx->v_fmt.fmt.pix.height,
cal_set_field(&val, CAL_WR_DMA_CTRL_DTAG_PIX_DAT,
cal_set_field(&val, CAL_WR_DMA_CTRL_PATTERN_LINEAR,
cal_set_field(&val, 1, CAL_WR_DMA_CTRL_STALL_RD_MASK);
cal_set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK);
cal_set_field(&val, stride / 8, CAL_WR_DMA_XSIZE_MASK);
cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_CONST,
cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_DIS,