drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1004

data->useful_pte_per_pte_request = bw_int_to_fixed(8);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1005

data->scatter_gather_page_width[i] = bw_div(bw_int_to_fixed(4096), bw_int_to_fixed(data->bytes_per_pixel[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1006

data->scatter_gather_page_height[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1007

data->scatter_gather_pte_request_rows = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1008

data->scatter_gather_row_height = bw_int_to_fixed(dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1010

else if (bw_equ(data->rotation_angle[i], bw_int_to_fixed(0)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(180))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1011

data->useful_pte_per_pte_request = bw_int_to_fixed(8);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1014

data->scatter_gather_page_width[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1015

data->scatter_gather_page_height[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1018

data->scatter_gather_page_width[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1019

data->scatter_gather_page_height[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1022

data->scatter_gather_page_width[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1023

data->scatter_gather_page_height[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1026

data->scatter_gather_pte_request_rows = bw_int_to_fixed(dceip->scatter_gather_pte_request_rows_in_tiling_mode);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1030

data->useful_pte_per_pte_request = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1033

data->scatter_gather_page_width[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1034

data->scatter_gather_page_height[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1037

data->scatter_gather_page_width[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1038

data->scatter_gather_page_height[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1041

data->scatter_gather_page_width[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1042

data->scatter_gather_page_height[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1045

data->scatter_gather_pte_request_rows = bw_int_to_fixed(dceip->scatter_gather_pte_request_rows_in_tiling_mode);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1048

data->pte_request_per_chunk[i] = bw_div(bw_div(bw_int_to_fixed(dceip->chunk_width), data->scatter_gather_page_width[i]), data->useful_pte_per_pte_request);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1049

data->scatter_gather_pte_requests_in_row[i] = bw_div(bw_mul(bw_ceil2(bw_mul(bw_div(data->source_width_rounded_up_to_chunks[i], bw_int_to_fixed(dceip->chunk_width)), data->pte_request_per_chunk[i]), bw_int_to_fixed(1)), data->scatter_gather_row_height), data->scatter_gather_page_height[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1051

if (bw_equ(data->peak_pte_request_to_eviction_ratio_limiting, bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1055

data->scatter_gather_pte_request_limit[i] = bw_max2(dceip->minimum_outstanding_pte_request_limit, bw_min2(data->scatter_gather_pte_requests_in_vblank, bw_ceil2(bw_mul(bw_mul(bw_div(bw_ceil2(data->adjusted_data_buffer_size[i], data->memory_chunk_size_in_bytes[i]), data->memory_chunk_size_in_bytes[i]), data->pte_request_per_chunk[i]), data->peak_pte_request_to_eviction_ratio_limiting), bw_int_to_fixed(1))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1062

data->inefficient_linear_pitch_in_bytes = bw_mul(bw_mul(bw_int_to_fixed(256), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1083

data->cursor_total_data = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1084

data->cursor_total_request_groups = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1085

data->scatter_gather_total_pte_requests = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1086

data->scatter_gather_total_pte_request_groups = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1089

data->cursor_total_data = bw_add(data->cursor_total_data, bw_mul(bw_mul(bw_int_to_fixed(2), data->cursor_width_pixels[i]), bw_int_to_fixed(4)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1091

data->cursor_total_request_groups = bw_add(data->cursor_total_request_groups, bw_int_to_fixed((dceip->cursor_max_outstanding_group_num + 1)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1094

data->cursor_total_request_groups = bw_add(data->cursor_total_request_groups, bw_ceil2(bw_div(data->cursor_width_pixels[i], dceip->cursor_chunk_width), bw_int_to_fixed(1)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1098

data->scatter_gather_total_pte_request_groups = bw_add(data->scatter_gather_total_pte_request_groups, bw_ceil2(bw_div(data->scatter_gather_pte_request_limit[i], bw_ceil2(data->pte_request_per_chunk[i], bw_int_to_fixed(1))), bw_int_to_fixed(1)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1102

data->tile_width_in_pixels = bw_int_to_fixed(8);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1103

data->dmif_total_number_of_data_request_page_close_open = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1104

data->mcifwr_total_number_of_data_request_page_close_open = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1108

data->bytes_per_page_close_open = bw_mul(data->lines_interleaved_in_mem_access[i], bw_max2(bw_mul(bw_mul(bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->tile_width_in_pixels), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels)), bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->scatter_gather_page_width[i])));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1110

else if (data->scatter_gather_enable_for_pipe[i] == 1 && tiling_mode[i] == bw_def_linear && bw_equ(bw_mod((bw_mul(data->pitch_in_pixels_after_surface_type[i], bw_int_to_fixed(data->bytes_per_pixel[i]))), data->inefficient_linear_pitch_in_bytes), bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1124

data->dmif_total_page_close_open_time = bw_div(bw_mul((bw_add(bw_add(data->dmif_total_number_of_data_request_page_close_open, data->scatter_gather_total_pte_request_groups), data->cursor_total_request_groups)), vbios->trc), bw_int_to_fixed(1000));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1125

data->mcifwr_total_page_close_open_time = bw_div(bw_mul(data->mcifwr_total_number_of_data_request_page_close_open, vbios->trc), bw_int_to_fixed(1000));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1131

data->total_requests_for_adjusted_dmif_size = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1139

data->total_dmifmc_urgent_trips = bw_ceil2(bw_div(data->total_requests_for_adjusted_dmif_size, (bw_add(dceip->dmif_request_buffer_size, bw_int_to_fixed((uint64_t)vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel * data->number_of_dram_channels)))), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1141

data->total_display_reads_required_data = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1142

data->total_display_reads_required_dram_access_data = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1143

data->total_display_writes_required_data = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1144

data->total_display_writes_required_dram_access_data = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1163

data->display_reads_required_dram_access_data = bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed((8 * vbios->dram_channel_width_in_bits / 8)), data->bytes_per_request[i]), bw_int_to_fixed(1)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1170

data->total_display_writes_required_dram_access_data = bw_add(data->total_display_writes_required_dram_access_data, bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits), data->bytes_per_request[i]), bw_int_to_fixed(1))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1174

data->total_display_reads_required_data = bw_add(bw_add(data->total_display_reads_required_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1175

data->total_display_reads_required_dram_access_data = bw_add(bw_add(data->total_display_reads_required_dram_access_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1178

if (bw_mtn(data->v_filter_init[i], bw_int_to_fixed(4))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1179

data->src_pixels_for_first_output_pixel[i] = bw_mul(bw_int_to_fixed(4), data->source_width_rounded_up_to_chunks[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1182

if (bw_mtn(data->v_filter_init[i], bw_int_to_fixed(2))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1183

data->src_pixels_for_first_output_pixel[i] = bw_int_to_fixed(512);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1186

data->src_pixels_for_first_output_pixel[i] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1189

data->src_data_for_first_output_pixel[i] = bw_div(bw_mul(bw_mul(data->src_pixels_for_first_output_pixel[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1190

data->src_pixels_for_last_output_pixel[i] = bw_mul(data->source_width_rounded_up_to_chunks[i], bw_max2(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), bw_mul(bw_ceil2(data->vsr[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->horizontal_blank_and_chunk_granularity_factor[i])));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1191

data->src_data_for_last_output_pixel[i] = bw_div(bw_mul(bw_mul(bw_mul(data->source_width_rounded_up_to_chunks[i], bw_max2(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->lines_interleaved_in_mem_access[i])), bw_int_to_fixed(data->bytes_per_pixel[i])), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1197

data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1199

data->mcifwr_burst_time[i][j] = bw_max3(data->mcifwr_total_page_close_open_time, bw_div(data->total_display_writes_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_wrchannels)))), bw_div(data->total_display_writes_required_data, (bw_mul(sclk[j], vbios->data_return_bus_width))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1211

data->line_source_transfer_time[i][j][k] = bw_max2(bw_mul((bw_add(data->total_dmifmc_urgent_latency, data->dmif_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), bw_sub(bw_add(bw_mul((bw_add(data->total_dmifmc_urgent_latency, data->dmif_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->dmif_buffer_transfer_time[i]), data->active_time[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1248

data->v_scaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1252

if (dceip->pre_downscaler_enabled && bw_mtn(data->hsr[i], bw_int_to_fixed(1))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1256

data->scaler_limits_factor = bw_max3(bw_int_to_fixed(1), bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)), bw_mul(data->hsr[i], bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_int_to_fixed(1))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1258

data->dram_speed_change_line_source_transfer_time[i][j][k] = bw_mul(bw_int_to_fixed(2), bw_max2((bw_add((bw_div(data->src_data_for_first_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(bw_mul(data->bytes_per_request[i], data->pixel_rate[i]), data->scaler_limits_factor), bw_int_to_fixed(2))))), (bw_mul(data->dmif_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1)))))), (bw_add((bw_div(data->src_data_for_last_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(bw_mul(data->bytes_per_request[i], data->pixel_rate[i]), data->scaler_limits_factor), bw_int_to_fixed(2))))), (bw_sub(bw_mul(data->dmif_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i]))))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1261

data->line_source_transfer_time[i][j][k] = bw_max2(bw_mul((bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), bw_sub(bw_mul((bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1267

data->dram_speed_change_line_source_transfer_time[i][j][k] = bw_max2((bw_add((bw_div(data->src_data_for_first_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1)))))), (bw_add((bw_div(data->src_data_for_last_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_sub(bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i])))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1296

if ((bw_equ(dceip->stutter_and_dram_clock_state_change_gated_before_cursor, bw_int_to_fixed(0)) && bw_mtn(data->cursor_width_pixels[i], bw_int_to_fixed(0)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1297

if (bw_ltn(data->vsr[i], bw_int_to_fixed(2))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1298

data->cursor_latency_hiding[i] = bw_div(bw_div(bw_mul((bw_sub(dceip->cursor_dcp_buffer_lines, bw_int_to_fixed(1))), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1301

data->cursor_latency_hiding[i] = bw_div(bw_div(bw_mul((bw_sub(dceip->cursor_dcp_buffer_lines, bw_int_to_fixed(3))), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1305

data->cursor_latency_hiding[i] = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1311

if (dceip->graphics_lb_nodownscaling_multi_line_prefetching == 1 && (bw_equ(data->vsr[i], bw_int_to_fixed(1)) || (bw_leq(data->vsr[i], bw_frc_to_fixed(8, 10)) && bw_leq(data->v_taps[i], bw_int_to_fixed(2)) && data->lb_bpc[i] == 8)) && surface_type[i] == bw_def_graphics) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1313

data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_sub(data->lb_partitions[i], bw_int_to_fixed(2)), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1315

data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_sub(data->lb_partitions[i], bw_int_to_fixed(1)), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1318

data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_int_to_fixed(1 + data->line_buffer_prefetch[i]), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1325

data->blackout_duration_margin[i][j] = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1326

data->dispclk_required_for_blackout_duration[i][j] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1327

data->dispclk_required_for_blackout_recovery[i][j] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1329

if (data->enable[k] && bw_mtn(vbios->blackout_duration, bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1333

if (bw_leq(vbios->maximum_blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j]))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1334

data->dispclk_required_for_blackout_recovery[i][j] = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1336

else if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1337

data->dispclk_required_for_blackout_recovery[i][j] = bw_max2(data->dispclk_required_for_blackout_recovery[i][j], bw_div(bw_mul(bw_div(bw_div((bw_sub(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, vbios->maximum_blackout_recovery_time))), data->adjusted_data_buffer_size[k])), bw_int_to_fixed(data->bytes_per_pixel[k])), (bw_sub(vbios->maximum_blackout_recovery_time, bw_sub(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))), data->latency_hiding_lines[k]), data->lines_interleaved_in_mem_access[k]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1343

if (bw_ltn(vbios->maximum_blackout_recovery_time, bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1344

data->dispclk_required_for_blackout_recovery[i][j] = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1346

else if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1347

data->dispclk_required_for_blackout_recovery[i][j] = bw_max2(data->dispclk_required_for_blackout_recovery[i][j], bw_div(bw_mul(bw_div(bw_div((bw_sub(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, vbios->maximum_blackout_recovery_time))), data->adjusted_data_buffer_size[k])), bw_int_to_fixed(data->bytes_per_pixel[k])), (bw_sub(vbios->maximum_blackout_recovery_time, (bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j]))))), data->latency_hiding_lines[k]), data->lines_interleaved_in_mem_access[k]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1354

if (bw_mtn(data->blackout_duration_margin[high][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[high][s_high], vbios->high_voltage_max_dispclk)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1385

data->min_dram_speed_change_margin[i][j] = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1386

data->dram_speed_change_margin = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1387

data->dispclk_required_for_dram_speed_change[i][j] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1393

if ((bw_mtn(data->dram_speed_change_margin, bw_int_to_fixed(0)) && bw_ltn(data->dram_speed_change_margin, bw_int_to_fixed(9999)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1407

if ((bw_mtn(data->dram_speed_change_margin, bw_int_to_fixed(0)) && bw_ltn(data->dram_speed_change_margin, bw_int_to_fixed(9999)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1432

data->min_vblank_dram_speed_change_margin = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1436

data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1440

data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->mcifwr_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1446

data->displays_with_same_mode[i] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1447

if (data->enable[i] == 1 && data->display_pstate_change_enable[i] == 0 && bw_mtn(data->v_blank_dram_speed_change_margin[i], bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1450

data->displays_with_same_mode[i] = bw_add(data->displays_with_same_mode[i], bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1458

number_of_aligned_displays_with_no_margin = bw_fixed_to_int(bw_max2(bw_int_to_fixed(number_of_aligned_displays_with_no_margin), data->displays_with_same_mode[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1464

if (number_of_displays_enabled_with_margin > 0 && (number_of_displays_enabled_with_margin + number_of_aligned_displays_with_no_margin) == number_of_displays_enabled && bw_mtn(data->min_dram_speed_change_margin[high][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[high][s_high], bw_int_to_fixed(9999)) && bw_ltn(data->dispclk_required_for_dram_speed_change[high][s_high], vbios->high_voltage_max_dispclk)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1483

data->average_bandwidth_no_compression[i] = bw_div(bw_mul(bw_mul(bw_div(bw_mul(data->source_width_rounded_up_to_chunks[i], bw_int_to_fixed(data->bytes_per_pixel[i])), (bw_div(data->h_total[i], data->pixel_rate[i]))), data->vsr[i]), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1487

data->total_average_bandwidth_no_compression = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1488

data->total_average_bandwidth = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1500

data->min_cursor_memory_interface_buffer_size_in_time = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1505

if (bw_mtn(data->cursor_width_pixels[i], bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1507

if (bw_leq(data->cursor_width_pixels[i], bw_int_to_fixed(64)) && dceip->large_cursor == 1) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1513

data->min_cursor_memory_interface_buffer_size_in_time = bw_min2(data->min_cursor_memory_interface_buffer_size_in_time, bw_div(bw_mul(bw_div(bw_int_to_fixed(num_cursor_lines), data->vsr[i]), data->h_total[i]), data->pixel_rate[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1522

data->chunk_request_delay = bw_fixed_to_int(bw_div(bw_int_to_fixed(512), vbios->high_voltage_max_dispclk));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1525

data->display_reads_time_for_data_transfer = bw_sub(bw_sub(data->min_read_buffer_size_in_time, data->total_dmifmc_urgent_latency), bw_int_to_fixed(data->chunk_request_delay));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1532

data->required_dram_bandwidth_gbyte_per_second = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1535

data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1538

data->required_dram_bandwidth_gbyte_per_second = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1541

data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1544

data->required_dram_bandwidth_gbyte_per_second = bw_div(bw_max2(data->dmif_required_dram_bandwidth, data->mcifwr_required_dram_bandwidth), bw_int_to_fixed(1000));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1545

if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[low]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1546

&& bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[low][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[low][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[low][s_high] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1549

data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1551

else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[mid]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1552

&& bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[mid]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[mid][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[mid][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[mid][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[mid][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[mid][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[mid][s_high] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1555

data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[mid]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1557

else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[high]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1558

&& bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1561

data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1566

data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1577

data->required_sclk = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1582

data->required_sclk = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1589

&& bw_ltn(data->required_sclk, sclk[s_low]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_low], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_low], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_low], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_low], vbios->low_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_low] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1595

&& bw_ltn(data->required_sclk, sclk[s_mid1]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid1], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid1], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid1], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid1], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid1], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid1] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1601

&& bw_ltn(data->required_sclk, sclk[s_mid2]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid2], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid2], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid2], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid2], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid2], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid2] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1607

&& bw_ltn(data->required_sclk, sclk[s_mid3]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid3], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid3], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid3], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid3], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid3], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid3] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1613

&& bw_ltn(data->required_sclk, sclk[s_mid4]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid4], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid4], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid4], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid4], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid4], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid4] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1619

&& bw_ltn(data->required_sclk, sclk[s_mid5]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid5], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid5], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid5], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid5], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid5], vbios->mid_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid5] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1625

&& bw_ltn(data->required_sclk, sclk[s_mid6]) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[data->y_clk_level][s_mid6], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[data->y_clk_level][s_mid6], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[data->y_clk_level][s_mid6] == number_of_displays_enabled_with_margin))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1662

data->downspread_factor = bw_add(bw_int_to_fixed(1), bw_div(vbios->down_spread_percentage, bw_int_to_fixed(100)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1700

if (dceip->pre_downscaler_enabled && bw_mtn(data->hsr[i], bw_int_to_fixed(1))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1704

data->scaler_limits_factor = bw_max3(bw_int_to_fixed(1), bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)), bw_mul(data->hsr[i], bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_int_to_fixed(1))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1711

data->total_dispclk_required_with_ramping = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1712

data->total_dispclk_required_without_ramping = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1723

data->total_read_request_bandwidth = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1724

data->total_write_request_bandwidth = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1770

else if (bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) && sclk_message == bw_def_low && bw_ltn(data->dispclk, vbios->low_voltage_max_dispclk)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1773

else if ((bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->mid_yclk)) && (sclk_message == bw_def_low || sclk_message == bw_def_mid) && bw_ltn(data->dispclk, vbios->mid_voltage_max_dispclk)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1776

else if ((bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->mid_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->high_yclk)) && (sclk_message == bw_def_low || sclk_message == bw_def_mid || sclk_message == bw_def_high) && bw_leq(data->dispclk, vbios->high_voltage_max_dispclk)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1797

data->blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1799

if (data->enable[k] && bw_mtn(vbios->blackout_duration, bw_int_to_fixed(0)) && data->cpup_state_change_enable == bw_def_yes) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1801

data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1802

if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])))))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1803

data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k])))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1807

data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1808

if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])))))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1809

data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level]), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k])))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1823

data->pixels_per_data_fifo_entry[i] = bw_int_to_fixed(16);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1826

data->pixels_per_data_fifo_entry[i] = bw_div(bw_int_to_fixed(64), bw_int_to_fixed(data->bytes_per_pixel[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1829

data->pixels_per_data_fifo_entry[i] = bw_int_to_fixed(16);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1832

data->pixels_per_data_fifo_entry[i] = bw_div(bw_int_to_fixed(16), bw_int_to_fixed(data->bytes_per_pixel[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1836

data->min_pixels_per_data_fifo_entry = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1851

data->chunk_request_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1852

data->cursor_request_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1856

data->chunk_request_time = bw_add(data->chunk_request_time, (bw_div((bw_div(bw_int_to_fixed(pixels_per_chunk * (int64_t)data->bytes_per_pixel[i]), data->useful_bytes_per_request[i])), bw_min2(sclk[data->sclk_level], bw_div(data->dispclk, bw_int_to_fixed(2))))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1860

data->cursor_request_time = (bw_div(data->cursor_total_data, (bw_mul(bw_int_to_fixed(32), sclk[data->sclk_level]))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1874

data->nbp_state_change_watermark[i] = bw_int_to_fixed(131000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1879

data->stutter_exit_watermark[i] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1880

data->stutter_entry_watermark[i] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1886

data->nbp_state_change_watermark[i] = bw_int_to_fixed(131000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1919

data->dmifdram_access_efficiency = bw_min2(bw_div(bw_div(data->total_display_reads_required_dram_access_data, data->dram_bandwidth), data->dmif_total_page_close_open_time), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1920

if (bw_mtn(data->total_display_writes_required_dram_access_data, bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1921

data->mcifwrdram_access_efficiency = bw_min2(bw_div(bw_div(data->total_display_writes_required_dram_access_data, data->dram_bandwidth), data->mcifwr_total_page_close_open_time), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1924

data->mcifwrdram_access_efficiency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1935

data->stutter_refresh_duration[i] = bw_sub(bw_mul(bw_div(bw_div(bw_mul(bw_div(bw_div(data->adjusted_data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_rounded_up_to_chunks[i]), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]), data->compression_rate[i]), bw_max2(bw_int_to_fixed(0), bw_sub(data->stutter_exit_watermark[i], bw_div(bw_mul((bw_sub(data->lb_partitions[i], bw_int_to_fixed(1))), data->h_total[i]), data->pixel_rate[i]))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1936

data->stutter_dmif_buffer_size[i] = bw_div(bw_mul(bw_mul(bw_div(bw_mul(bw_mul(data->stutter_refresh_duration[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_rounded_up_to_chunks[i]), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]), data->compression_rate[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1939

data->min_stutter_refresh_duration = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1947

data->total_bytes_requested = bw_fixed_to_int(bw_add(bw_int_to_fixed(data->total_bytes_requested), (bw_mul(bw_mul(data->source_height_rounded_up_to_chunks[i], data->source_width_rounded_up_to_chunks[i]), bw_int_to_fixed(data->bytes_per_pixel[i])))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1950

data->total_stutter_dmif_buffer_size = bw_fixed_to_int(bw_add(data->stutter_dmif_buffer_size[i], bw_int_to_fixed(data->total_stutter_dmif_buffer_size)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1953

data->stutter_burst_time = bw_div(bw_int_to_fixed(data->total_stutter_dmif_buffer_size), bw_mul(sclk[data->sclk_level], vbios->data_return_bus_width));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1958

data->stutter_efficiency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1960

else if (bw_ltn(data->time_in_self_refresh, bw_int_to_fixed(0))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1961

data->stutter_efficiency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1965

data->stutter_efficiency = bw_max2(bw_int_to_fixed(0), bw_mul((bw_sub(bw_int_to_fixed(1), (bw_div(bw_mul((bw_add(vbios->stutter_self_refresh_exit_latency, data->stutter_burst_time)), bw_int_to_fixed(data->num_stutter_bursts)), bw_frc_to_fixed(166666667, 10000))))), bw_int_to_fixed(100)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1970

data->worst_number_of_trips_to_memory = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1973

data->number_of_trips_to_memory_for_getting_apte_row[i] = bw_ceil2(bw_div(data->scatter_gather_pte_requests_in_row[i], data->scatter_gather_pte_request_limit[i]), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1987

data->latency_for_non_mcifwr_clients = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1993

data->v_blank_nbp_state_dram_speed_change_latency_supported = bw_int_to_fixed(99999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1994

data->nbp_state_dram_speed_change_latency_supported = bw_int_to_fixed(99999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

1998

data->v_blank_nbp_state_dram_speed_change_latency_supported = bw_min2(data->v_blank_nbp_state_dram_speed_change_latency_supported, bw_add(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[i], bw_sub(bw_div(data->src_height[i], data->v_scale_ratio[i]), bw_int_to_fixed(4)))), data->h_total[i]), data->pixel_rate[i]), data->nbp_state_change_watermark[i]), vbios->nbp_state_change_latency));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2003

data->display_reads_time_for_data_transfer_and_urgent_latency = bw_sub(data->min_read_buffer_size_in_time, bw_mul(data->total_dmifmc_urgent_trips, bw_int_to_fixed(i)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2008

data->dmif_required_sclk_for_urgent_latency[i] = bw_int_to_fixed(bw_def_na);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2018

data->output_bpphdmi[k] = bw_fixed_to_int(bw_mul(bw_div(bw_min2(bw_int_to_fixed(600), data->max_phyclk), data->pixel_rate[k]), bw_int_to_fixed(24)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2019

if (bw_meq(data->max_phyclk, bw_int_to_fixed(270))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2020

data->output_bppdp4_lane_hbr[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(270), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2022

if (bw_meq(data->max_phyclk, bw_int_to_fixed(540))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2023

data->output_bppdp4_lane_hbr2[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(540), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2025

if (bw_meq(data->max_phyclk, bw_int_to_fixed(810))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2026

data->output_bppdp4_lane_hbr3[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(810), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2070

vbios->high_yclk = bw_int_to_fixed(1600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2071

vbios->mid_yclk = bw_int_to_fixed(1600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2073

vbios->low_sclk = bw_int_to_fixed(200);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2074

vbios->mid1_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2075

vbios->mid2_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2076

vbios->mid3_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2077

vbios->mid4_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2078

vbios->mid5_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2079

vbios->mid6_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2081

vbios->low_voltage_max_dispclk = bw_int_to_fixed(352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2082

vbios->mid_voltage_max_dispclk = bw_int_to_fixed(467);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2083

vbios->high_voltage_max_dispclk = bw_int_to_fixed(643);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2084

vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2085

vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2086

vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2087

vbios->data_return_bus_width = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2088

vbios->trc = bw_int_to_fixed(50);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2089

vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2091

vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2093

vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2099

vbios->blackout_duration = bw_int_to_fixed(0); /* us */

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2100

vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2106

dceip->dmif_request_buffer_size = bw_int_to_fixed(768);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2123

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2131

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2132

dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2139

dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2140

dceip->lb_size_per_component444 = bw_int_to_fixed(82176);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2143

bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2144

dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2147

bw_int_to_fixed(164352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2148

dceip->underlay422_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2150

dceip->cursor_chunk_width = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2151

dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2153

bw_int_to_fixed(1920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2155

bw_int_to_fixed(1080);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2159

bw_int_to_fixed(25);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2160

dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2163

bw_int_to_fixed(128);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2166

bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2172

dceip->dispclk_per_request = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2176

dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2186

vbios->high_yclk = bw_int_to_fixed(6000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2187

vbios->mid_yclk = bw_int_to_fixed(3200);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2188

vbios->low_yclk = bw_int_to_fixed(1000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2189

vbios->low_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2190

vbios->mid1_sclk = bw_int_to_fixed(400);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2191

vbios->mid2_sclk = bw_int_to_fixed(500);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2192

vbios->mid3_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2193

vbios->mid4_sclk = bw_int_to_fixed(700);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2194

vbios->mid5_sclk = bw_int_to_fixed(800);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2195

vbios->mid6_sclk = bw_int_to_fixed(974);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2196

vbios->high_sclk = bw_int_to_fixed(1154);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2197

vbios->low_voltage_max_dispclk = bw_int_to_fixed(459);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2198

vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2199

vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2200

vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2201

vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2202

vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2203

vbios->data_return_bus_width = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2204

vbios->trc = bw_int_to_fixed(48);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2205

vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2206

vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2207

vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2208

vbios->nbp_state_change_latency = bw_int_to_fixed(45);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2209

vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2215

vbios->blackout_duration = bw_int_to_fixed(0); /* us */

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2216

vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2222

dceip->dmif_request_buffer_size = bw_int_to_fixed(768);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2239

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2247

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2248

dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2255

dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2256

dceip->lb_size_per_component444 = bw_int_to_fixed(245952);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2259

bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2260

dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2263

bw_int_to_fixed(164352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2264

dceip->underlay422_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2266

dceip->cursor_chunk_width = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2267

dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2269

bw_int_to_fixed(1920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2271

bw_int_to_fixed(1080);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2275

bw_int_to_fixed(25);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2276

dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2279

bw_int_to_fixed(128);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2282

bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2288

dceip->dispclk_per_request = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2292

dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2299

vbios->high_yclk = bw_int_to_fixed(6000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2300

vbios->mid_yclk = bw_int_to_fixed(3200);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2301

vbios->low_yclk = bw_int_to_fixed(1000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2302

vbios->low_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2303

vbios->mid1_sclk = bw_int_to_fixed(400);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2304

vbios->mid2_sclk = bw_int_to_fixed(500);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2305

vbios->mid3_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2306

vbios->mid4_sclk = bw_int_to_fixed(700);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2307

vbios->mid5_sclk = bw_int_to_fixed(800);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2308

vbios->mid6_sclk = bw_int_to_fixed(974);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2309

vbios->high_sclk = bw_int_to_fixed(1154);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2310

vbios->low_voltage_max_dispclk = bw_int_to_fixed(459);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2311

vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2312

vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2313

vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2314

vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2315

vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2316

vbios->data_return_bus_width = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2317

vbios->trc = bw_int_to_fixed(48);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2319

vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2321

vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2322

vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2323

vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2324

vbios->nbp_state_change_latency = bw_int_to_fixed(45);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2325

vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2331

vbios->blackout_duration = bw_int_to_fixed(0); /* us */

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2332

vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2338

dceip->dmif_request_buffer_size = bw_int_to_fixed(768);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2355

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2363

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2364

dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2371

dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2372

dceip->lb_size_per_component444 = bw_int_to_fixed(245952);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2375

bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2376

dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2379

bw_int_to_fixed(164352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2380

dceip->underlay422_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2382

dceip->cursor_chunk_width = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2383

dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2385

bw_int_to_fixed(1920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2387

bw_int_to_fixed(1080);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2391

bw_int_to_fixed(25);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2392

dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2395

bw_int_to_fixed(128);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2398

bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2404

dceip->dispclk_per_request = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2408

dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2415

vbios->high_yclk = bw_int_to_fixed(6000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2416

vbios->mid_yclk = bw_int_to_fixed(3200);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2417

vbios->low_yclk = bw_int_to_fixed(1000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2418

vbios->low_sclk = bw_int_to_fixed(678);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2419

vbios->mid1_sclk = bw_int_to_fixed(864);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2420

vbios->mid2_sclk = bw_int_to_fixed(900);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2421

vbios->mid3_sclk = bw_int_to_fixed(920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2422

vbios->mid4_sclk = bw_int_to_fixed(940);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2423

vbios->mid5_sclk = bw_int_to_fixed(960);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2424

vbios->mid6_sclk = bw_int_to_fixed(980);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2425

vbios->high_sclk = bw_int_to_fixed(1049);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2426

vbios->low_voltage_max_dispclk = bw_int_to_fixed(459);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2427

vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2428

vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2429

vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2430

vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2431

vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2432

vbios->data_return_bus_width = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2433

vbios->trc = bw_int_to_fixed(48);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2435

vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2437

vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2438

vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2439

vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2440

vbios->nbp_state_change_latency = bw_int_to_fixed(250);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2441

vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2447

vbios->blackout_duration = bw_int_to_fixed(0); /* us */

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2448

vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2454

dceip->dmif_request_buffer_size = bw_int_to_fixed(768);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2471

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2479

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2480

dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2487

dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2488

dceip->lb_size_per_component444 = bw_int_to_fixed(245952);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2491

bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2492

dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2495

bw_int_to_fixed(164352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2496

dceip->underlay422_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2498

dceip->cursor_chunk_width = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2499

dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2501

bw_int_to_fixed(1920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2503

bw_int_to_fixed(1080);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2507

bw_int_to_fixed(25);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2508

dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2511

bw_int_to_fixed(128);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2514

bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2520

dceip->dispclk_per_request = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2524

dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2531

vbios->high_yclk = bw_int_to_fixed(1866);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2532

vbios->mid_yclk = bw_int_to_fixed(1866);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2533

vbios->low_yclk = bw_int_to_fixed(1333);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2534

vbios->low_sclk = bw_int_to_fixed(200);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2535

vbios->mid1_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2536

vbios->mid2_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2537

vbios->mid3_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2538

vbios->mid4_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2539

vbios->mid5_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2540

vbios->mid6_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2541

vbios->high_sclk = bw_int_to_fixed(800);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2542

vbios->low_voltage_max_dispclk = bw_int_to_fixed(352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2543

vbios->mid_voltage_max_dispclk = bw_int_to_fixed(467);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2544

vbios->high_voltage_max_dispclk = bw_int_to_fixed(643);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2545

vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2546

vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2547

vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2548

vbios->data_return_bus_width = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2549

vbios->trc = bw_int_to_fixed(50);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2550

vbios->dmifmc_urgent_latency = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2552

vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2554

vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2560

vbios->blackout_duration = bw_int_to_fixed(0); /* us */

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2561

vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2567

dceip->dmif_request_buffer_size = bw_int_to_fixed(768);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2584

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2592

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2593

dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2600

dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2601

dceip->lb_size_per_component444 = bw_int_to_fixed(82176);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2604

bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2605

dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2608

bw_int_to_fixed(164352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2609

dceip->underlay422_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2611

dceip->cursor_chunk_width = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2612

dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2614

bw_int_to_fixed(1920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2616

bw_int_to_fixed(1080);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2620

bw_int_to_fixed(25);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2621

dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2624

bw_int_to_fixed(128);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2627

bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2633

dceip->dispclk_per_request = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2637

dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2644

vbios->high_yclk = bw_int_to_fixed(2400);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2645

vbios->mid_yclk = bw_int_to_fixed(1700);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2646

vbios->low_yclk = bw_int_to_fixed(1000);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2647

vbios->low_sclk = bw_int_to_fixed(300);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2648

vbios->mid1_sclk = bw_int_to_fixed(350);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2649

vbios->mid2_sclk = bw_int_to_fixed(400);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2650

vbios->mid3_sclk = bw_int_to_fixed(500);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2651

vbios->mid4_sclk = bw_int_to_fixed(600);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2652

vbios->mid5_sclk = bw_int_to_fixed(700);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2653

vbios->mid6_sclk = bw_int_to_fixed(760);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2654

vbios->high_sclk = bw_int_to_fixed(776);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2655

vbios->low_voltage_max_dispclk = bw_int_to_fixed(460);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2656

vbios->mid_voltage_max_dispclk = bw_int_to_fixed(670);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2657

vbios->high_voltage_max_dispclk = bw_int_to_fixed(1133);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2658

vbios->low_voltage_max_phyclk = bw_int_to_fixed(540);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2659

vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2660

vbios->high_voltage_max_phyclk = bw_int_to_fixed(810);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2661

vbios->data_return_bus_width = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2662

vbios->trc = bw_int_to_fixed(48);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2663

vbios->dmifmc_urgent_latency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2666

vbios->nbp_state_change_latency = bw_int_to_fixed(39);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2667

vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2673

vbios->blackout_duration = bw_int_to_fixed(0); /* us */

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2674

vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2680

dceip->dmif_request_buffer_size = bw_int_to_fixed(2304);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2697

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2705

bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2706

dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2713

dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2714

dceip->lb_size_per_component444 = bw_int_to_fixed(245952);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2717

bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2718

dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2721

bw_int_to_fixed(164352);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2722

dceip->underlay422_lb_size_per_component = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2724

dceip->cursor_chunk_width = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2725

dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2727

bw_int_to_fixed(1920);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2729

bw_int_to_fixed(1080);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2733

bw_int_to_fixed(25);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2734

dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2737

bw_int_to_fixed(128);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2740

bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2746

dceip->dispclk_per_request = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2750

dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2822

data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2823

data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2825

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2827

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2828

data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2829

data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2834

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2837

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(90);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2840

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(180);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2843

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(270);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2880

data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.viewport.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2881

data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.viewport.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2882

data->pitch_in_pixels[num_displays * 2 + j] = bw_int_to_fixed(

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2884

data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.h_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2885

data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.v_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

289

data->compression_rate[0] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2892

data->rotation_angle[num_displays * 2 + j] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2895

data->rotation_angle[num_displays * 2 + j] = bw_int_to_fixed(90);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2898

data->rotation_angle[num_displays * 2 + j] = bw_int_to_fixed(180);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

290

data->compression_rate[1] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2901

data->rotation_angle[num_displays * 2 + j] = bw_int_to_fixed(270);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

291

data->compression_rate[2] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

292

data->compression_rate[3] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2921

data->h_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2922

data->v_total[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_total);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2928

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2930

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2931

data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2932

data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2937

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2940

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(90);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2943

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(180);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2946

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(270);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

297

data->cursor_width_pixels[0] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

298

data->cursor_width_pixels[1] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2980

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2982

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.height);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2983

data->h_taps[num_displays + 4] = pipe[i].stream->src.width == pipe[i].stream->dst.width ? bw_int_to_fixed(1) : bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2984

data->v_taps[num_displays + 4] = pipe[i].stream->src.height == pipe[i].stream->dst.height ? bw_int_to_fixed(1) : bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2987

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

299

data->cursor_width_pixels[2] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2990

data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_addressable);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2992

data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.v_addressable);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2993

data->h_taps[num_displays + 4] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2994

data->v_taps[num_displays + 4] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2995

data->h_scale_ratio[num_displays + 4] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2996

data->v_scale_ratio[num_displays + 4] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

2997

data->rotation_angle[num_displays + 4] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

300

data->cursor_width_pixels[3] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3092

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3097

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3100

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3103

bw_mul(low_yclk, bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3106

bw_mul(mid_yclk, bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3109

bw_mul(high_yclk, bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3115

nbp_state_change_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3118

nbp_state_change_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3121

nbp_state_change_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3126

nbp_state_change_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3129

nbp_state_change_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3133

nbp_state_change_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3136

nbp_state_change_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3140

nbp_state_change_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3146

stutter_exit_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3149

stutter_exit_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3152

stutter_exit_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3156

stutter_exit_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3159

stutter_exit_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3163

stutter_exit_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3166

stutter_exit_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3170

stutter_exit_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3174

stutter_entry_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3177

stutter_entry_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3180

stutter_entry_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3184

stutter_entry_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3187

stutter_entry_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3191

stutter_entry_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3194

stutter_entry_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3198

stutter_entry_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3202

urgent_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3205

urgent_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3208

urgent_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3212

urgent_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3215

urgent_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3219

urgent_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3222

urgent_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3226

urgent_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3236

nbp_state_change_watermark[4],bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3239

nbp_state_change_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3242

nbp_state_change_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3247

nbp_state_change_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3250

nbp_state_change_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3254

nbp_state_change_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3257

nbp_state_change_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3261

nbp_state_change_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3267

stutter_exit_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3270

stutter_exit_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3273

stutter_exit_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3277

stutter_exit_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3280

stutter_exit_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3284

stutter_exit_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3287

stutter_exit_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3291

stutter_exit_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3295

stutter_entry_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3298

stutter_entry_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3301

stutter_entry_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3305

stutter_entry_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3308

stutter_entry_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3312

stutter_entry_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3315

stutter_entry_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3319

stutter_entry_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3323

urgent_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3326

urgent_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3329

urgent_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3333

urgent_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3336

urgent_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3340

urgent_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3343

urgent_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3347

urgent_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3357

nbp_state_change_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3360

nbp_state_change_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3363

nbp_state_change_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3367

nbp_state_change_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3370

nbp_state_change_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3374

nbp_state_change_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3377

nbp_state_change_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3381

nbp_state_change_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3386

stutter_exit_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3389

stutter_exit_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3392

stutter_exit_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3396

stutter_exit_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3399

stutter_exit_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3403

stutter_exit_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3406

stutter_exit_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3410

stutter_exit_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3413

stutter_entry_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3416

stutter_entry_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3419

stutter_entry_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3423

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3426

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3430

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3433

bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3437

stutter_entry_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3440

urgent_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3443

urgent_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3446

urgent_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3450

urgent_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3453

urgent_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3457

urgent_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

346

data->compression_rate[i] = bw_int_to_fixed(vbios->average_compression_rate);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3460

urgent_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3464

urgent_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3488

nbp_state_change_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3491

nbp_state_change_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3494

nbp_state_change_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3498

nbp_state_change_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

350

data->compression_rate[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3501

nbp_state_change_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3505

nbp_state_change_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3508

nbp_state_change_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3512

nbp_state_change_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3516

stutter_exit_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3519

stutter_exit_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3522

stutter_exit_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3526

stutter_exit_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3529

stutter_exit_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3533

stutter_exit_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3536

stutter_exit_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3540

stutter_exit_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3544

stutter_entry_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3547

stutter_entry_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3550

stutter_entry_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3554

stutter_entry_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3557

stutter_entry_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3561

stutter_entry_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3564

stutter_entry_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3568

stutter_entry_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3572

urgent_watermark[4], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3575

urgent_watermark[5], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3578

urgent_watermark[6], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3582

urgent_watermark[0], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3585

urgent_watermark[1], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3589

urgent_watermark[7], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

359

data->cursor_width_pixels[i] = bw_int_to_fixed(vbios->cursor_width);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3592

urgent_watermark[8], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

3596

urgent_watermark[9], bw_int_to_fixed(1000)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

380

data->h_taps[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

381

data->h_taps[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

382

data->v_taps[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

383

data->v_taps[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

384

data->rotation_angle[maximum_number_of_surfaces - 2] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

385

data->rotation_angle[maximum_number_of_surfaces - 1] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

390

data->compression_rate[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

391

data->compression_rate[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

407

data->h_scale_ratio[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

408

data->h_scale_ratio[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

409

data->v_scale_ratio[maximum_number_of_surfaces - 2] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

410

data->v_scale_ratio[maximum_number_of_surfaces - 1] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

413

data->cursor_width_pixels[maximum_number_of_surfaces - 2] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

414

data->cursor_width_pixels[maximum_number_of_surfaces - 1] = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

433

if (bw_equ(data->h_scale_ratio[i], bw_int_to_fixed(1)) && bw_equ(data->v_scale_ratio[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics && data->stereo_mode[i] == bw_def_mono && data->interlace_mode[i] == 0) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

434

data->h_taps[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

435

data->v_taps[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

438

data->pitch_in_pixels_after_surface_type[i] = bw_div(data->pitch_in_pixels[i], bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

439

data->src_width_after_surface_type = bw_div(data->src_width[i], bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

440

data->src_height_after_surface_type = bw_div(data->src_height[i], bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

441

data->hsr_after_surface_type = bw_div(data->h_scale_ratio[i], bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

442

data->vsr_after_surface_type = bw_div(data->v_scale_ratio[i], bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

451

if ((bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270))) && surface_type[i] != bw_def_display_write_back420_luma && surface_type[i] != bw_def_display_write_back420_chroma) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

466

data->source_height_pixels = bw_mul(bw_int_to_fixed(2), data->src_height_after_rotation);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

468

data->vsr_after_stereo = bw_mul(bw_int_to_fixed(1), data->vsr_after_rotation);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

471

data->source_width_pixels[i] = bw_mul(bw_int_to_fixed(2), data->src_width_after_rotation);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

473

data->hsr_after_stereo = bw_mul(bw_int_to_fixed(1), data->hsr_after_rotation);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

485

data->vsr[i] = bw_mul(data->vsr_after_stereo, bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

491

data->source_width_rounded_up_to_chunks[i] = bw_add(bw_floor2(bw_sub(data->source_width_pixels[i], bw_int_to_fixed(1)), bw_int_to_fixed(128)), bw_int_to_fixed(256));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

494

data->source_width_rounded_up_to_chunks[i] = bw_ceil2(data->source_width_pixels[i], bw_int_to_fixed(128));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

519

if (bw_neq(data->hsr[i], bw_int_to_fixed(1))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

520

if (bw_mtn(data->hsr[i], bw_int_to_fixed(4))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

528

if (dceip->pre_downscaler_enabled == 1 && bw_mtn(data->hsr[i], bw_int_to_fixed(1)) && bw_leq(data->hsr[i], bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

539

if (bw_neq(data->vsr[i], bw_int_to_fixed(1))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

540

if (bw_mtn(data->vsr[i], bw_int_to_fixed(4))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

554

if ((dceip->pre_downscaler_enabled && bw_mtn(data->hsr[i], bw_int_to_fixed(1)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

562

data->lb_line_pitch = bw_ceil2(bw_mul(bw_div(bw_frc_to_fixed(2401171875ul, 100000000), bw_int_to_fixed(3)), bw_ceil2(data->source_width_in_lb, bw_int_to_fixed(8))), bw_int_to_fixed(48));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

565

data->lb_line_pitch = bw_ceil2(bw_mul(bw_div(bw_frc_to_fixed(300234375, 10000000), bw_int_to_fixed(3)), bw_ceil2(data->source_width_in_lb, bw_int_to_fixed(8))), bw_int_to_fixed(48));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

568

data->lb_line_pitch = bw_ceil2(bw_mul(bw_int_to_fixed(data->lb_bpc[i]), data->source_width_in_lb), bw_int_to_fixed(48));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

571

data->lb_partitions[i] = bw_floor2(bw_div(data->lb_size_per_component[i], data->lb_line_pitch), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

574

data->lb_partitions_max[i] = bw_int_to_fixed(10);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

577

data->lb_partitions_max[i] = bw_int_to_fixed(7);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

580

if (bw_mtn(bw_add(data->v_taps[i], bw_int_to_fixed(1)), data->lb_partitions[i])) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

587

if (data->enable[i] && data->fbc_en[i] == 1 && (bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270)) || data->stereo_mode[i] != bw_def_mono || data->bytes_per_pixel[i] != 4)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

594

if ((bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270))) && (tiling_mode[i] == bw_def_linear || data->stereo_mode[i] != bw_def_mono)) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

617

data->dram_efficiency = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

646

if ((bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270)))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

681

if (bw_equ(data->rotation_angle[i], bw_int_to_fixed(90)) || bw_equ(data->rotation_angle[i], bw_int_to_fixed(270))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

688

data->bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

689

data->useful_bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

690

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

691

data->latency_hiding_lines[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

694

data->bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

695

data->useful_bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

696

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

697

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

700

if (surface_type[i] == bw_def_graphics || (bw_mtn(data->source_width_rounded_up_to_chunks[i], bw_ceil2(data->underlay_maximum_source_efficient_for_tiling, bw_int_to_fixed(256))))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

703

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

704

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

706

data->bytes_per_request[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

707

data->useful_bytes_per_request[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

710

data->bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

711

data->useful_bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

716

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

717

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

718

data->bytes_per_request[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

719

data->useful_bytes_per_request[i] = bw_int_to_fixed(16);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

722

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

723

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

724

data->bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

725

data->useful_bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

729

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

730

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

731

data->bytes_per_request[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

732

data->useful_bytes_per_request[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

735

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

736

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

737

data->bytes_per_request[i] = bw_int_to_fixed(32);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

738

data->useful_bytes_per_request[i] = bw_int_to_fixed(16);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

743

data->bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

744

data->useful_bytes_per_request[i] = bw_int_to_fixed(64);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

746

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(8);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

747

data->latency_hiding_lines[i] = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

752

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

753

data->latency_hiding_lines[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

756

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

757

data->latency_hiding_lines[i] = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

760

data->lines_interleaved_in_mem_access[i] = bw_int_to_fixed(8);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

761

data->latency_hiding_lines[i] = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

803

data->v_filter_init[i] = bw_floor2(bw_div((bw_add(bw_add(bw_add(bw_int_to_fixed(1), data->v_taps[i]), data->vsr[i]), bw_mul(bw_mul(bw_int_to_fixed(data->interlace_mode[i]), bw_frc_to_fixed(5, 10)), data->vsr[i]))), bw_int_to_fixed(2)), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

805

data->v_filter_init[i] = bw_add(data->v_filter_init[i], bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

808

data->v_filter_init[i] = bw_min2(data->v_filter_init[i], bw_int_to_fixed(4));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

811

data->num_lines_at_frame_start = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

814

data->num_lines_at_frame_start = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

816

if ((bw_mtn(data->vsr[i], bw_int_to_fixed(1)) && surface_type[i] == bw_def_graphics) || data->panning_and_bezel_adjustment == bw_def_any_lines) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

819

else if ((((dceip->underlay_downscale_prefetch_enabled == 1 && surface_type[i] != bw_def_graphics) || surface_type[i] == bw_def_graphics) && (bw_mtn(data->lb_partitions[i], bw_add(data->v_taps[i], bw_ceil2(data->vsr[i], bw_int_to_fixed(1))))))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

825

data->lb_lines_in_per_line_out_in_beginning_of_frame[i] = bw_div(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->num_lines_at_frame_start);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

827

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_max2(bw_int_to_fixed(1), data->vsr[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

829

else if (bw_leq(data->vsr[i], bw_int_to_fixed(1))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

830

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

833

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_div(bw_int_to_fixed(4), bw_int_to_fixed(3));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

836

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_div(bw_int_to_fixed(6), bw_int_to_fixed(4));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

838

else if (bw_leq(data->vsr[i], bw_int_to_fixed(2))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

839

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(2);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

841

else if (bw_leq(data->vsr[i], bw_int_to_fixed(3))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

842

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(3);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

845

data->lb_lines_in_per_line_out_in_middle_of_frame[i] = bw_int_to_fixed(4);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

847

if (data->line_buffer_prefetch[i] == 1 || bw_equ(data->lb_lines_in_per_line_out_in_middle_of_frame[i], bw_int_to_fixed(2)) || bw_equ(data->lb_lines_in_per_line_out_in_middle_of_frame[i], bw_int_to_fixed(4))) {

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

848

data->horizontal_blank_and_chunk_granularity_factor[i] = bw_int_to_fixed(1);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

851

data->horizontal_blank_and_chunk_granularity_factor[i] = bw_div(data->h_total[i], (bw_div((bw_add(data->h_total[i], bw_div((bw_sub(data->source_width_pixels[i], bw_int_to_fixed(dceip->chunk_width))), data->hsr[i]))), bw_int_to_fixed(2))));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

853

data->request_bandwidth[i] = bw_div(bw_mul(bw_div(bw_mul(bw_div(bw_mul(bw_max2(data->lb_lines_in_per_line_out_in_beginning_of_frame[i], data->lb_lines_in_per_line_out_in_middle_of_frame[i]), data->source_width_rounded_up_to_chunks[i]), (bw_div(data->h_total[i], data->pixel_rate[i]))), bw_int_to_fixed(data->bytes_per_pixel[i])), data->useful_bytes_per_request[i]), data->lines_interleaved_in_mem_access[i]), data->latency_hiding_lines[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

889

data->data_buffer_size[i] = bw_int_to_fixed(dceip->display_write_back420_luma_mcifwr_buffer_size);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

892

data->data_buffer_size[i] = bw_int_to_fixed(dceip->display_write_back420_chroma_mcifwr_buffer_size);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

895

data->data_buffer_size[i] = bw_int_to_fixed(dceip->underlay_luma_dmif_size);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

898

data->data_buffer_size[i] = bw_div(bw_int_to_fixed(dceip->underlay_chroma_dmif_size), bw_int_to_fixed(2));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

902

data->data_buffer_size[i] = bw_int_to_fixed(dceip->underlay_luma_dmif_size);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

905

data->data_buffer_size[i] = bw_add(bw_int_to_fixed(dceip->underlay_luma_dmif_size), bw_int_to_fixed(dceip->underlay_chroma_dmif_size));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

912

data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(max_chunks_fbc_mode), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_mul(bw_int_to_fixed(dceip->max_dmif_buffer_allocated), bw_int_to_fixed(dceip->graphics_dmif_size)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

915

data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(max_chunks_fbc_mode), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_int_to_fixed(dceip->graphics_dmif_size));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

921

data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(data->max_chunks_non_fbc_mode[i]), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_mul(bw_int_to_fixed(dceip->max_dmif_buffer_allocated), bw_int_to_fixed(dceip->graphics_dmif_size)));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

924

data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(data->max_chunks_non_fbc_mode[i]), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_int_to_fixed(dceip->graphics_dmif_size));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

930

data->memory_chunk_size_in_bytes[i] = bw_int_to_fixed(1024);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

931

data->pipe_chunk_size_in_bytes[i] = bw_int_to_fixed(1024);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

934

data->memory_chunk_size_in_bytes[i] = bw_mul(bw_mul(bw_int_to_fixed(dceip->chunk_width), data->lines_interleaved_in_mem_access[i]), bw_int_to_fixed(data->bytes_per_pixel[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

935

data->pipe_chunk_size_in_bytes[i] = bw_mul(bw_mul(bw_int_to_fixed(dceip->chunk_width), bw_int_to_fixed(dceip->lines_interleaved_into_lb)), bw_int_to_fixed(data->bytes_per_pixel[i]));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

939

data->min_dmif_size_in_time = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

940

data->min_mcifwr_size_in_time = bw_int_to_fixed(9999);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

955

data->total_requests_for_dmif_size = bw_int_to_fixed(0);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

975

data->outstanding_chunk_request_limit[i] = bw_int_to_fixed(127);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

978

data->outstanding_chunk_request_limit[i] = bw_ceil2(bw_div(data->adjusted_data_buffer_size[i], data->pipe_chunk_size_in_bytes[i]), bw_int_to_fixed(1));

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

981

data->outstanding_chunk_request_limit[i] = bw_max2(bw_int_to_fixed(127), data->outstanding_chunk_request_limit[i]);

drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c

995

if (data->number_of_displays > 1 || (bw_neq(data->rotation_angle[4], bw_int_to_fixed(0)) && bw_neq(data->rotation_angle[4], bw_int_to_fixed(180)))) {