br32
CSKY_INSN_SET_SIMULATE(br32, insn);
__CSKY_INSN_FUNCS(br32, 0x0000ffff, 0x0000e800)
br32(bp, B44_DMATX_PTR);
br32(bp, reg);
br32(bp, reg);
if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) {
br32(bp, B44_MDIO_CTRL);
if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
br32(bp, B44_ENET_CTRL);
u32 val = br32(bp, B44_DEVCTRL);
br32(bp, B44_DEVCTRL);
val = br32(bp, B44_CAM_CTRL);
val = br32(bp, B44_RXCONFIG);
val = br32(bp, B44_ENET_CTRL);
val = br32(bp, B44_DEVCTRL);
bw32(bp, SSB_TMSLOW, br32(bp, SSB_TMSLOW) | SSB_TMSLOW_PE);
val = br32(bp, B44_DEVCTRL);
val = br32(bp, B44_RXCONFIG);
val = br32(bp, B44_CAM_CTRL);
u32 val = br32(bp, reg);
u32 val = br32(bp, B44_TX_CTRL);
br32(bp, B44_IMASK);
*val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;
val = br32(bp, B44_RXCONFIG);
val = br32(bp, B44_MAC_FLOW);
*val++ += br32(bp, reg);
*val++ += br32(bp, reg);
u32 val = br32(bp, B44_TX_CTRL);
u32 val = br32(bp, B44_TX_CTRL);
cur = br32(bp, B44_DMATX_STAT) & DMATX_STAT_CDMASK;
prod = br32(bp, B44_DMARX_STAT) & DMARX_STAT_CDMASK;
istat = br32(bp, B44_ISTAT);
imask = br32(bp, B44_IMASK);
br32(bp, B44_ISTAT);