drivers/gpu/drm/amd/display/dc/core/dc.c

3828

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/core/dc.c

3876

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/core/dc.c

3918

struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc.c

3961

struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc.c

4079

struct block_sequence_state seq_state = { .steps = block_sequence, .num_steps = num_steps };

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1681

void hwss_add_optc_pipe_control_lock(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1698

void hwss_add_hubp_set_flip_control_gsl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1713

void hwss_add_hubp_program_triplebuffer(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1730

void hwss_add_hubp_update_plane_addr(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1745

void hwss_add_dpp_set_input_transfer_func(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1762

void hwss_add_dpp_program_gamut_remap(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1775

void hwss_add_dpp_program_bias_and_scale(struct block_sequence_state *seq_state, struct pipe_ctx *pipe_ctx)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1787

void hwss_add_optc_program_manual_trigger(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1800

void hwss_add_dpp_set_output_transfer_func(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1817

void hwss_add_mpc_update_visual_confirm(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1834

void hwss_add_mpc_power_on_mpc_mem_pwr(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1851

void hwss_add_mpc_set_output_csc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1870

void hwss_add_mpc_set_ocsc_default(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1889

void hwss_add_dmub_send_dmcub_cmd(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1906

void hwss_add_dmub_subvp_save_surf_addr(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1923

void hwss_add_hubp_wait_for_dcc_meta_prop(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1938

void hwss_add_hubp_wait_pipe_read_start(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1951

void hwss_add_hws_apply_update_flags_for_phantom(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1964

void hwss_add_hws_update_phantom_vp_position(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1981

void hwss_add_optc_set_odm_combine(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1999

void hwss_add_optc_set_odm_bypass(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2022

void hwss_add_tg_program_global_sync(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2045

void hwss_add_tg_wait_for_state(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2060

void hwss_add_tg_set_vtg_params(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2077

void hwss_add_vertical_interrupt_setup(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2092

void hwss_add_tg_setup_vertical_interrupt2(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2106

void hwss_add_dpp_set_hdr_multiplier(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2120

void hwss_add_hubp_program_det_size(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2134

void hwss_add_hubp_program_mcache_id(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2146

void hwss_add_hubbub_force_pstate_change_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2163

void hwss_add_hubp_program_det_segments(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2180

void hwss_add_opp_set_dyn_expansion(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2199

void hwss_add_opp_program_fmt(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2213

void hwss_add_opp_program_left_edge_extra_pixel(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2230

void hwss_add_abm_set_pipe(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2245

void hwss_add_abm_set_level(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2260

void hwss_add_tg_enable_crtc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2273

void hwss_add_hubp_wait_flip_pending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2290

void hwss_add_tg_wait_double_buffer_pending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2304

void hwss_add_hubp_enable_3dlut_fl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3852

void hwss_add_dccg_set_dto_dscclk(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3864

void hwss_add_dsc_calculate_and_set_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3876

void hwss_add_mpc_remove_mpcc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3888

void hwss_add_opp_set_mpcc_disconnect_pending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3900

void hwss_add_hubp_disconnect(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3910

void hwss_add_dsc_enable_with_opp(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3920

void hwss_add_tg_set_dsc_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3932

void hwss_add_dsc_disconnect(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3942

void hwss_add_dc_set_optimized_required(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3953

void hwss_add_abm_set_immediate_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3964

void hwss_add_opp_set_disp_pattern_generator(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3993

void hwss_add_mpc_update_blending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4010

void hwss_add_mpc_insert_plane(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4035

void hwss_add_mpc_assert_idle_mpcc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4050

void hwss_add_hubp_set_blank(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4062

void hwss_add_opp_program_bit_depth_reduction(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4076

void hwss_add_dpp_program_cm_hist(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4090

void hwss_add_dc_ip_request_cntl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4102

void hwss_add_dwbc_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4114

void hwss_add_mcif_wb_config_buf(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4128

void hwss_add_mcif_wb_config_arb(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4140

void hwss_add_mcif_wb_enable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4150

void hwss_add_mcif_wb_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4160

void hwss_add_mpc_set_dwb_mux(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4174

void hwss_add_mpc_disable_dwb_mux(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4186

void hwss_add_dwbc_enable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4198

void hwss_add_dwbc_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4208

void hwss_add_tg_set_gsl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4220

void hwss_add_tg_set_gsl_source_select(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4234

void hwss_add_hubp_update_mall_sel(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4248

void hwss_add_hubp_prepare_subvp_buffering(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4260

void hwss_add_hubp_set_blank_en(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4272

void hwss_add_hubp_disable_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4284

void hwss_add_hubbub_soft_reset(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4298

void hwss_add_hubp_clk_cntl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4310

void hwss_add_dpp_dppclk_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4324

void hwss_add_disable_phantom_crtc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4334

void hwss_add_dsc_pg_status(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4348

void hwss_add_dsc_wait_disconnect_pending_clear(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4360

void hwss_add_dsc_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4372

void hwss_add_dccg_set_ref_dscclk(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4386

void hwss_add_dpp_root_clock_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4400

void hwss_add_dpp_pg_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4414

void hwss_add_hubp_pg_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4428

void hwss_add_hubp_init(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4438

void hwss_add_hubp_reset(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4448

void hwss_add_dpp_reset(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4458

void hwss_add_opp_pipe_clock_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4470

void hwss_add_hubp_set_vm_system_aperture_settings(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4486

void hwss_add_hubp_set_flip_int(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4496

void hwss_add_dccg_update_dpp_dto(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4510

void hwss_add_hubp_vtg_sel(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4522

void hwss_add_hubp_setup2(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4538

void hwss_add_hubp_setup(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4556

void hwss_add_hubp_set_unbounded_requesting(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4568

void hwss_add_hubp_setup_interdependent2(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4580

void hwss_add_hubp_setup_interdependent(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4594

void hwss_add_hubp_program_surface_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4618

void hwss_add_dpp_setup_dpp(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4628

void hwss_add_dpp_set_cursor_matrix(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4642

void hwss_add_dpp_set_scaler(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4654

void hwss_add_hubp_mem_program_viewport(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4668

void hwss_add_abort_cursor_offload_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4680

void hwss_add_set_cursor_attribute(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4692

void hwss_add_hubp_set_cursor_attributes(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4704

void hwss_add_dpp_set_cursor_attributes(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4716

void hwss_add_set_cursor_position(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4728

void hwss_add_set_cursor_sdr_white_level(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4740

void hwss_add_program_output_csc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4758

void hwss_add_phantom_hubp_post_enable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4768

void hwss_add_update_force_pstate(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4780

void hwss_add_hubbub_apply_dedcn21_147_wa(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4790

void hwss_add_hubbub_allow_self_refresh_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4804

void hwss_add_tg_get_frame_count(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4816

void hwss_add_begin_cursor_offload_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4828

void hwss_add_cursor_lock(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4846

void hwss_add_send_update_cursor_info_to_dmu(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4858

void hwss_add_update_cursor_offload_pipe(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4870

void hwss_add_commit_cursor_offload_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4882

void hwss_add_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4892

void hwss_add_hpo_frl_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4902

void hwss_add_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4912

void hwss_add_hpo_dp_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4922

void hwss_add_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4932

void hwss_add_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4942

void hwss_add_dsc_set_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4956

void hwss_add_stream_enc_dp_set_dsc_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4968

void hwss_add_hpo_dp_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4984

void hwss_add_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5000

void hwss_add_hpo_frl_stream_enc_set_dsc_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5014

void hwss_add_setup_periodic_interrupt(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5026

void hwss_add_dp_trace_source_sequence(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5038

void hwss_add_set_dmdata_attributes(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5059

void hwss_add_link_increase_mst_payload(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5071

void hwss_add_link_reduce_mst_payload(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5083

void hwss_add_dp_set_test_pattern(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5103

void hwss_add_link_set_dpms_off(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5113

void hwss_add_disable_audio_stream(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5123

void hwss_add_prepare_bandwidth(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

5135

void hwss_add_link_set_dpms_on(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1697

struct pipe_ctx *otg_master, struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1789

struct pipe_ctx *otg_master, struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2367

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3150

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3188

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3230

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3309

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3368

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3401

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3426

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3461

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3534

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3587

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3632

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3694

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3877

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3977

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4006

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4019

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4036

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4098

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4112

struct block_sequence_state *seq_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

107

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

123

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

127

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

132

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

140

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

147

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

152

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

158

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

164

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

170

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

175

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

181

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

186

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

190

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

196

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

199

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

202

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

205

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

208

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

211

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

87

struct pipe_ctx *otg_master, struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1244

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1265

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1520

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1527

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1533

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1919

void hwss_add_optc_pipe_control_lock(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1922

void hwss_add_hubp_set_flip_control_gsl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1925

void hwss_add_hubp_program_triplebuffer(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1928

void hwss_add_hubp_update_plane_addr(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1931

void hwss_add_dpp_set_input_transfer_func(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1934

void hwss_add_dpp_program_gamut_remap(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1937

void hwss_add_dpp_program_bias_and_scale(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1940

void hwss_add_optc_program_manual_trigger(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1943

void hwss_add_dpp_set_output_transfer_func(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1946

void hwss_add_mpc_update_visual_confirm(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1949

void hwss_add_mpc_power_on_mpc_mem_pwr(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1952

void hwss_add_mpc_set_output_csc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1955

void hwss_add_mpc_set_ocsc_default(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1958

void hwss_add_dmub_send_dmcub_cmd(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1961

void hwss_add_dmub_subvp_save_surf_addr(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1964

void hwss_add_hubp_wait_for_dcc_meta_prop(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1967

void hwss_add_hubp_wait_pipe_read_start(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1970

void hwss_add_hws_apply_update_flags_for_phantom(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1973

void hwss_add_hws_update_phantom_vp_position(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1976

void hwss_add_optc_set_odm_combine(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1980

void hwss_add_optc_set_odm_bypass(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1983

void hwss_add_tg_program_global_sync(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1991

void hwss_add_tg_wait_for_state(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1994

void hwss_add_tg_set_vtg_params(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1997

void hwss_add_vertical_interrupt_setup(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2000

void hwss_add_tg_setup_vertical_interrupt2(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2003

void hwss_add_dpp_set_hdr_multiplier(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2006

void hwss_add_hubp_program_det_size(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2009

void hwss_add_hubp_program_mcache_id(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2012

void hwss_add_hubbub_force_pstate_change_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2015

void hwss_add_hubp_program_det_segments(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2018

void hwss_add_opp_set_dyn_expansion(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2022

void hwss_add_opp_program_fmt(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2026

void hwss_add_abm_set_pipe(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2029

void hwss_add_abm_set_level(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2032

void hwss_add_tg_enable_crtc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2035

void hwss_add_hubp_wait_flip_pending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2038

void hwss_add_tg_wait_double_buffer_pending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2041

void hwss_add_dccg_set_dto_dscclk(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2044

void hwss_add_dsc_calculate_and_set_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2047

void hwss_add_mpc_remove_mpcc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2050

void hwss_add_opp_set_mpcc_disconnect_pending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2053

void hwss_add_hubp_disconnect(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2056

void hwss_add_dsc_enable_with_opp(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2059

void hwss_add_dsc_disconnect(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2062

void hwss_add_dc_set_optimized_required(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2065

void hwss_add_abm_set_immediate_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2068

void hwss_add_opp_set_disp_pattern_generator(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2079

void hwss_add_opp_program_bit_depth_reduction(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2084

void hwss_add_dpp_program_cm_hist(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2089

void hwss_add_dc_ip_request_cntl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2093

void hwss_add_dwbc_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2097

void hwss_add_mcif_wb_config_buf(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2102

void hwss_add_mcif_wb_config_arb(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2106

void hwss_add_mcif_wb_enable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2109

void hwss_add_mcif_wb_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2112

void hwss_add_mpc_set_dwb_mux(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2117

void hwss_add_mpc_disable_dwb_mux(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2121

void hwss_add_dwbc_enable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2125

void hwss_add_dwbc_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2128

void hwss_add_tg_set_gsl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2132

void hwss_add_tg_set_gsl_source_select(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2137

void hwss_add_hubp_update_mall_sel(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2142

void hwss_add_hubp_prepare_subvp_buffering(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2146

void hwss_add_hubp_set_blank_en(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2150

void hwss_add_hubp_disable_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2154

void hwss_add_hubbub_soft_reset(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2159

void hwss_add_hubp_clk_cntl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2163

void hwss_add_dpp_dppclk_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2168

void hwss_add_disable_phantom_crtc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2171

void hwss_add_dsc_pg_status(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2176

void hwss_add_dsc_wait_disconnect_pending_clear(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2180

void hwss_add_dsc_disable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2184

void hwss_add_dccg_set_ref_dscclk(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2189

void hwss_add_dpp_root_clock_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2194

void hwss_add_dpp_pg_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2199

void hwss_add_hubp_pg_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2204

void hwss_add_hubp_set_blank(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2208

void hwss_add_hubp_init(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2211

void hwss_add_hubp_reset(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2214

void hwss_add_dpp_reset(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2217

void hwss_add_opp_pipe_clock_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2221

void hwss_add_hubp_set_vm_system_aperture_settings(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2227

void hwss_add_hubp_set_flip_int(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2230

void hwss_add_dccg_update_dpp_dto(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2235

void hwss_add_hubp_vtg_sel(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2239

void hwss_add_hubp_setup2(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2245

void hwss_add_hubp_setup(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2252

void hwss_add_hubp_set_unbounded_requesting(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2256

void hwss_add_hubp_setup_interdependent2(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2260

void hwss_add_hubp_setup_interdependent(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2264

void hwss_add_hubp_program_surface_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2274

void hwss_add_dpp_setup_dpp(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2277

void hwss_add_dpp_set_cursor_matrix(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2282

void hwss_add_mpc_update_blending(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2287

void hwss_add_mpc_assert_idle_mpcc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2291

void hwss_add_mpc_insert_plane(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2300

void hwss_add_dpp_set_scaler(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2304

void hwss_add_hubp_mem_program_viewport(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2309

void hwss_add_abort_cursor_offload_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2313

void hwss_add_set_cursor_attribute(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2317

void hwss_add_hubp_set_cursor_attributes(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2321

void hwss_add_dpp_set_cursor_attributes(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2325

void hwss_add_set_cursor_position(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2329

void hwss_add_set_cursor_sdr_white_level(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2333

void hwss_add_program_output_csc(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2340

void hwss_add_phantom_hubp_post_enable(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2343

void hwss_add_update_force_pstate(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2347

void hwss_add_hubbub_apply_dedcn21_147_wa(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2350

void hwss_add_hubbub_allow_self_refresh_control(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2355

void hwss_add_tg_get_frame_count(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2359

void hwss_add_tg_set_dsc_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2364

void hwss_add_opp_program_left_edge_extra_pixel(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2369

void hwss_add_hubp_enable_3dlut_fl(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2372

void hwss_add_begin_cursor_offload_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2376

void hwss_add_cursor_lock(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2381

void hwss_add_send_update_cursor_info_to_dmu(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2385

void hwss_add_update_cursor_offload_pipe(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2389

void hwss_add_commit_cursor_offload_update(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2393

void hwss_add_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2396

void hwss_add_hpo_frl_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2399

void hwss_add_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2402

void hwss_add_hpo_dp_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2405

void hwss_add_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2408

void hwss_add_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2411

void hwss_add_dsc_set_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2416

void hwss_add_stream_enc_dp_set_dsc_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2420

void hwss_add_hpo_dp_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2426

void hwss_add_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2432

void hwss_add_hpo_frl_stream_enc_set_dsc_config(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2437

void hwss_add_setup_periodic_interrupt(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2441

void hwss_add_dp_trace_source_sequence(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2445

void hwss_add_set_dmdata_attributes(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2448

void hwss_add_link_increase_mst_payload(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2452

void hwss_add_link_reduce_mst_payload(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2456

void hwss_add_dp_set_test_pattern(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2464

void hwss_add_link_set_dpms_off(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2467

void hwss_add_disable_audio_stream(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2470

void hwss_add_prepare_bandwidth(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2474

void hwss_add_link_set_dpms_on(struct block_sequence_state *seq_state,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

110

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

120

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

131

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

164

struct pipe_ctx *pipe_ctx, struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

172

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

176

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

179

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

187

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

203

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

87

struct block_sequence_state *seq_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

90

struct block_sequence_state *seq_state);