arch/alpha/include/asm/agp_backend.h
16
} bits;
arch/alpha/include/asm/bitops.h
337
unsigned long bits, qofs, bofs;
arch/alpha/include/asm/bitops.h
339
bits = __kernel_cmpbge(word, ~0UL);
arch/alpha/include/asm/bitops.h
340
qofs = ffz_b(bits);
arch/alpha/include/asm/bitops.h
341
bits = __kernel_extbl(word, qofs);
arch/alpha/include/asm/bitops.h
342
bofs = ffz_b(bits);
arch/alpha/include/asm/bitops.h
357
unsigned long bits, qofs, bofs;
arch/alpha/include/asm/bitops.h
359
bits = __kernel_cmpbge(0, word);
arch/alpha/include/asm/bitops.h
360
qofs = ffz_b(bits);
arch/alpha/include/asm/bitops.h
361
bits = __kernel_extbl(word, qofs);
arch/alpha/include/asm/bitops.h
362
bofs = ffz_b(~bits);
arch/alpha/include/asm/core_marvel.h
217
} bits;
arch/alpha/include/asm/core_marvel.h
237
} bits;
arch/alpha/include/asm/extable.h
34
} bits;
arch/alpha/include/asm/extable.h
41
if ((_fixup)->fixup.bits.valreg != 31) \
arch/alpha/include/asm/extable.h
42
map_reg((_fixup)->fixup.bits.valreg) = 0; \
arch/alpha/include/asm/extable.h
43
if ((_fixup)->fixup.bits.errreg != 31) \
arch/alpha/include/asm/extable.h
44
map_reg((_fixup)->fixup.bits.errreg) = -EFAULT; \
arch/alpha/include/asm/extable.h
45
(pc) + (_fixup)->fixup.bits.nextinsn; \
arch/alpha/include/asm/word-at-a-time.h
22
static inline unsigned long has_zero(unsigned long val, unsigned long *bits, const struct word_at_a_time *c)
arch/alpha/include/asm/word-at-a-time.h
25
*bits = zero_locations;
arch/alpha/include/asm/word-at-a-time.h
29
static inline unsigned long prep_zero_mask(unsigned long val, unsigned long bits, const struct word_at_a_time *c)
arch/alpha/include/asm/word-at-a-time.h
31
return bits;
arch/alpha/include/asm/word-at-a-time.h
34
#define create_zero_mask(bits) (bits)
arch/alpha/include/asm/word-at-a-time.h
36
static inline unsigned long find_zero(unsigned long bits)
arch/alpha/include/asm/word-at-a-time.h
40
return __kernel_cttz(bits);
arch/alpha/include/asm/word-at-a-time.h
44
bits &= -bits;
arch/alpha/include/asm/word-at-a-time.h
46
t1 = bits & 0xf0;
arch/alpha/include/asm/word-at-a-time.h
47
t2 = bits & 0xcc;
arch/alpha/include/asm/word-at-a-time.h
48
t3 = bits & 0xaa;
arch/alpha/kernel/core_marvel.c
1088
agp->capability.bits.rq = 0xf;
arch/alpha/kernel/core_marvel.c
927
if (agp->mode.bits.rate != 2)
arch/alpha/kernel/core_marvel.c
936
if (agp->mode.bits.rate == 2)
arch/alpha/kernel/core_marvel.c
956
agp->mode.bits.rate,
arch/alpha/kernel/core_marvel.c
959
agp->mode.bits.rate = new_rate;
arch/alpha/kernel/core_marvel.c
963
agp->hose->index, agp->mode.bits.rate,
arch/alpha/kernel/core_marvel.c
964
agp->mode.bits.sba ? " - SBA" : "", agp->mode.bits.rq);
arch/alpha/kernel/core_titan.c
648
pctl.pctl_r_bits.apctl_v_agp_sba_en = agp->mode.bits.sba;
arch/alpha/kernel/core_titan.c
652
if (agp->mode.bits.rate & 2)
arch/alpha/kernel/core_titan.c
655
if (agp->mode.bits.rate & 4)
arch/alpha/kernel/core_titan.c
666
pctl.pctl_r_bits.apctl_v_agp_en = agp->mode.bits.enable;
arch/alpha/kernel/core_titan.c
787
agp->capability.bits.rate = 3; /* 2x, 1x */
arch/alpha/kernel/core_titan.c
788
agp->capability.bits.sba = 1;
arch/alpha/kernel/core_titan.c
789
agp->capability.bits.rq = 7; /* 8 - 1 */
arch/alpha/kernel/core_titan.c
796
agp->mode.bits.rate = 1 << pctl.pctl_r_bits.apctl_v_agp_rate;
arch/alpha/kernel/core_titan.c
797
agp->mode.bits.sba = pctl.pctl_r_bits.apctl_v_agp_sba_en;
arch/alpha/kernel/core_titan.c
798
agp->mode.bits.rq = 7; /* RQ Depth? */
arch/alpha/kernel/core_titan.c
799
agp->mode.bits.enable = pctl.pctl_r_bits.apctl_v_agp_en;
arch/alpha/kernel/err_ev6.c
101
int source = -1, stream = -1, bits = -1;
arch/alpha/kernel/err_ev6.c
138
bits = EXTRACT(c_stat, EV6__C_STAT__DOUBLE);
arch/alpha/kernel/err_ev6.c
160
streamname[stream], bitsname[bits], sourcename[source]);
arch/alpha/kernel/smp.c
503
set_bit(operation, &ipi_data[i].bits);
arch/alpha/kernel/smp.c
514
unsigned long *pending_ipis = &ipi_data[this_cpu].bits;
arch/alpha/kernel/smp.c
60
unsigned long bits ____cacheline_aligned;
arch/alpha/kernel/srmcons.c
112
c -= result.bits.c;
arch/alpha/kernel/srmcons.c
113
count -= result.bits.c;
arch/alpha/kernel/srmcons.c
114
buf += result.bits.c;
arch/alpha/kernel/srmcons.c
125
if (result.bits.c > 0)
arch/alpha/kernel/srmcons.c
44
} bits;
arch/alpha/kernel/srmcons.c
57
if (result.bits.status < 2) {
arch/alpha/kernel/srmcons.c
58
tty_insert_flip_char(port, (u8)result.bits.c, 0);
arch/alpha/kernel/srmcons.c
61
} while((result.bits.status & 1) && (++loops < 10));
arch/arc/include/asm/disasm.h
90
static inline int sign_extend(int value, int bits)
arch/arc/include/asm/disasm.h
92
if (IS_BIT(value, (bits - 1)))
arch/arc/include/asm/disasm.h
93
value |= (0xffffffff << bits);
arch/arm/common/locomo.c
538
void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir)
arch/arm/common/locomo.c
551
r |= bits;
arch/arm/common/locomo.c
553
r &= ~bits;
arch/arm/common/locomo.c
558
r |= bits;
arch/arm/common/locomo.c
560
r &= ~bits;
arch/arm/common/locomo.c
567
int locomo_gpio_read_level(struct device *dev, unsigned int bits)
arch/arm/common/locomo.c
580
ret &= bits;
arch/arm/common/locomo.c
585
int locomo_gpio_read_output(struct device *dev, unsigned int bits)
arch/arm/common/locomo.c
598
ret &= bits;
arch/arm/common/locomo.c
603
void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set)
arch/arm/common/locomo.c
616
r |= bits;
arch/arm/common/locomo.c
618
r &= ~bits;
arch/arm/common/sa1111.c
582
unsigned long *bits)
arch/arm/common/sa1111.c
590
val = *bits;
arch/arm/include/asm/dma-iommu.h
19
size_t bits; /* per bitmap */
arch/arm/include/asm/hardware/locomo.h
202
void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir);
arch/arm/include/asm/hardware/locomo.h
203
int locomo_gpio_read_level(struct device *dev, unsigned int bits);
arch/arm/include/asm/hardware/locomo.h
204
int locomo_gpio_read_output(struct device *dev, unsigned int bits);
arch/arm/include/asm/hardware/locomo.h
205
void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
arch/arm/include/asm/pgtable.h
102
#define __pgprot_modify(prot,mask,bits) \
arch/arm/include/asm/pgtable.h
103
__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
arch/arm/include/asm/smp_plat.h
105
return 1 << mpidr_hash.bits;
arch/arm/include/asm/smp_plat.h
98
u32 bits;
arch/arm/include/asm/word-at-a-time.h
20
static inline unsigned long has_zero(unsigned long a, unsigned long *bits,
arch/arm/include/asm/word-at-a-time.h
24
*bits = mask;
arch/arm/include/asm/word-at-a-time.h
28
#define prep_zero_mask(a, bits, c) (bits)
arch/arm/include/asm/word-at-a-time.h
30
static inline unsigned long create_zero_mask(unsigned long bits)
arch/arm/include/asm/word-at-a-time.h
32
bits = (bits - 1) & ~bits;
arch/arm/include/asm/word-at-a-time.h
33
return bits >> 7;
arch/arm/kernel/setup.c
627
u32 fs[3], bits[3], ls, mask = 0;
arch/arm/kernel/setup.c
648
bits[i] = ls - fs[i];
arch/arm/kernel/setup.c
661
mpidr_hash.shift_aff[1] = MPIDR_LEVEL_BITS + fs[1] - bits[0];
arch/arm/kernel/setup.c
663
(bits[1] + bits[0]);
arch/arm/kernel/setup.c
665
mpidr_hash.bits = bits[2] + bits[1] + bits[0];
arch/arm/kernel/setup.c
671
mpidr_hash.bits);
arch/arm/mach-omap1/omap-dma.c
318
void omap_disable_dma_irq(int lch, u16 bits)
arch/arm/mach-omap1/omap-dma.c
320
dma_chan[lch].enabled_irqs &= ~bits;
arch/arm/mach-omap2/cm2xxx_3xxx.h
61
static inline u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module,
arch/arm/mach-omap2/cm2xxx_3xxx.h
68
v |= bits;
arch/arm/mach-omap2/cm2xxx_3xxx.h
86
static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
arch/arm/mach-omap2/cm2xxx_3xxx.h
88
return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx);
arch/arm/mach-omap2/cm2xxx_3xxx.h
91
static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
arch/arm/mach-omap2/cm2xxx_3xxx.h
93
return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
arch/arm/mach-omap2/cm33xx.c
58
static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
arch/arm/mach-omap2/cm33xx.c
64
v |= bits;
arch/arm/mach-omap2/cminst44xx.c
131
static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
arch/arm/mach-omap2/cminst44xx.c
138
v |= bits;
arch/arm/mach-omap2/cminst44xx.c
144
static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
arch/arm/mach-omap2/cminst44xx.c
146
return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
arch/arm/mach-omap2/cminst44xx.c
149
static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
arch/arm/mach-omap2/cminst44xx.c
152
return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
arch/arm/mach-omap2/prm2xxx_3xxx.h
64
static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module,
arch/arm/mach-omap2/prm2xxx_3xxx.h
71
v |= bits;
arch/arm/mach-omap2/prm2xxx_3xxx.h
89
static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
arch/arm/mach-omap2/prm2xxx_3xxx.h
91
return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx);
arch/arm/mach-omap2/prm2xxx_3xxx.h
94
static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
arch/arm/mach-omap2/prm2xxx_3xxx.h
96
return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
arch/arm/mach-omap2/prm33xx.c
32
static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
arch/arm/mach-omap2/prm33xx.c
38
v |= bits;
arch/arm/mach-omap2/prm3xxx.c
126
u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
arch/arm/mach-omap2/prm3xxx.c
128
return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
arch/arm/mach-omap2/prm3xxx.h
138
extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
arch/arm/mach-omap2/prm44xx.c
108
static u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
arch/arm/mach-omap2/prm44xx.c
114
v |= bits;
arch/arm/mach-omap2/prm44xx.c
190
u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
arch/arm/mach-omap2/prm44xx.c
197
return omap4_prminst_rmw_inst_reg_bits(mask, bits,
arch/arm/mach-omap2/prm44xx_54xx.h
33
extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
arch/arm/mach-omap2/prminst44xx.c
76
u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
arch/arm/mach-omap2/prminst44xx.c
83
v |= bits;
arch/arm/mach-omap2/prminst44xx.h
22
extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
arch/arm/mach-omap2/voltage.h
76
u32 (*rmw)(u32 mask, u32 bits, u8 offset);
arch/arm/mach-orion5x/ts78xx-setup.c
134
unsigned char bits;
arch/arm/mach-orion5x/ts78xx-setup.c
136
bits = (ctrl & NAND_NCE) << 2;
arch/arm/mach-orion5x/ts78xx-setup.c
137
bits |= ctrl & NAND_CLE;
arch/arm/mach-orion5x/ts78xx-setup.c
138
bits |= (ctrl & NAND_ALE) >> 2;
arch/arm/mach-orion5x/ts78xx-setup.c
140
writeb((readb(TS_NAND_CTRL) & ~0x7) | bits, TS_NAND_CTRL);
arch/arm/mach-s3c/s3c64xx.c
162
.bits = 32,
arch/arm/mm/dma-mapping.c
1489
unsigned int bits = size >> PAGE_SHIFT;
arch/arm/mm/dma-mapping.c
1490
unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
arch/arm/mm/dma-mapping.c
1524
mapping->bits = BITS_PER_BYTE * bitmap_size;
arch/arm/mm/dma-mapping.c
760
size_t mapping_size = mapping->bits << PAGE_SHIFT;
arch/arm/mm/dma-mapping.c
774
mapping->bits, 0, count, align);
arch/arm/mm/dma-mapping.c
776
if (start > mapping->bits)
arch/arm/mm/dma-mapping.c
795
mapping->bits, 0, count, align);
arch/arm/mm/dma-mapping.c
797
if (start > mapping->bits) {
arch/arm/mm/dma-mapping.c
816
size_t mapping_size = mapping->bits << PAGE_SHIFT;
arch/arm/mm/dump.c
204
const struct prot_bits *bits;
arch/arm/mm/dump.c
218
.bits = section_bits,
arch/arm/mm/dump.c
222
.bits = pte_bits,
arch/arm/mm/dump.c
227
static void dump_prot(struct pg_state *st, const struct prot_bits *bits, size_t num)
arch/arm/mm/dump.c
231
for (i = 0; i < num; i++, bits++) {
arch/arm/mm/dump.c
234
if ((st->current_prot & bits->mask) == bits->val)
arch/arm/mm/dump.c
235
s = bits->set;
arch/arm/mm/dump.c
237
s = bits->clear;
arch/arm/mm/dump.c
293
if (pg_level[st->level].bits)
arch/arm/mm/dump.c
294
dump_prot(st, pg_level[st->level].bits, pg_level[st->level].num);
arch/arm/mm/dump.c
432
if (pg_level[i].bits)
arch/arm/mm/dump.c
434
pg_level[i].mask |= pg_level[i].bits[j].mask;
arch/arm/mm/dump.c
435
if (pg_level[i].bits[j].ro_bit)
arch/arm/mm/dump.c
436
pg_level[i].ro_bit = &pg_level[i].bits[j];
arch/arm/mm/dump.c
437
if (pg_level[i].bits[j].nx_bit)
arch/arm/mm/dump.c
438
pg_level[i].nx_bit = &pg_level[i].bits[j];
arch/arm/net/bpf_jit_32.c
1604
#define check_imm(bits, imm) do { \
arch/arm/net/bpf_jit_32.c
1605
if ((imm) >= (1 << ((bits) - 1)) || \
arch/arm/net/bpf_jit_32.c
1606
(imm) < -(1 << ((bits) - 1))) { \
arch/arm/probes/decode.c
446
enum decode_type type = h->type_regs.bits & DECODE_TYPE_MASK;
arch/arm/probes/decode.c
447
u32 regs = h->type_regs.bits >> DECODE_TYPE_BITS;
arch/arm/probes/decode.c
455
if (!matched && (insn & h->mask.bits) != h->value.bits)
arch/arm/probes/decode.h
271
u32 bits;
arch/arm/probes/decode.h
295
{.bits = DECODE_TYPE_END}
arch/arm/probes/decode.h
305
{.bits = (_type) | ((_regs) << DECODE_TYPE_BITS)}, \
arch/arm/probes/decode.h
306
{.bits = (_mask)}, \
arch/arm/probes/decode.h
307
{.bits = (_value)}
arch/arm/probes/kprobes/checkers-arm.c
105
u32 regs = h->type_regs.bits >> DECODE_TYPE_BITS;
arch/arm/probes/kprobes/test-core.c
604
enum decode_type type = h->type_regs.bits & DECODE_TYPE_MASK;
arch/arm/probes/kprobes/test-core.c
623
message, h->mask.bits, h->value.bits);
arch/arm/probes/kprobes/test-core.c
636
enum decode_type type = h->type_regs.bits & DECODE_TYPE_MASK;
arch/arm/probes/kprobes/test-core.c
638
if (h->value.bits & ~h->mask.bits)
arch/arm/probes/kprobes/test-core.c
641
if ((h->mask.bits & a->parent_mask) != a->parent_mask)
arch/arm/probes/kprobes/test-core.c
644
if ((h->value.bits ^ a->parent_value) & a->parent_mask)
arch/arm/probes/kprobes/test-core.c
650
args2.parent_mask = h->mask.bits;
arch/arm/probes/kprobes/test-core.c
651
args2.parent_value = h->value.bits;
arch/arm/probes/kprobes/test-core.c
728
int r = (h->type_regs.bits >> (DECODE_TYPE_BITS + i)) & 0xf;
arch/arm/probes/kprobes/test-core.c
737
enum decode_type type = h->type_regs.bits & DECODE_TYPE_MASK;
arch/arm/probes/kprobes/test-core.c
776
int regs = entry->header->type_regs.bits >> DECODE_TYPE_BITS;
arch/arm/probes/kprobes/test-core.c
850
enum decode_type type = h->type_regs.bits & DECODE_TYPE_MASK;
arch/arm/probes/kprobes/test-core.c
859
if ((insn & h->mask.bits) != h->value.bits)
arch/arm/probes/kprobes/test-core.c
894
u32 mask = entry->header->mask.bits;
arch/arm/probes/kprobes/test-core.c
895
u32 value = entry->header->value.bits;
arch/arm/probes/uprobes/actions-arm.c
111
u32 regs = decode->header.type_regs.bits >> DECODE_TYPE_BITS;
arch/arm/vfp/vfpdouble.c
56
int bits = 31 - fls(vd->significand >> 32);
arch/arm/vfp/vfpdouble.c
57
if (bits == 31)
arch/arm/vfp/vfpdouble.c
58
bits = 63 - fls(vd->significand);
arch/arm/vfp/vfpdouble.c
62
if (bits) {
arch/arm/vfp/vfpdouble.c
63
vd->exponent -= bits - 1;
arch/arm/vfp/vfpdouble.c
64
vd->significand <<= bits;
arch/arm/vfp/vfpsingle.c
56
int bits = 31 - fls(vs->significand);
arch/arm/vfp/vfpsingle.c
60
if (bits) {
arch/arm/vfp/vfpsingle.c
61
vs->exponent -= bits - 1;
arch/arm/vfp/vfpsingle.c
62
vs->significand <<= bits;
arch/arm64/include/asm/assembler.h
164
orr \rd, \lbits, \hbits, lsl #32
arch/arm64/include/asm/pgtable.h
737
#define __pgprot_modify(prot,mask,bits) \
arch/arm64/include/asm/pgtable.h
738
__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
arch/arm64/include/asm/ptdump.h
36
const struct ptdump_prot_bits *bits;
arch/arm64/include/asm/smp_plat.h
19
u32 bits;
arch/arm64/include/asm/smp_plat.h
26
return 1 << mpidr_hash.bits;
arch/arm64/include/asm/word-at-a-time.h
21
static inline unsigned long has_zero(unsigned long a, unsigned long *bits,
arch/arm64/include/asm/word-at-a-time.h
25
*bits = mask;
arch/arm64/include/asm/word-at-a-time.h
29
#define prep_zero_mask(a, bits, c) (bits)
arch/arm64/include/asm/word-at-a-time.h
30
#define create_zero_mask(bits) (bits)
arch/arm64/include/asm/word-at-a-time.h
31
#define find_zero(bits) (__ffs(bits) >> 3)
arch/arm64/include/asm/word-at-a-time.h
33
static inline unsigned long zero_bytemask(unsigned long bits)
arch/arm64/include/asm/word-at-a-time.h
35
bits = (bits - 1) & ~bits;
arch/arm64/include/asm/word-at-a-time.h
36
return bits >> 7;
arch/arm64/kernel/io.c
17
#define memcpy_toio_aligned(to, from, count, bits) \
arch/arm64/kernel/io.c
19
volatile u##bits __iomem *_to = to; \
arch/arm64/kernel/io.c
20
const u##bits *_from = from; \
arch/arm64/kernel/io.c
22
const u##bits *_end_from = _from + ALIGN_DOWN(_count, 8); \
arch/arm64/kernel/io.c
25
__const_memcpy_toio_aligned##bits(_to, _from, 8); \
arch/arm64/kernel/io.c
27
__const_memcpy_toio_aligned##bits(_to, _from, 4); \
arch/arm64/kernel/io.c
32
__const_memcpy_toio_aligned##bits(_to, _from, 2); \
arch/arm64/kernel/io.c
37
__const_memcpy_toio_aligned##bits(_to, _from, 1); \
arch/arm64/kernel/setup.c
113
u32 i, affinity, fs[4], bits[4], ls;
arch/arm64/kernel/setup.c
135
bits[i] = ls - fs[i];
arch/arm64/kernel/setup.c
148
mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
arch/arm64/kernel/setup.c
150
(bits[1] + bits[0]);
arch/arm64/kernel/setup.c
152
fs[3] - (bits[2] + bits[1] + bits[0]);
arch/arm64/kernel/setup.c
154
mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
arch/arm64/kernel/setup.c
161
mpidr_hash.bits);
arch/arm64/kvm/config.c
1353
if (!((map[i].flags & FORCE_RESx) && (map[i].bits & resx)))
arch/arm64/kvm/config.c
1354
mask |= map[i].bits;
arch/arm64/kvm/config.c
1363
return map->flags & MASKS_POINTER ? (map->masks->mask | map->masks->nmask) : map->bits;
arch/arm64/kvm/config.c
1441
u64 bits = reg_feat_map_bits(&map[i]);
arch/arm64/kvm/config.c
1446
resx.res1 |= bits;
arch/arm64/kvm/config.c
1448
resx.res0 |= bits;
arch/arm64/kvm/config.c
19
u64 bits;
arch/arm64/kvm/config.c
92
__NEEDS_FEAT_FLAG(m, f, bits, __VA_ARGS__)
arch/arm64/kvm/ptdump.c
109
level[i].bits = stage2_pte_bits;
arch/arm64/kvm/trng.c
26
DECLARE_BITMAP(bits, TRNG_MAX_BITS64);
arch/arm64/kvm/trng.c
37
bits[i] = get_random_long();
arch/arm64/kvm/trng.c
39
bitmap_clear(bits, num_bits, TRNG_MAX_BITS64 - num_bits);
arch/arm64/kvm/trng.c
42
smccc_set_retval(vcpu, TRNG_SUCCESS, lower_32_bits(bits[1]),
arch/arm64/kvm/trng.c
43
upper_32_bits(bits[0]), lower_32_bits(bits[0]));
arch/arm64/kvm/trng.c
45
smccc_set_retval(vcpu, TRNG_SUCCESS, bits[2], bits[1], bits[0]);
arch/arm64/kvm/trng.c
47
memzero_explicit(bits, sizeof(bits));
arch/arm64/kvm/vgic/vgic-mmio.h
48
#define VGIC_ADDR_IRQ_MASK(bits) (((bits) * 1024 / 8) - 1)
arch/arm64/kvm/vgic/vgic-mmio.h
58
#define VGIC_ADDR_TO_INTID(addr, bits) (((addr) & VGIC_ADDR_IRQ_MASK(bits)) * \
arch/arm64/kvm/vgic/vgic-mmio.h
59
8 >> ilog2(bits))
arch/arm64/mm/ptdump.c
123
.bits = pte_bits,
arch/arm64/mm/ptdump.c
127
.bits = pte_bits,
arch/arm64/mm/ptdump.c
131
.bits = pte_bits,
arch/arm64/mm/ptdump.c
135
.bits = pte_bits,
arch/arm64/mm/ptdump.c
139
.bits = pte_bits,
arch/arm64/mm/ptdump.c
144
static void dump_prot(struct ptdump_pg_state *st, const struct ptdump_prot_bits *bits,
arch/arm64/mm/ptdump.c
149
for (i = 0; i < num; i++, bits++) {
arch/arm64/mm/ptdump.c
152
if ((st->current_prot & bits->mask) == bits->val)
arch/arm64/mm/ptdump.c
153
s = bits->set;
arch/arm64/mm/ptdump.c
155
s = bits->clear;
arch/arm64/mm/ptdump.c
232
if (st->current_prot && pg_level[st->level].bits)
arch/arm64/mm/ptdump.c
233
dump_prot(st, pg_level[st->level].bits,
arch/arm64/mm/ptdump.c
329
if (kernel_pg_levels[i].bits)
arch/arm64/mm/ptdump.c
331
kernel_pg_levels[i].mask |= kernel_pg_levels[i].bits[j].mask;
arch/arm64/net/bpf_jit_comp.c
36
#define check_imm(bits, imm) do { \
arch/arm64/net/bpf_jit_comp.c
37
if ((((imm) > 0) && ((imm) >> ((bits) - 1))) || \
arch/arm64/net/bpf_jit_comp.c
38
(((imm) < 0) && (~(imm) >> ((bits) - 1)))) { \
arch/csky/include/asm/asid.h
17
u32 bits;
arch/csky/include/asm/asid.h
28
#define NUM_ASIDS(info) (1UL << ((info)->bits))
arch/csky/include/asm/asid.h
66
!((asid ^ atomic64_read(&info->generation)) >> info->bits) &&
arch/csky/include/asm/asid.h
75
u32 bits, unsigned int asid_per_ctxt,
arch/csky/kernel/smp.c
39
unsigned long bits ____cacheline_aligned;
arch/csky/kernel/smp.c
51
ops = xchg(&this_cpu_ptr(&ipi_data)->bits, 0);
arch/csky/kernel/smp.c
94
set_bit(operation, &per_cpu_ptr(&ipi_data, i)->bits);
arch/csky/mm/asid.c
146
if ((asid ^ atomic64_read(&info->generation)) >> info->bits) {
arch/csky/mm/asid.c
169
u32 bits, unsigned int asid_per_ctxt,
arch/csky/mm/asid.c
172
info->bits = bits;
arch/csky/mm/asid.c
18
#define ASID_MASK(info) (~GENMASK((info)->bits - 1, 0))
arch/csky/mm/asid.c
19
#define ASID_FIRST_VERSION(info) (1UL << ((info)->bits))
arch/hexagon/kernel/smp.c
104
set_bit(msg, &ipi->bits);
arch/hexagon/kernel/smp.c
33
unsigned long bits;
arch/hexagon/kernel/smp.c
88
while ((ops = xchg(&ipi->bits, 0)) != 0)
arch/loongarch/include/asm/asm-extable.h
27
#include <linux/bits.h>
arch/loongarch/kernel/perf_event.c
863
int bits, counters;
arch/loongarch/kernel/perf_event.c
869
bits = ((read_cpucfg(LOONGARCH_CPUCFG6) & CPUCFG6_PMBITS) >> CPUCFG6_PMBITS_SHIFT) + 1;
arch/loongarch/kernel/perf_event.c
886
loongarch_pmu.name, counters, bits);
arch/m68k/fpsp040/fpsp.h
128
.set FPR_DIRTY_BITS,LV-91 | fpr dirty bits
arch/m68k/fpsp040/fpsp.h
144
.set NMNEXC,LV-44 | NMNEXC (unsup,snan bits only)
arch/m68k/fpsp040/fpsp.h
162
.set stag_mask,0xE0 | upper 3 bits are source tag type
arch/m68k/fpsp040/fpsp.h
183
.set dtag_mask,0xE0 | upper 3 bits are dest type tag
arch/m68k/fpsp040/fpsp.h
189
.set E_BYTE,LV-28 | holds E1 and E3 bits (1 byte)
arch/m68k/fpsp040/fpsp.h
194
.set T_BYTE,LV-27 | holds T and U bits (1 byte)
arch/m68k/fpsp040/fpsp.h
220
| FPSR/FPCR bits
arch/m68k/fpsp040/fpsp.h
307
.set sx_mask,0x01800000 | set s and x bits in word $48
arch/m68k/fpsp040/fpsp.h
316
.set norm_tag,0x00 | tag bits in {7:5} position
arch/m68k/include/asm/nettel.h
56
static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
arch/m68k/include/asm/nettel.h
60
ppdata = (ppdata & ~mask) | bits;
arch/m68k/include/asm/nettel.h
93
static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
arch/m68k/include/asm/nettel.h
95
mcf_write16((mcf_read16(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);
arch/mips/alchemy/common/dbdma.c
366
u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
arch/mips/alchemy/common/dbdma.c
379
stp->dev_devwidth = bits;
arch/mips/alchemy/common/dbdma.c
383
dtp->dev_devwidth = bits;
arch/mips/boot/tools/relocs.c
5
#define _ElfW(bits, type) __ElfW(bits, type)
arch/mips/boot/tools/relocs.c
6
#define __ElfW(bits, type) Elf##bits##_##type
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
100
return jtgd.s.shft_reg >> (32 - bits);
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
113
void cvmx_helper_qlm_jtag_shift_zeros(int qlm, int bits)
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
115
while (bits > 0) {
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
116
int n = bits;
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
120
bits -= n;
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
87
uint32_t cvmx_helper_qlm_jtag_shift(int qlm, int bits, uint32_t data)
arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c
92
jtgd.s.shft_cnt = bits - 1;
arch/mips/cavium-octeon/octeon-irq.c
2250
u64 bits;
arch/mips/cavium-octeon/octeon-irq.c
2259
bits = en & raw;
arch/mips/cavium-octeon/octeon-irq.c
2262
if ((bits & 1ull << i) == 0)
arch/mips/include/asm/jazz.h
75
static __inline__ void pica_set_led(unsigned int bits)
arch/mips/include/asm/jazz.h
79
*led_register = bits;
arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
355
u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits);
arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
20
# (only 32 bits set by bootloader, all addresses are physical
arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
31
# Clear the lower 6 bits, the CVMSEG size
arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
82
# OCTEON II or better have bit 15 set. Clear the error bits.
arch/mips/include/asm/octeon/cvmx-helper-jtag.h
39
extern uint32_t cvmx_helper_qlm_jtag_shift(int qlm, int bits, uint32_t data);
arch/mips/include/asm/octeon/cvmx-helper-jtag.h
40
extern void cvmx_helper_qlm_jtag_shift_zeros(int qlm, int bits);
arch/mips/include/asm/octeon/cvmx.h
114
*/ static inline uint64_t cvmx_build_mask(uint64_t bits)
arch/mips/include/asm/octeon/cvmx.h
116
return ~((~0x0ull) << bits);
arch/mips/include/asm/txx9/tx4927.h
216
static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
arch/mips/include/asm/txx9/tx4927.h
222
____raw_writeq(____raw_readq(adr) & ~bits, adr);
arch/mips/include/asm/txx9/tx4927.h
227
static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
arch/mips/include/asm/txx9/tx4927.h
233
____raw_writeq(____raw_readq(adr) | bits, adr);
arch/mips/include/asm/txx9/tx4927.h
240
static inline void tx4927_ccfg_clear(__u64 bits)
arch/mips/include/asm/txx9/tx4927.h
243
& ~(TX4927_CCFG_W1CBITS | bits),
arch/mips/include/asm/txx9/tx4927.h
246
static inline void tx4927_ccfg_set(__u64 bits)
arch/mips/include/asm/txx9/tx4927.h
249
& ~TX4927_CCFG_W1CBITS) | bits,
arch/mips/include/asm/txx9/tx4938.h
266
#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
arch/mips/include/asm/txx9/tx4938.h
267
#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
arch/mips/kernel/cpu-probe.c
806
#define probe_gc0_config(name, maxconf, bits) \
arch/mips/kernel/cpu-probe.c
810
write_gc0_##name(tmp | (bits)); \
arch/mips/kernel/cpu-probe.c
820
#define probe_gc0_config_dyn(name, maxconf, dynconf, bits) \
arch/mips/kernel/cpu-probe.c
823
write_gc0_##name(maxconf ^ (bits)); \
arch/mips/kernel/early_printk_8250.c
37
int status, bits;
arch/mips/kernel/early_printk_8250.c
43
bits = UART_LSR_TEMT | UART_LSR_THRE;
arch/mips/kernel/early_printk_8250.c
50
} while ((status & bits) != bits);
arch/mips/kernel/module.c
171
Elf_Addr v, unsigned int bits)
arch/mips/kernel/module.c
173
unsigned long mask = GENMASK(bits - 1, 0);
arch/mips/kernel/module.c
179
me->name, bits);
arch/mips/kernel/module.c
185
offset |= (offset & BIT(bits - 1)) ? ~mask : 0;
arch/mips/kernel/module.c
190
se_bits = (offset & BIT(bits - 1)) ? ~0ul : 0;
arch/mips/lantiq/clk.h
63
unsigned int bits;
arch/mips/lantiq/falcon/sysctrl.c
100
sysctl_w32(clk->module, clk->bits, SYSCTL_DEACT);
arch/mips/lantiq/falcon/sysctrl.c
106
sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN);
arch/mips/lantiq/falcon/sysctrl.c
107
sysctl_w32(clk->module, clk->bits, SYSCTL_ACT);
arch/mips/lantiq/falcon/sysctrl.c
108
sysctl_wait(clk, clk->bits, SYSCTL_CLKS);
arch/mips/lantiq/falcon/sysctrl.c
114
sysctl_w32(clk->module, clk->bits, SYSCTL_CLKCLR);
arch/mips/lantiq/falcon/sysctrl.c
121
unsigned int bits;
arch/mips/lantiq/falcon/sysctrl.c
124
bits = ~act & clk->bits;
arch/mips/lantiq/falcon/sysctrl.c
125
if (bits != 0) {
arch/mips/lantiq/falcon/sysctrl.c
126
sysctl_w32(clk->module, bits, SYSCTL_CLKEN);
arch/mips/lantiq/falcon/sysctrl.c
127
sysctl_w32(clk->module, bits, SYSCTL_ACT);
arch/mips/lantiq/falcon/sysctrl.c
128
sysctl_wait(clk, bits, SYSCTL_ACTS);
arch/mips/lantiq/falcon/sysctrl.c
130
sysctl_w32(clk->module, act & clk->bits, SYSCTL_RBT);
arch/mips/lantiq/falcon/sysctrl.c
131
sysctl_wait(clk, clk->bits, SYSCTL_ACTS);
arch/mips/lantiq/falcon/sysctrl.c
162
unsigned int bits)
arch/mips/lantiq/falcon/sysctrl.c
172
clk->bits = bits;
arch/mips/lantiq/falcon/sysctrl.c
82
& clk->bits) != test));
arch/mips/lantiq/falcon/sysctrl.c
85
clk->module, clk->bits, test,
arch/mips/lantiq/falcon/sysctrl.c
86
sysctl_r32(clk->module, reg) & clk->bits);
arch/mips/lantiq/falcon/sysctrl.c
91
sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN);
arch/mips/lantiq/falcon/sysctrl.c
92
sysctl_w32(clk->module, clk->bits, SYSCTL_ACT);
arch/mips/lantiq/falcon/sysctrl.c
93
sysctl_wait(clk, clk->bits, SYSCTL_ACTS);
arch/mips/lantiq/falcon/sysctrl.c
99
sysctl_w32(clk->module, clk->bits, SYSCTL_CLKCLR);
arch/mips/lantiq/xway/gptu.c
104
GPTU_CON(clk->bits));
arch/mips/lantiq/xway/gptu.c
105
gptu_w32(1, GPTU_RLD(clk->bits));
arch/mips/lantiq/xway/gptu.c
106
gptu_w32(gptu_r32(GPTU_IRNEN) | BIT(clk->bits), GPTU_IRNEN);
arch/mips/lantiq/xway/gptu.c
107
gptu_w32(RUN_SEN | RUN_RL, GPTU_RUN(clk->bits));
arch/mips/lantiq/xway/gptu.c
113
gptu_w32(0, GPTU_RUN(clk->bits));
arch/mips/lantiq/xway/gptu.c
114
gptu_w32(0, GPTU_CON(clk->bits));
arch/mips/lantiq/xway/gptu.c
115
gptu_w32(0, GPTU_RLD(clk->bits));
arch/mips/lantiq/xway/gptu.c
116
gptu_w32(gptu_r32(GPTU_IRNEN) & ~BIT(clk->bits), GPTU_IRNEN);
arch/mips/lantiq/xway/gptu.c
117
free_irq(irqres[clk->bits].start, NULL);
arch/mips/lantiq/xway/gptu.c
132
clk->bits = timer;
arch/mips/lantiq/xway/gptu.c
96
int ret = request_irq(irqres[clk->bits].start, timer_irq_handler,
arch/mips/lantiq/xway/sysctrl.c
191
ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr);
arch/mips/lantiq/xway/sysctrl.c
198
ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr);
arch/mips/lantiq/xway/sysctrl.c
208
pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module));
arch/mips/lantiq/xway/sysctrl.c
210
(!(pmu_r32(PWDSR_XRX(clk->module)) & clk->bits)));
arch/mips/lantiq/xway/sysctrl.c
214
pmu_w32(pmu_r32(PWDCR(clk->module)) & ~clk->bits,
arch/mips/lantiq/xway/sysctrl.c
217
(pmu_r32(PWDSR(clk->module)) & clk->bits));
arch/mips/lantiq/xway/sysctrl.c
234
pmu_w32(clk->bits, PWDCR_DIS_XRX(clk->module));
arch/mips/lantiq/xway/sysctrl.c
236
(pmu_r32(PWDSR_XRX(clk->module)) & clk->bits));
arch/mips/lantiq/xway/sysctrl.c
239
pmu_w32(pmu_r32(PWDCR(clk->module)) | clk->bits,
arch/mips/lantiq/xway/sysctrl.c
242
(!(pmu_r32(PWDSR(clk->module)) & clk->bits)));
arch/mips/lantiq/xway/sysctrl.c
332
unsigned int module, unsigned int bits)
arch/mips/lantiq/xway/sysctrl.c
344
clk->bits = bits;
arch/mips/lantiq/xway/sysctrl.c
357
unsigned int bits)
arch/mips/lantiq/xway/sysctrl.c
368
clk->bits = bits;
arch/mips/lantiq/xway/sysctrl.c
390
clk->bits = PMU_PCI;
arch/mips/math-emu/cp1emu.c
1696
u64 bits;
arch/mips/math-emu/cp1emu.c
2012
if (fd.bits & 0x1)
arch/mips/math-emu/cp1emu.c
2363
if (fd.bits & 0x1)
arch/mips/math-emu/cp1emu.c
2439
rv.s = ieee754sp_fint(fs.bits);
arch/mips/math-emu/cp1emu.c
2446
rv.d = ieee754dp_fint(fs.bits);
arch/mips/math-emu/cp1emu.c
2599
DIFROMREG(bits, MIPSInst_FS(ir));
arch/mips/math-emu/cp1emu.c
2605
rv.s = ieee754sp_flong(bits);
arch/mips/math-emu/cp1emu.c
2611
rv.d = ieee754dp_flong(bits);
arch/mips/math-emu/cp1emu.c
840
#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
arch/mips/math-emu/cp1emu.c
841
#define SPTOREG(sp, x) SITOREG((sp).bits, x)
arch/mips/math-emu/cp1emu.c
842
#define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
arch/mips/math-emu/cp1emu.c
843
#define DPTOREG(dp, x) DITOREG((dp).bits, x)
arch/mips/math-emu/dp_cmp.c
32
vx = x.bits;
arch/mips/math-emu/dp_cmp.c
33
vy = y.bits;
arch/mips/math-emu/dp_sqrt.c
119
if (ieee754_csr.sx & IEEE754_INEXACT || t.bits != y.bits) {
arch/mips/math-emu/dp_sqrt.c
123
t.bits -= 1;
arch/mips/math-emu/dp_sqrt.c
131
y.bits += 1;
arch/mips/math-emu/dp_sqrt.c
134
t.bits += 1;
arch/mips/math-emu/dp_sqrt.c
85
yh = y.bits >> 32;
arch/mips/math-emu/dp_sqrt.c
88
y.bits = ((u64) yh << 32) | (y.bits & 0xffffffff);
arch/mips/math-emu/dp_sqrt.c
94
y.bits -= 0x0010000600000000LL;
arch/mips/math-emu/dp_sqrt.c
95
y.bits &= 0xffffffff00000000LL;
arch/mips/math-emu/ieee754.h
29
u64 bits;
arch/mips/math-emu/ieee754.h
39
u32 bits;
arch/mips/math-emu/ieee754d.c
27
printk("<%08x,%08x>\n", (unsigned) (x.bits >> 32),
arch/mips/math-emu/ieee754d.c
28
(unsigned) x.bits);
arch/mips/math-emu/ieee754d.c
67
printk("<%08x>\n", (unsigned) x.bits);
arch/mips/math-emu/sp_cmp.c
32
vx = x.bits;
arch/mips/math-emu/sp_cmp.c
33
vy = y.bits;
arch/mips/math-emu/sp_sqrt.c
101
x.bits = ix;
arch/mips/math-emu/sp_sqrt.c
56
ix = x.bits;
arch/mips/mm/cerr-sb1.c
553
int bits;
arch/mips/mm/cerr-sb1.c
556
bits = hweight8(ecc);
arch/mips/mm/cerr-sb1.c
557
res |= (bits == 1) ? CP0_CERRD_DATA_SBE : CP0_CERRD_DATA_DBE;
arch/mips/mti-malta/malta-init.c
46
char parity = '\0', bits = '\0', flow = '\0';
arch/mips/mti-malta/malta-init.c
60
bits = *s++;
arch/mips/mti-malta/malta-init.c
70
if (bits != '7' && bits != '8')
arch/mips/mti-malta/malta-init.c
71
bits = '8';
arch/mips/mti-malta/malta-init.c
77
parity, bits);
arch/mips/mti-malta/malta-init.c
83
parity, bits, flow);
arch/mips/net/bpf_jit_comp64.c
262
static void emit_swap_r64(struct jit_context *ctx, u8 dst, u8 mask, u32 bits)
arch/mips/net/bpf_jit_comp64.c
267
emit(ctx, dsll, tmp, tmp, bits); /* tmp = tmp << bits */
arch/mips/net/bpf_jit_comp64.c
268
emit(ctx, dsrl, dst, dst, bits); /* dst = dst >> bits */
arch/mips/pci/pci-mt7620.c
120
pcie_phyctrl_set(unsigned offset, u32 b_start, u32 bits, u32 val)
arch/mips/pci/pci-mt7620.c
122
pcie_m32(GENMASK(b_start + bits - 1, b_start),
arch/mips/vdso/genvdso.c
77
#define BUILD_SWAP(bits) \
arch/mips/vdso/genvdso.c
78
static uint##bits##_t swap_uint##bits(uint##bits##_t val) \
arch/mips/vdso/genvdso.c
80
return need_swap ? bswap_##bits(val) : val; \
arch/mips/vdso/genvdso.c
87
#define __FUNC(name, bits) name##bits
arch/mips/vdso/genvdso.c
88
#define _FUNC(name, bits) __FUNC(name, bits)
arch/mips/vdso/genvdso.c
91
#define __ELF(x, bits) Elf##bits##_##x
arch/mips/vdso/genvdso.c
92
#define _ELF(x, bits) __ELF(x, bits)
arch/parisc/include/asm/hash.h
118
hash_64(u64 a, unsigned int bits)
arch/parisc/include/asm/hash.h
126
if (!__builtin_constant_p(bits))
arch/parisc/include/asm/hash.h
127
asm("" : "=q" (bits) : "0" (64 - bits));
arch/parisc/include/asm/hash.h
129
bits = 64 - bits;
arch/parisc/include/asm/hash.h
141
return a >> bits;
arch/parisc/kernel/module.c
55
#define RELOC_REACHABLE(val, bits) \
arch/parisc/kernel/module.c
56
(( ( !((val) & (1<<((bits)-1))) && ((val)>>(bits)) != 0 ) || \
arch/parisc/kernel/module.c
57
( ((val) & (1<<((bits)-1))) && ((val)>>(bits)) != (((__typeof__(val))(~0))>>((bits)+2)))) ? \
arch/parisc/kernel/module.c
60
#define CHECK_RELOC(val, bits) \
arch/parisc/kernel/module.c
61
if (!RELOC_REACHABLE(val, bits)) { \
arch/parisc/kernel/module.c
63
me->name, strtab + sym->st_name, (unsigned long)val, bits); \
arch/parisc/net/bpf_jit.h
315
static inline int check_bits_int(signed long val, int bits)
arch/parisc/net/bpf_jit.h
317
return ((val >= 0) && ((val >> bits) == 0)) ||
arch/parisc/net/bpf_jit.h
318
((val < 0) && (((~((u32)val)) >> (bits-1)) == 0));
arch/parisc/net/bpf_jit.h
322
static inline int relative_bits_ok(signed long val, int bits)
arch/parisc/net/bpf_jit.h
324
return ((val >= 0) && (val < (1UL << (bits-1)))) || /* XXX */
arch/parisc/net/bpf_jit.h
325
((val < 0) && (((~((unsigned long)val)) >> (bits-1)) == 0)
arch/parisc/net/bpf_jit.h
326
&& (val & (1UL << (bits-1))));
arch/parisc/net/bpf_jit.h
330
static inline int relative_branch_ok(signed long val, int bits)
arch/parisc/net/bpf_jit.h
332
return ((val >= 0) && (val < (1UL << (bits-2)))) || /* XXX */
arch/parisc/net/bpf_jit.h
333
((val < 0) && (((~((unsigned long)val)) < (1UL << (bits-2))))
arch/parisc/net/bpf_jit.h
334
&& (val & (1UL << (bits-1))));
arch/powerpc/crypto/aes-gcm-p10-glue.c
35
asmlinkage int aes_p10_set_encrypt_key(const u8 *userKey, const int bits,
arch/powerpc/include/asm/bitops.h
51
#define PPC_BITEXTRACT(bits, ppc_bit, dst_bit) \
arch/powerpc/include/asm/bitops.h
52
((((bits) >> PPC_BITLSHIFT(ppc_bit)) & 1) << (dst_bit))
arch/powerpc/include/asm/kvm_book3s_64.h
173
static inline long try_lock_hpte(__be64 *hpte, unsigned long bits)
arch/powerpc/include/asm/kvm_book3s_64.h
184
be_bits = cpu_to_be64(bits);
arch/powerpc/include/asm/reg.h
1413
extern unsigned long msr_check_and_set(unsigned long bits);
arch/powerpc/include/asm/reg.h
1415
extern void __msr_check_and_clear(unsigned long bits);
arch/powerpc/include/asm/reg.h
1416
static inline void msr_check_and_clear(unsigned long bits)
arch/powerpc/include/asm/reg.h
1419
__msr_check_and_clear(bits);
arch/powerpc/include/asm/sfp-machine.h
164
#define __FPU_TRAP_P(bits) \
arch/powerpc/include/asm/sfp-machine.h
165
((__FPU_ENABLED_EXC & (bits)) != 0)
arch/powerpc/include/asm/word-at-a-time.h
127
static inline unsigned long create_zero_mask(unsigned long bits)
arch/powerpc/include/asm/word-at-a-time.h
129
bits = (bits - 1) & ~bits;
arch/powerpc/include/asm/word-at-a-time.h
130
return bits >> 7;
arch/powerpc/include/asm/word-at-a-time.h
139
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
arch/powerpc/include/asm/word-at-a-time.h
142
*bits = mask;
arch/powerpc/include/asm/word-at-a-time.h
146
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
arch/powerpc/include/asm/word-at-a-time.h
148
return bits;
arch/powerpc/include/asm/word-at-a-time.h
60
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
arch/powerpc/include/asm/word-at-a-time.h
66
*bits = ret;
arch/powerpc/include/asm/word-at-a-time.h
71
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
arch/powerpc/include/asm/word-at-a-time.h
73
return bits;
arch/powerpc/include/asm/word-at-a-time.h
77
static inline unsigned long create_zero_mask(unsigned long bits)
arch/powerpc/include/asm/word-at-a-time.h
86
: "b" (bits));
arch/powerpc/kernel/btext.c
411
int l, bits;
arch/powerpc/kernel/btext.c
417
bits = *font++;
arch/powerpc/kernel/btext.c
418
base[0] = (-(bits >> 7) & fg) ^ bg;
arch/powerpc/kernel/btext.c
419
base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
420
base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
421
base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
422
base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
423
base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
424
base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
425
base[7] = (-(bits & 1) & fg) ^ bg;
arch/powerpc/kernel/btext.c
432
int l, bits;
arch/powerpc/kernel/btext.c
439
bits = *font++;
arch/powerpc/kernel/btext.c
440
base[0] = (eb[bits >> 6] & fg) ^ bg;
arch/powerpc/kernel/btext.c
441
base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
arch/powerpc/kernel/btext.c
442
base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
arch/powerpc/kernel/btext.c
443
base[3] = (eb[bits & 3] & fg) ^ bg;
arch/powerpc/kernel/btext.c
450
int l, bits;
arch/powerpc/kernel/btext.c
457
bits = *font++;
arch/powerpc/kernel/btext.c
458
base[0] = (eb[bits >> 4] & fg) ^ bg;
arch/powerpc/kernel/btext.c
459
base[1] = (eb[bits & 0xf] & fg) ^ bg;
arch/powerpc/kernel/process.c
117
unsigned long notrace msr_check_and_set(unsigned long bits)
arch/powerpc/kernel/process.c
122
newmsr = oldmsr | bits;
arch/powerpc/kernel/process.c
124
if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP))
arch/powerpc/kernel/process.c
135
void notrace __msr_check_and_clear(unsigned long bits)
arch/powerpc/kernel/process.c
140
newmsr = oldmsr & ~bits;
arch/powerpc/kernel/process.c
142
if (cpu_has_feature(CPU_FTR_VSX) && (bits & MSR_FP))
arch/powerpc/kernel/process.c
1478
static void print_bits(unsigned long val, struct regbit *bits, const char *sep)
arch/powerpc/kernel/process.c
1482
for (; bits->bit; ++bits)
arch/powerpc/kernel/process.c
1483
if (val & bits->bit) {
arch/powerpc/kernel/process.c
1484
pr_cont("%s%s", s, bits->name);
arch/powerpc/kernel/tau_6xx.c
69
u32 bits = THRM1_TIV | THRM1_TIN | THRM1_V;
arch/powerpc/kernel/tau_6xx.c
74
if ((thrm & bits) == bits) {
arch/powerpc/kernel/tau_6xx.c
85
if ((thrm & bits) == bits) {
arch/powerpc/kernel/time.c
909
u32 bits = 32;
arch/powerpc/kernel/time.c
917
if (of_property_read_u32(cpu, "ibm,dec-bits", &bits) == 0) {
arch/powerpc/kernel/time.c
918
if (bits > 64 || bits < 32) {
arch/powerpc/kernel/time.c
920
bits = 32;
arch/powerpc/kernel/time.c
924
decrementer_max = (1ul << (bits - 1)) - 1;
arch/powerpc/kernel/time.c
930
bits, decrementer_max);
arch/powerpc/kernel/vdso.c
172
#define VDSO_DO_FIXUPS(type, value, bits, sec) do { \
arch/powerpc/kernel/vdso.c
173
void *__start = (void *)VDSO##bits##_SYMBOL(&vdso##bits##_start, sec##_start); \
arch/powerpc/kernel/vdso.c
174
void *__end = (void *)VDSO##bits##_SYMBOL(&vdso##bits##_start, sec##_end); \
arch/powerpc/kvm/book3s_64_mmu_radix.c
148
unsigned long rts, bits, offset, index;
arch/powerpc/kvm/book3s_64_mmu_radix.c
154
bits = root & RPDS_MASK;
arch/powerpc/kvm/book3s_64_mmu_radix.c
167
if (level && bits != p9_supported_radix_bits[level])
arch/powerpc/kvm/book3s_64_mmu_radix.c
169
if (level == 0 && !(bits == 5 || bits == 9))
arch/powerpc/kvm/book3s_64_mmu_radix.c
171
offset -= bits;
arch/powerpc/kvm/book3s_64_mmu_radix.c
172
index = (eaddr >> offset) & ((1UL << bits) - 1);
arch/powerpc/kvm/book3s_64_mmu_radix.c
174
if (base & ((1UL << (bits + 3)) - 1))
arch/powerpc/kvm/book3s_64_mmu_radix.c
195
bits = pte & RPDS_MASK;
arch/powerpc/kvm/book3s_hv_rm_mmu.c
680
unsigned long v, r, rb, mask, bits;
arch/powerpc/kvm/book3s_hv_rm_mmu.c
701
bits = (flags << 55) & HPTE_R_PP0;
arch/powerpc/kvm/book3s_hv_rm_mmu.c
702
bits |= (flags << 48) & HPTE_R_KEY_HI;
arch/powerpc/kvm/book3s_hv_rm_mmu.c
703
bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
arch/powerpc/kvm/book3s_hv_rm_mmu.c
710
r = (rev->guest_rpte & ~mask) | bits;
arch/powerpc/kvm/book3s_hv_rm_mmu.c
722
r = (pte_r & ~mask) | bits;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
160
u32 bits;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
291
bits = MPC512X_SCLPC_CS(cs);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
293
bits |= MPC512X_SCLPC_READ | MPC512X_SCLPC_FLUSH;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
295
bits |= MPC512X_SCLPC_DAI;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
296
bits |= MPC512X_SCLPC_BPT(bpt);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
297
out_be32(&lpbfifo.regs->ctrl, bits);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
300
bits = MPC512X_SCLPC_ENABLE | MPC512X_SCLPC_ABORT_INT_ENABLE;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
302
bits |= MPC512X_SCLPC_NORM_INT_ENABLE;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
306
out_be32(&lpbfifo.regs->enable, bits);
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
309
bits = lpbfifo.req->size | MPC512X_SCLPC_START;
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c
310
out_be32(&lpbfifo.regs->pkt_size, bits);
arch/powerpc/platforms/8xx/cpm1.c
247
int i, bits = 0;
arch/powerpc/platforms/8xx/cpm1.c
345
bits = clk_map[i][2];
arch/powerpc/platforms/8xx/cpm1.c
355
bits <<= shift;
arch/powerpc/platforms/8xx/cpm1.c
360
bits |= bits << 3;
arch/powerpc/platforms/8xx/cpm1.c
363
bits <<= 3;
arch/powerpc/platforms/8xx/cpm1.c
368
out_be32(reg, (in_be32(reg) & ~mask) | bits);
arch/powerpc/platforms/powermac/feature.c
2903
int bits[8] = { 8,16,0,32,2,4,0,0 };
arch/powerpc/platforms/powermac/feature.c
2911
bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
arch/powerpc/platforms/powermac/pic.c
206
int irq, bits;
arch/powerpc/platforms/powermac/pic.c
212
bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
arch/powerpc/platforms/powermac/pic.c
213
bits |= in_le32(&pmac_irq_hw[i]->level);
arch/powerpc/platforms/powermac/pic.c
214
bits &= ppc_cached_irq_mask[i];
arch/powerpc/platforms/powermac/pic.c
215
if (bits == 0)
arch/powerpc/platforms/powermac/pic.c
217
irq += __ilog2(bits);
arch/powerpc/platforms/powermac/pic.c
230
unsigned long bits = 0;
arch/powerpc/platforms/powermac/pic.c
242
bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
arch/powerpc/platforms/powermac/pic.c
243
bits |= in_le32(&pmac_irq_hw[i]->level);
arch/powerpc/platforms/powermac/pic.c
244
bits &= ppc_cached_irq_mask[i];
arch/powerpc/platforms/powermac/pic.c
245
if (bits == 0)
arch/powerpc/platforms/powermac/pic.c
247
irq += __ilog2(bits);
arch/powerpc/sysdev/cpm2.c
139
int i, bits = 0;
arch/powerpc/sysdev/cpm2.c
238
bits = clk_map[i][2];
arch/powerpc/sysdev/cpm2.c
245
bits <<= shift;
arch/powerpc/sysdev/cpm2.c
249
bits |= bits << 3;
arch/powerpc/sysdev/cpm2.c
252
bits <<= 3;
arch/powerpc/sysdev/cpm2.c
256
out_be32(reg, (in_be32(reg) & ~mask) | bits);
arch/powerpc/sysdev/cpm2.c
265
int i, bits = 0;
arch/powerpc/sysdev/cpm2.c
298
bits = clk_map[i][2];
arch/powerpc/sysdev/cpm2.c
305
bits <<= shift;
arch/powerpc/sysdev/cpm2.c
308
out_8(reg, (in_8(reg) & ~mask) | bits);
arch/powerpc/sysdev/cpm2_pic.c
201
unsigned long bits;
arch/powerpc/sysdev/cpm2_pic.c
205
bits = in_be32(&cpm2_intctl->ic_sivec);
arch/powerpc/sysdev/cpm2_pic.c
206
irq = bits >> 26;
arch/powerpc/sysdev/fsl_pci.c
162
unsigned int bits = min_t(u32, ilog2(size),
arch/powerpc/sysdev/fsl_pci.c
171
out_be32(&pci->pow[index + i].powar, flags | (bits - 1));
arch/powerpc/sysdev/fsl_pci.c
173
pci_addr += (resource_size_t)1U << bits;
arch/powerpc/sysdev/fsl_pci.c
174
phys_addr += (resource_size_t)1U << bits;
arch/powerpc/sysdev/fsl_pci.c
175
size -= (resource_size_t)1U << bits;
arch/riscv/include/asm/asm-extable.h
30
#include <linux/bits.h>
arch/riscv/include/asm/word-at-a-time.h
23
unsigned long *bits, const struct word_at_a_time *c)
arch/riscv/include/asm/word-at-a-time.h
26
*bits = mask;
arch/riscv/include/asm/word-at-a-time.h
31
unsigned long bits, const struct word_at_a_time *c)
arch/riscv/include/asm/word-at-a-time.h
33
return bits;
arch/riscv/include/asm/word-at-a-time.h
36
static inline unsigned long create_zero_mask(unsigned long bits)
arch/riscv/include/asm/word-at-a-time.h
38
bits = (bits - 1) & ~bits;
arch/riscv/include/asm/word-at-a-time.h
39
return bits >> 7;
arch/riscv/net/bpf_jit.h
1238
int bits = 64 - imm;
arch/riscv/net/bpf_jit.h
1241
if (bits)
arch/riscv/net/bpf_jit.h
1242
emit_srli(rd, rd, bits, ctx);
arch/s390/include/asm/airq.h
38
unsigned long bits; /* Number of bits in the vector */
arch/s390/include/asm/airq.h
51
struct airq_iv *airq_iv_create(unsigned long bits, unsigned long flags,
arch/s390/include/asm/ptrace.h
166
unsigned long bits; /* Obsolete software bits */
arch/s390/include/asm/word-at-a-time.h
10
const unsigned long bits;
arch/s390/include/asm/word-at-a-time.h
32
unsigned long mask = (val & c->bits) + c->bits;
arch/s390/include/asm/word-at-a-time.h
34
*data = ~(mask | val | c->bits);
arch/s390/include/uapi/asm/ptrace.h
236
per_cr_bits bits;
arch/s390/include/uapi/asm/ptrace.h
254
per_lowcore_bits bits;
arch/s390/kernel/dis.c
353
int bits;
arch/s390/kernel/dis.c
357
bits = (operand->shift & 7) + operand->bits;
arch/s390/kernel/dis.c
362
bits -= 8;
arch/s390/kernel/dis.c
363
} while (bits > 0);
arch/s390/kernel/dis.c
364
val >>= -bits;
arch/s390/kernel/dis.c
365
val &= ((1U << (operand->bits - 1)) << 1) - 1;
arch/s390/kernel/dis.c
368
if (operand->bits == 20 && operand->shift == 20)
arch/s390/kernel/dis.c
385
(val & (1U << (operand->bits - 1))))
arch/s390/kernel/dis.c
386
val |= (-1U << (operand->bits - 1)) << 1;
arch/s390/kernel/dis.c
47
unsigned char bits; /* The number of bits in the operand. */
arch/s390/kernel/module.c
178
int sign, int bits, int shift,
arch/s390/kernel/module.c
189
min = -(1L << (bits - 1));
arch/s390/kernel/module.c
190
max = (1L << (bits - 1)) - 1;
arch/s390/kernel/module.c
195
umax = ((1UL << (bits - 1)) << 1) - 1;
arch/s390/kernel/module.c
200
if (bits == 8) {
arch/s390/kernel/module.c
203
} else if (bits == 12) {
arch/s390/kernel/module.c
207
} else if (bits == 16) {
arch/s390/kernel/module.c
210
} else if (bits == 20) {
arch/s390/kernel/module.c
214
} else if (bits == 32) {
arch/s390/kernel/module.c
217
} else if (bits == 64) {
arch/s390/kernel/ptrace.c
168
else if (addr == offsetof(struct per_struct_kernel, bits))
arch/s390/kernel/smp.c
489
unsigned long bits;
arch/s390/kernel/smp.c
492
bits = this_cpu_xchg(pcpu_devices.ec_mask, 0);
arch/s390/kernel/smp.c
493
if (test_bit(ec_stop_cpu, &bits))
arch/s390/kernel/smp.c
495
if (test_bit(ec_schedule, &bits))
arch/s390/kernel/smp.c
497
if (test_bit(ec_call_function_single, &bits))
arch/s390/kernel/smp.c
499
if (test_bit(ec_mcck_pending, &bits))
arch/s390/kernel/smp.c
501
if (test_bit(ec_irq_work, &bits))
arch/s390/kvm/dat.c
1274
const u8 *bits;
arch/s390/kvm/dat.c
1282
tmp.val = (state->bits[gfn - walk->start] << 24) & state->mask;
arch/s390/kvm/dat.c
1311
unsigned long count, unsigned long mask, const uint8_t *bits)
arch/s390/kvm/dat.c
1314
struct dat_set_cmma_state state = { .mask = mask, .bits = bits, };
arch/s390/kvm/dat.h
556
unsigned long count, unsigned long mask, const uint8_t *bits);
arch/s390/kvm/kvm-s390.c
2351
u8 *bits __free(kvfree) = NULL;
arch/s390/kvm/kvm-s390.c
2369
bits = vmalloc(array_size(sizeof(*bits), args->count));
arch/s390/kvm/kvm-s390.c
2370
if (!bits)
arch/s390/kvm/kvm-s390.c
2373
r = copy_from_user(bits, (void __user *)args->values, args->count);
arch/s390/kvm/kvm-s390.c
2383
args->count, args->mask, bits);
arch/s390/kvm/kvm-s390.h
472
unsigned long bits);
arch/s390/kvm/vsie.c
116
const int bits = CPUSTAT_STOP_INT | CPUSTAT_IO_INT | CPUSTAT_EXT_INT;
arch/s390/kvm/vsie.c
120
atomic_andnot(bits, &vsie_page->scb_s.cpuflags);
arch/s390/kvm/vsie.c
121
atomic_or(cpuflags & bits, &vsie_page->scb_s.cpuflags);
arch/s390/tools/gen_facilities.c
111
.bits = (int[]){
arch/s390/tools/gen_facilities.c
136
for (i = 0; def->bits[i] != -1; i++) {
arch/s390/tools/gen_facilities.c
137
bit = 63 - (def->bits[i] & 63);
arch/s390/tools/gen_facilities.c
138
dword = def->bits[i] / 64;
arch/s390/tools/gen_facilities.c
18
int *bits;
arch/s390/tools/gen_facilities.c
29
.bits = (int[]){
arch/s390/tools/gen_facilities.c
73
.bits = (int[]){
arch/s390/tools/relocs.c
32
#define _ElfW(bits, type) __ElfW(bits, type)
arch/s390/tools/relocs.c
33
#define __ElfW(bits, type) Elf##bits##_##type
arch/sh/include/asm/word-at-a-time.h
29
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
arch/sh/include/asm/word-at-a-time.h
32
*bits = mask;
arch/sh/include/asm/word-at-a-time.h
36
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
arch/sh/include/asm/word-at-a-time.h
38
return bits;
arch/sh/include/asm/word-at-a-time.h
41
static inline unsigned long create_zero_mask(unsigned long bits)
arch/sh/include/asm/word-at-a-time.h
43
bits = (bits - 1) & ~bits;
arch/sh/include/asm/word-at-a-time.h
44
return bits >> 7;
arch/sh/mm/tlb-debugfs.c
118
if (tlb_sizes[i].bits == size)
arch/sh/mm/tlb-debugfs.c
26
int bits;
arch/sparc/include/asm/irq_64.h
66
static inline void set_softint(unsigned long bits)
arch/sparc/include/asm/irq_64.h
70
: "r" (bits));
arch/sparc/include/asm/irq_64.h
73
static inline void clear_softint(unsigned long bits)
arch/sparc/include/asm/irq_64.h
77
: "r" (bits));
arch/sparc/kernel/btext.c
24
static void draw_byte_32(const unsigned char *bits, unsigned int *base, int rb);
arch/sparc/kernel/btext.c
242
int l, bits;
arch/sparc/kernel/btext.c
248
bits = *font++;
arch/sparc/kernel/btext.c
249
base[0] = (-(bits >> 7) & fg) ^ bg;
arch/sparc/kernel/btext.c
25
static void draw_byte_16(const unsigned char *bits, unsigned int *base, int rb);
arch/sparc/kernel/btext.c
250
base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
251
base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
252
base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
253
base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
254
base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
255
base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
256
base[7] = (-(bits & 1) & fg) ^ bg;
arch/sparc/kernel/btext.c
26
static void draw_byte_8(const unsigned char *bits, unsigned int *base, int rb);
arch/sparc/kernel/btext.c
263
int l, bits;
arch/sparc/kernel/btext.c
270
bits = *font++;
arch/sparc/kernel/btext.c
271
base[0] = (eb[bits >> 6] & fg) ^ bg;
arch/sparc/kernel/btext.c
272
base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
arch/sparc/kernel/btext.c
273
base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
arch/sparc/kernel/btext.c
274
base[3] = (eb[bits & 3] & fg) ^ bg;
arch/sparc/kernel/btext.c
281
int l, bits;
arch/sparc/kernel/btext.c
288
bits = *font++;
arch/sparc/kernel/btext.c
289
base[0] = (eb[bits >> 4] & fg) ^ bg;
arch/sparc/kernel/btext.c
290
base[1] = (eb[bits & 0xf] & fg) ^ bg;
arch/sparc/kernel/visemul.c
375
unsigned int bits, bits_mask;
arch/sparc/kernel/visemul.c
381
bits = (rs2 > 5 ? 5 : rs2);
arch/sparc/kernel/visemul.c
382
bits_mask = (1UL << bits) - 1UL;
arch/sparc/kernel/visemul.c
391
(((rs1 >> 39) & bits_mask) << (17 + bits)) |
arch/sparc/kernel/visemul.c
392
(((rs1 >> 60) & 0xf) << (17 + (2*bits))));
arch/sparc/vdso/vdso2c.c
100
#define BITSFUNC3(name, bits, suffix) name##bits##suffix
arch/sparc/vdso/vdso2c.c
101
#define BITSFUNC2(name, bits, suffix) BITSFUNC3(name, bits, suffix)
arch/sparc/vdso/vdso2c.c
106
#define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x
arch/sparc/vdso/vdso2c.c
107
#define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x)
arch/sparc/vdso/vdso2c.c
78
#define GBE(x, bits, ifnot) \
arch/sparc/vdso/vdso2c.c
80
(sizeof(*(x)) == bits/8), \
arch/sparc/vdso/vdso2c.c
81
(__typeof__(*(x)))get_unaligned_be##bits(x), ifnot)
arch/sparc/vdso/vdso2c.c
89
#define PBE(x, val, bits, ifnot) \
arch/sparc/vdso/vdso2c.c
91
(sizeof(*(x)) == bits/8), \
arch/sparc/vdso/vdso2c.c
92
put_unaligned_be##bits((val), (x)), ifnot)
arch/um/drivers/ubd_kern.c
100
off = bit % bits;
arch/um/drivers/ubd_kern.c
85
int bits, off;
arch/um/drivers/ubd_kern.c
87
bits = sizeof(data[0]) * 8;
arch/um/drivers/ubd_kern.c
88
n = bit / bits;
arch/um/drivers/ubd_kern.c
89
off = bit % bits;
arch/um/drivers/ubd_kern.c
96
int bits, off;
arch/um/drivers/ubd_kern.c
98
bits = sizeof(data[0]) * 8;
arch/um/drivers/ubd_kern.c
99
n = bit / bits;
arch/um/include/asm/page.h
51
#define pte_get_bits(p, bits) ((p).pte & (bits))
arch/um/include/asm/page.h
52
#define pte_set_bits(p, bits) ((p).pte |= (bits))
arch/um/include/asm/page.h
53
#define pte_clear_bits(p, bits) ((p).pte &= ~(bits))
arch/x86/boot/compressed/idt_64.c
16
entry.bits.type = GATE_TRAP;
arch/x86/boot/compressed/idt_64.c
17
entry.bits.p = 1;
arch/x86/coco/sev/vc-shared.c
394
int bits = (exit_info_1 & 0x70) >> 1;
arch/x86/coco/sev/vc-shared.c
398
rax = lower_bits(regs->ax, bits);
arch/x86/coco/sev/vc-shared.c
409
regs->ax = lower_bits(ghcb->save.rax, bits);
arch/x86/crypto/camellia_glue.c
774
#define ROLDQ(l, r, bits) ({ \
arch/x86/crypto/camellia_glue.c
776
l = (l << bits) | (r >> (64 - bits)); \
arch/x86/crypto/camellia_glue.c
777
r = (r << bits) | (t >> (64 - bits)); \
arch/x86/events/intel/core.c
3353
u64 bits = 0;
arch/x86/events/intel/core.c
3367
bits |= INTEL_FIXED_3_METRICS_CLEAR;
arch/x86/events/intel/core.c
3378
bits |= INTEL_FIXED_0_ENABLE_PMI;
arch/x86/events/intel/core.c
3380
bits |= INTEL_FIXED_0_USER;
arch/x86/events/intel/core.c
3382
bits |= INTEL_FIXED_0_KERNEL;
arch/x86/events/intel/core.c
3384
bits |= INTEL_FIXED_0_RDPMC_USER_DISABLE;
arch/x86/events/intel/core.c
3390
bits |= INTEL_FIXED_0_ANYTHREAD;
arch/x86/events/intel/core.c
3393
bits = intel_fixed_bits_by_idx(idx, bits);
arch/x86/events/intel/core.c
3395
bits |= intel_fixed_bits_by_idx(idx, ICL_FIXED_0_ADAPTIVE);
arch/x86/events/intel/core.c
3398
cpuc->fixed_ctrl_val |= bits;
arch/x86/events/intel/uncore.h
204
unsigned int bits;
arch/x86/events/intel/uncore.h
492
return box->pmu->type->freerunning[type].bits;
arch/x86/events/perf_event.h
699
} bits;
arch/x86/events/perf_event.h
703
#define X86_CONFIG(args...) ((union x86_pmu_config){.bits = {args}}).value
arch/x86/events/zhaoxin/core.c
318
u64 ctrl_val, bits, mask;
arch/x86/events/zhaoxin/core.c
325
bits = 0x8ULL;
arch/x86/events/zhaoxin/core.c
327
bits |= 0x2;
arch/x86/events/zhaoxin/core.c
329
bits |= 0x1;
arch/x86/events/zhaoxin/core.c
331
bits <<= (idx * 4);
arch/x86/events/zhaoxin/core.c
336
ctrl_val |= bits;
arch/x86/include/asm/desc.h
414
data->bits.type = GATE_INTERRUPT;
arch/x86/include/asm/desc.h
415
data->bits.p = 1;
arch/x86/include/asm/desc.h
424
gate->bits = d->bits;
arch/x86/include/asm/desc.h
84
gate->bits.p = 1;
arch/x86/include/asm/desc.h
85
gate->bits.dpl = dpl;
arch/x86/include/asm/desc.h
86
gate->bits.zero = 0;
arch/x86/include/asm/desc.h
87
gate->bits.type = type;
arch/x86/include/asm/desc.h
91
gate->bits.ist = ist;
arch/x86/include/asm/desc.h
96
gate->bits.ist = 0;
arch/x86/include/asm/desc_defs.h
130
struct idt_bits bits;
arch/x86/include/asm/desc_defs.h
137
struct idt_bits bits;
arch/x86/include/asm/elf.h
386
unsigned long bits;
arch/x86/include/asm/io_apic.h
27
} __attribute__ ((packed)) bits;
arch/x86/include/asm/io_apic.h
38
} __attribute__ ((packed)) bits;
arch/x86/include/asm/io_apic.h
47
} __attribute__ ((packed)) bits;
arch/x86/include/asm/io_apic.h
55
} __attribute__ ((packed)) bits;
arch/x86/include/asm/microcode.h
52
unsigned int bits[];
arch/x86/include/asm/sev.h
72
static inline u64 lower_bits(u64 val, unsigned int bits)
arch/x86/include/asm/sev.h
74
u64 mask = (1ULL << bits) - 1;
arch/x86/include/asm/word-at-a-time.h
15
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
arch/x86/include/asm/word-at-a-time.h
18
*bits = mask;
arch/x86/include/asm/word-at-a-time.h
22
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
arch/x86/include/asm/word-at-a-time.h
24
return bits;
arch/x86/include/asm/word-at-a-time.h
30
#define create_zero_mask(bits) (bits)
arch/x86/include/asm/word-at-a-time.h
32
static inline unsigned long zero_bytemask(unsigned long bits)
arch/x86/include/asm/word-at-a-time.h
34
bits = (bits - 1) & ~bits;
arch/x86/include/asm/word-at-a-time.h
35
return bits >> 7;
arch/x86/include/asm/word-at-a-time.h
38
#define find_zero(bits) (__ffs(bits) >> 3)
arch/x86/include/asm/word-at-a-time.h
43
static inline unsigned long create_zero_mask(unsigned long bits)
arch/x86/include/asm/word-at-a-time.h
45
bits = (bits - 1) & ~bits;
arch/x86/include/asm/word-at-a-time.h
46
return bits >> 7;
arch/x86/include/uapi/asm/kvm.h
90
__u64 bits;
arch/x86/kernel/apic/io_apic.c
1184
if (reg_01.bits.version >= 0x10)
arch/x86/kernel/apic/io_apic.c
1186
if (reg_01.bits.version >= 0x20)
arch/x86/kernel/apic/io_apic.c
1192
apic_dbg("....... : physical APIC id: %02X\n", reg_00.bits.ID);
arch/x86/kernel/apic/io_apic.c
1193
apic_dbg("....... : Delivery Type: %X\n", reg_00.bits.delivery_type);
arch/x86/kernel/apic/io_apic.c
1194
apic_dbg("....... : LTS : %X\n", reg_00.bits.LTS);
arch/x86/kernel/apic/io_apic.c
1196
apic_dbg("....... : max redirection entries: %02X\n", reg_01.bits.entries);
arch/x86/kernel/apic/io_apic.c
1197
apic_dbg("....... : PRQ implemented: %X\n", reg_01.bits.PRQ);
arch/x86/kernel/apic/io_apic.c
1198
apic_dbg("....... : IO APIC version: %02X\n", reg_01.bits.version);
arch/x86/kernel/apic/io_apic.c
1205
if (reg_01.bits.version >= 0x10 && reg_02.raw != reg_01.raw) {
arch/x86/kernel/apic/io_apic.c
1207
apic_dbg("....... : arbitration: %02X\n", reg_02.bits.arbitration);
arch/x86/kernel/apic/io_apic.c
1215
if (reg_01.bits.version >= 0x20 && reg_03.raw != reg_02.raw &&
arch/x86/kernel/apic/io_apic.c
1218
apic_dbg("....... : Boot DT : %X\n", reg_03.bits.boot_DT);
arch/x86/kernel/apic/io_apic.c
1222
io_apic_print_entries(ioapic_idx, reg_01.bits.entries);
arch/x86/kernel/apic/io_apic.c
1390
pr_err("... fixing up to %d. (tell your hw vendor)\n", reg_00.bits.ID);
arch/x86/kernel/apic/io_apic.c
1391
ioapics[ioapic_idx].mp_config.apicid = reg_00.bits.ID;
arch/x86/kernel/apic/io_apic.c
1431
if (mpc_ioapic_id(ioapic_idx) == reg_00.bits.ID)
arch/x86/kernel/apic/io_apic.c
1437
reg_00.bits.ID = mpc_ioapic_id(ioapic_idx);
arch/x86/kernel/apic/io_apic.c
1443
if (reg_00.bits.ID != mpc_ioapic_id(ioapic_idx))
arch/x86/kernel/apic/io_apic.c
2303
if (reg_00.bits.ID != mpc_ioapic_id(ioapic_idx)) {
arch/x86/kernel/apic/io_apic.c
2304
reg_00.bits.ID = mpc_ioapic_id(ioapic_idx);
arch/x86/kernel/apic/io_apic.c
2353
return reg_01.bits.entries + 1;
arch/x86/kernel/apic/io_apic.c
2392
ioapic, apic_id, reg_00.bits.ID);
arch/x86/kernel/apic/io_apic.c
2393
apic_id = reg_00.bits.ID;
arch/x86/kernel/apic/io_apic.c
2412
if (reg_00.bits.ID != apic_id) {
arch/x86/kernel/apic/io_apic.c
2413
reg_00.bits.ID = apic_id;
arch/x86/kernel/apic/io_apic.c
2421
if (reg_00.bits.ID != apic_id) {
arch/x86/kernel/apic/io_apic.c
2461
new_id = reg_00.bits.ID;
arch/x86/kernel/apic/io_apic.c
2470
reg_00.bits.ID = new_id;
arch/x86/kernel/apic/io_apic.c
2476
BUG_ON(reg_00.bits.ID != new_id);
arch/x86/kernel/apic/io_apic.c
2489
return reg_01.bits.version;
arch/x86/kernel/apic/x2apic_uv_x.c
1383
static inline void blade_update_min_max(unsigned long bits, int base, int mask, int *min, int *max)
arch/x86/kernel/apic/x2apic_uv_x.c
1387
if (!bits)
arch/x86/kernel/apic/x2apic_uv_x.c
1389
first = (base + __ffs(bits)) & mask;
arch/x86/kernel/apic/x2apic_uv_x.c
1390
last = (base + __fls(bits)) & mask;
arch/x86/kernel/cpu/amd.c
449
va_align.bits = get_random_u32() & va_align.mask;
arch/x86/kernel/cpu/microcode/intel.c
703
native_wrmsrq(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
arch/x86/kernel/idt.c
24
.bits.ist = _ist, \
arch/x86/kernel/idt.c
25
.bits.type = _type, \
arch/x86/kernel/idt.c
26
.bits.dpl = _dpl, \
arch/x86/kernel/idt.c
27
.bits.p = 1, \
arch/x86/kernel/machine_kexec_64.c
330
idtentry.bits.p = 1;
arch/x86/kernel/machine_kexec_64.c
331
idtentry.bits.type = GATE_TRAP;
arch/x86/kernel/sys_x86_64.c
55
return va_align.bits & get_align_mask(NULL);
arch/x86/kvm/ioapic.c
243
trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
arch/x86/kvm/ioapic.c
365
e->bits &= 0xffffffff;
arch/x86/kvm/ioapic.c
366
e->bits |= (u64) val << 32;
arch/x86/kvm/ioapic.c
368
e->bits &= ~0xffffffffULL;
arch/x86/kvm/ioapic.c
369
e->bits |= (u32) val;
arch/x86/kvm/ioapic.c
577
trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
arch/x86/kvm/ioapic.c
64
redir_content = ioapic->redirtbl[index].bits;
arch/x86/kvm/ioapic.h
55
u64 bits;
arch/x86/kvm/vmx/pmu_intel.c
493
static void intel_pmu_enable_fixed_counter_bits(struct kvm_pmu *pmu, u64 bits)
arch/x86/kvm/vmx/pmu_intel.c
498
pmu->fixed_ctr_ctrl_rsvd &= ~intel_fixed_bits_by_idx(i, bits);
arch/x86/kvm/vmx/sgx.c
377
const u64 bits = FEAT_CTL_SGX_ENABLED | FEAT_CTL_LOCKED;
arch/x86/kvm/vmx/sgx.c
379
return (to_vmx(vcpu)->msr_ia32_feature_control & bits) == bits;
arch/x86/kvm/vmx/tdx.h
105
BUILD_BUG_ON(bits != 16 && bits != 32 && bits != 64);
arch/x86/kvm/vmx/tdx.h
115
BUILD_BUG_ON_MSG(bits != 64 && __builtin_constant_p(field) &&
arch/x86/kvm/vmx/tdx.h
119
BUILD_BUG_ON_MSG(bits != 32 && __builtin_constant_p(field) &&
arch/x86/kvm/vmx/tdx.h
122
BUILD_BUG_ON_MSG(bits != 16 && __builtin_constant_p(field) &&
arch/x86/kvm/vmx/tdx.h
127
static __always_inline void tdvps_management_check(u64 field, u8 bits) {}
arch/x86/kvm/vmx/tdx.h
128
static __always_inline void tdvps_state_non_arch_check(u64 field, u8 bits) {}
arch/x86/kvm/vmx/tdx.h
130
#define TDX_BUILD_TDVPS_ACCESSORS(bits, uclass, lclass) \
arch/x86/kvm/vmx/tdx.h
131
static __always_inline u##bits td_##lclass##_read##bits(struct vcpu_tdx *tdx, \
arch/x86/kvm/vmx/tdx.h
136
tdvps_##lclass##_check(field, bits); \
arch/x86/kvm/vmx/tdx.h
142
return (u##bits)data; \
arch/x86/kvm/vmx/tdx.h
144
static __always_inline void td_##lclass##_write##bits(struct vcpu_tdx *tdx, \
arch/x86/kvm/vmx/tdx.h
145
u32 field, u##bits val) \
arch/x86/kvm/vmx/tdx.h
149
tdvps_##lclass##_check(field, bits); \
arch/x86/kvm/vmx/tdx.h
151
GENMASK_ULL(bits - 1, 0)); \
arch/x86/kvm/vmx/tdx.h
155
static __always_inline void td_##lclass##_setbit##bits(struct vcpu_tdx *tdx, \
arch/x86/kvm/vmx/tdx.h
160
tdvps_##lclass##_check(field, bits); \
arch/x86/kvm/vmx/tdx.h
165
static __always_inline void td_##lclass##_clearbit##bits(struct vcpu_tdx *tdx, \
arch/x86/kvm/vmx/tdx.h
170
tdvps_##lclass##_check(field, bits); \
arch/x86/kvm/vmx/tdx.h
93
static __always_inline void tdvps_vmcs_check(u32 field, u8 bits)
arch/x86/kvm/vmx/vmx.h
582
#define BUILD_CONTROLS_SHADOW(lname, uname, bits) \
arch/x86/kvm/vmx/vmx.h
583
static inline void lname##_controls_set(struct vcpu_vmx *vmx, u##bits val) \
arch/x86/kvm/vmx/vmx.h
586
vmcs_write##bits(uname, val); \
arch/x86/kvm/vmx/vmx.h
590
static inline u##bits __##lname##_controls_get(struct loaded_vmcs *vmcs) \
arch/x86/kvm/vmx/vmx.h
594
static inline u##bits lname##_controls_get(struct vcpu_vmx *vmx) \
arch/x86/kvm/vmx/vmx.h
598
static __always_inline void lname##_controls_setbit(struct vcpu_vmx *vmx, u##bits val) \
arch/x86/kvm/vmx/vmx.h
603
static __always_inline void lname##_controls_clearbit(struct vcpu_vmx *vmx, u##bits val) \
arch/x86/kvm/vmx/vmx.h
608
static __always_inline void lname##_controls_changebit(struct vcpu_vmx *vmx, u##bits val, \
arch/x86/kvm/vmx/vmx.h
641
unsigned long bits = KVM_POSSIBLE_CR0_GUEST_BITS;
arch/x86/kvm/vmx/vmx.h
653
bits &= ~X86_CR0_WP;
arch/x86/kvm/vmx/vmx.h
654
return bits;
arch/x86/mm/numa.c
64
return bitmap_weight(numa_phys_nodes_parsed.bits, MAX_NUMNODES);
arch/x86/platform/scx200/scx200_32.c
104
new_config = (config & mask) | bits;
arch/x86/platform/scx200/scx200_32.c
95
u32 scx200_gpio_configure(unsigned index, u32 mask, u32 bits)
arch/x86/tools/relocs.c
5
#define _ElfW(bits, type) __ElfW(bits, type)
arch/x86/tools/relocs.c
6
#define __ElfW(bits, type) Elf##bits##_##type
arch/x86/tools/vdso2c.c
106
#define GLE(x, bits, ifnot) \
arch/x86/tools/vdso2c.c
108
(sizeof(*(x)) == bits/8), \
arch/x86/tools/vdso2c.c
109
(__typeof__(*(x)))get_unaligned_le##bits(x), ifnot)
arch/x86/tools/vdso2c.c
118
#define PLE(x, val, bits, ifnot) \
arch/x86/tools/vdso2c.c
120
(sizeof(*(x)) == bits/8), \
arch/x86/tools/vdso2c.c
121
put_unaligned_le##bits((val), (x)), ifnot)
arch/x86/tools/vdso2c.c
133
#define BITSFUNC3(name, bits, suffix) name##bits##suffix
arch/x86/tools/vdso2c.c
134
#define BITSFUNC2(name, bits, suffix) BITSFUNC3(name, bits, suffix)
arch/x86/tools/vdso2c.c
139
#define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x
arch/x86/tools/vdso2c.c
140
#define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x)
arch/x86/xen/enlighten_pv.c
845
if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
arch/x86/xen/enlighten_pv.c
851
if (!get_trap_addr((void **)&addr, val->bits.ist))
arch/x86/xen/enlighten_pv.c
856
info->flags = val->bits.dpl;
arch/x86/xen/enlighten_pv.c
858
if (val->bits.type == GATE_INTERRUPT)
crypto/camellia_generic.c
319
#define ROLDQ(ll, lr, rl, rr, w0, w1, bits) ({ \
crypto/camellia_generic.c
321
ll = (ll << bits) + (lr >> (32 - bits)); \
crypto/camellia_generic.c
322
lr = (lr << bits) + (rl >> (32 - bits)); \
crypto/camellia_generic.c
323
rl = (rl << bits) + (rr >> (32 - bits)); \
crypto/camellia_generic.c
324
rr = (rr << bits) + (w0 >> (32 - bits)); \
crypto/camellia_generic.c
327
#define ROLDQo32(ll, lr, rl, rr, w0, w1, bits) ({ \
crypto/camellia_generic.c
330
ll = (lr << (bits - 32)) + (rl >> (64 - bits)); \
crypto/camellia_generic.c
331
lr = (rl << (bits - 32)) + (rr >> (64 - bits)); \
crypto/camellia_generic.c
332
rl = (rr << (bits - 32)) + (w0 >> (64 - bits)); \
crypto/camellia_generic.c
333
rr = (w0 << (bits - 32)) + (w1 >> (64 - bits)); \
crypto/jitterentropy.c
384
static __u64 jent_loop_shuffle(unsigned int bits, unsigned int min)
crypto/jitterentropy.c
389
unsigned int mask = (1<<bits) - 1;
crypto/jitterentropy.c
397
for (i = 0; ((DATA_SIZE_BITS + bits - 1) / bits) > i; i++) {
crypto/jitterentropy.c
399
time = time >> bits;
drivers/acpi/acpi_ffh.c
36
u32 bits, acpi_integer *value,
drivers/acpi/acpi_ipmi.c
525
u32 bits, acpi_integer *value,
drivers/acpi/acpi_pcc.c
97
u32 bits, acpi_integer *value,
drivers/acpi/bus.c
520
static void acpi_bus_decode_usb_osc(const char *msg, u32 bits)
drivers/acpi/bus.c
523
(bits & OSC_USB_USB3_TUNNELING) ? '+' : '-',
drivers/acpi/bus.c
524
(bits & OSC_USB_DP_TUNNELING) ? '+' : '-',
drivers/acpi/bus.c
525
(bits & OSC_USB_PCIE_TUNNELING) ? '+' : '-',
drivers/acpi/bus.c
526
(bits & OSC_USB_XDOMAIN) ? '+' : '-');
drivers/acpi/ec.c
1344
u32 bits, u64 *value64,
drivers/acpi/ec.c
1348
int result = 0, i, bytes = bits / 8;
drivers/acpi/ec.c
1370
if (ec->busy_polling || bits > 8)
drivers/acpi/ec.c
1381
if (ec->busy_polling || bits > 8)
drivers/acpi/pmic/intel_pmic.c
168
acpi_physical_address address, u32 bits, u64 *value64,
drivers/acpi/pmic/intel_pmic.c
175
if (bits != 32 || !value64)
drivers/acpi/pmic/intel_pmic.c
205
acpi_physical_address address, u32 bits, u64 *value64,
drivers/acpi/pmic/intel_pmic.c
51
acpi_physical_address address, u32 bits, u64 *value64,
drivers/acpi/pmic/intel_pmic.c
59
if (bits != 32 || !value64)
drivers/acpi/pmic/tps68470_pmic.c
273
u32 bits, u64 *value,
drivers/acpi/pmic/tps68470_pmic.c
286
if (bits != 32)
drivers/acpi/pmic/tps68470_pmic.c
309
u32 bits, u64 *value,
drivers/acpi/pmic/tps68470_pmic.c
313
return tps68470_pmic_common_handler(function, address, bits, value,
drivers/acpi/pmic/tps68470_pmic.c
322
acpi_physical_address address, u32 bits,
drivers/acpi/pmic/tps68470_pmic.c
326
return tps68470_pmic_common_handler(function, address, bits, value,
drivers/acpi/pmic/tps68470_pmic.c
336
u32 bits, u64 *value,
drivers/acpi/pmic/tps68470_pmic.c
340
return tps68470_pmic_common_handler(function, address, bits, value,
drivers/acpi/pmic/tps68470_pmic.c
350
u32 bits, u64 *value,
drivers/acpi/pmic/tps68470_pmic.c
354
if (bits != 32)
drivers/acpi/pmic/tps68470_pmic.c
363
return tps68470_pmic_common_handler(function, address, bits, value,
drivers/acpi/prmt.c
304
u32 bits, acpi_integer *value,
drivers/acpi/x86/cmos_rtc.c
29
u32 bits, u64 *value64,
drivers/acpi/x86/cmos_rtc.c
33
unsigned int i, bytes = DIV_ROUND_UP(bits, 8);
drivers/ata/libata-core.c
6426
int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
drivers/ata/libata-core.c
6430
switch (bits->width) {
drivers/ata/libata-core.c
6433
pci_read_config_byte(pdev, bits->reg, &tmp8);
drivers/ata/libata-core.c
6439
pci_read_config_word(pdev, bits->reg, &tmp16);
drivers/ata/libata-core.c
6445
pci_read_config_dword(pdev, bits->reg, &tmp32);
drivers/ata/libata-core.c
6454
tmp &= bits->mask;
drivers/ata/libata-core.c
6456
return (tmp == bits->val) ? 1 : 0;
drivers/ata/libata-core.c
904
int shift, bits;
drivers/ata/libata-core.c
932
if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
drivers/ata/libata-core.c
955
if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
drivers/ata/libata-core.c
979
if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
drivers/auxdisplay/panel.c
575
static DECLARE_BITMAP(bits, LCD_BITS);
drivers/auxdisplay/panel.c
582
state = test_bit(bit, bits) ? BIT_SET : BIT_CLR;
drivers/auxdisplay/panel.c
692
clear_bit(LCD_BIT_CL, bits); /* CLK low */
drivers/auxdisplay/panel.c
695
set_bit(LCD_BIT_DA, bits);
drivers/auxdisplay/panel.c
697
clear_bit(LCD_BIT_DA, bits);
drivers/auxdisplay/panel.c
702
set_bit(LCD_BIT_CL, bits); /* CLK high */
drivers/auxdisplay/panel.c
718
set_bit(LCD_BIT_BL, bits);
drivers/auxdisplay/panel.c
720
clear_bit(LCD_BIT_BL, bits);
drivers/auxdisplay/panel.c
755
set_bit(LCD_BIT_E, bits);
drivers/auxdisplay/panel.c
756
clear_bit(LCD_BIT_RS, bits);
drivers/auxdisplay/panel.c
757
clear_bit(LCD_BIT_RW, bits);
drivers/auxdisplay/panel.c
762
clear_bit(LCD_BIT_E, bits);
drivers/auxdisplay/panel.c
777
set_bit(LCD_BIT_E, bits);
drivers/auxdisplay/panel.c
778
set_bit(LCD_BIT_RS, bits);
drivers/auxdisplay/panel.c
779
clear_bit(LCD_BIT_RW, bits);
drivers/auxdisplay/panel.c
784
clear_bit(LCD_BIT_E, bits);
drivers/base/regmap/regmap.c
2288
int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
drivers/base/regmap/regmap.c
2297
return (val & bits) == bits;
drivers/base/regmap/regmap.c
3338
int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
drivers/base/regmap/regmap.c
3347
return (val & bits) == bits;
drivers/block/drbd/drbd_bitmap.c
1475
int bits;
drivers/block/drbd/drbd_bitmap.c
1482
bits = hweight_long(paddr[i]);
drivers/block/drbd/drbd_bitmap.c
1484
changed += BITS_PER_LONG - bits;
drivers/block/drbd/drbd_bitmap.c
557
unsigned long bits = 0;
drivers/block/drbd/drbd_bitmap.c
564
bits += bitmap_weight(p_addr, BITS_PER_PAGE);
drivers/block/drbd/drbd_bitmap.c
571
bits += bitmap_weight(p_addr, last_word * BITS_PER_LONG);
drivers/block/drbd/drbd_bitmap.c
573
bits += hweight_long(p_addr[last_word]);
drivers/block/drbd/drbd_bitmap.c
578
return bits;
drivers/block/drbd/drbd_bitmap.c
633
unsigned long bits, words, owords, obits;
drivers/block/drbd/drbd_bitmap.c
666
bits = BM_SECT_TO_BIT(ALIGN(capacity, BM_SECT_PER_BIT));
drivers/block/drbd/drbd_bitmap.c
673
words = ALIGN(bits, 64) >> LN2_BPL;
drivers/block/drbd/drbd_bitmap.c
678
if (bits > bits_on_disk) {
drivers/block/drbd/drbd_bitmap.c
679
drbd_info(device, "bits = %lu\n", bits);
drivers/block/drbd/drbd_bitmap.c
708
growing = bits > obits;
drivers/block/drbd/drbd_bitmap.c
714
b->bm_bits = bits;
drivers/block/drbd/drbd_bitmap.c
721
b->bm_set += bits - obits;
drivers/block/drbd/drbd_bitmap.c
739
drbd_info(device, "resync bitmap: bits=%lu words=%lu pages=%lu\n", bits, words, want);
drivers/block/drbd/drbd_bitmap.c
813
unsigned long word, bits;
drivers/block/drbd/drbd_bitmap.c
836
bits = hweight_long(*bm);
drivers/block/drbd/drbd_bitmap.c
839
b->bm_set += hweight_long(word) - bits;
drivers/block/drbd/drbd_int.h
1202
#define Bit2KB(bits) ((bits)<<(BM_BLOCK_SHIFT-10))
drivers/block/drbd/drbd_main.c
1092
int bits, use_rle;
drivers/block/drbd/drbd_main.c
1144
bits = vli_encode_bits(&bs, rl);
drivers/block/drbd/drbd_main.c
1145
if (bits == -ENOBUFS) /* buffer full */
drivers/block/drbd/drbd_main.c
1147
if (bits <= 0) {
drivers/block/drbd/drbd_main.c
1148
drbd_err(device, "error while encoding bitmap: %d\n", bits);
drivers/block/drbd/drbd_receiver.c
3022
u64 bits, u64 flags)
drivers/block/drbd/drbd_receiver.c
3034
(unsigned long long)bits,
drivers/block/drbd/drbd_receiver.c
4519
int bits;
drivers/block/drbd/drbd_receiver.c
4523
bits = bitstream_get_bits(&bs, &look_ahead, 64);
drivers/block/drbd/drbd_receiver.c
4524
if (bits < 0)
drivers/block/drbd/drbd_receiver.c
4527
for (have = bits; have > 0; s += rl, toggle = !toggle) {
drivers/block/drbd/drbd_receiver.c
4528
bits = vli_decode_bits(&rl, look_ahead);
drivers/block/drbd/drbd_receiver.c
4529
if (bits <= 0)
drivers/block/drbd/drbd_receiver.c
4541
if (have < bits) {
drivers/block/drbd/drbd_receiver.c
4543
have, bits, look_ahead,
drivers/block/drbd/drbd_receiver.c
4549
if (likely(bits < 64))
drivers/block/drbd/drbd_receiver.c
4550
look_ahead >>= bits;
drivers/block/drbd/drbd_receiver.c
4553
have -= bits;
drivers/block/drbd/drbd_receiver.c
4555
bits = bitstream_get_bits(&bs, &tmp, 64 - have);
drivers/block/drbd/drbd_receiver.c
4556
if (bits < 0)
drivers/block/drbd/drbd_receiver.c
4559
have += bits;
drivers/block/drbd/drbd_vli.h
207
static inline void bitstream_cursor_advance(struct bitstream_cursor *cur, unsigned int bits)
drivers/block/drbd/drbd_vli.h
209
bits += cur->bit;
drivers/block/drbd/drbd_vli.h
210
cur->b = cur->b + (bits >> 3);
drivers/block/drbd/drbd_vli.h
211
cur->bit = bits & 7;
drivers/block/drbd/drbd_vli.h
248
static inline int bitstream_put_bits(struct bitstream *bs, u64 val, const unsigned int bits)
drivers/block/drbd/drbd_vli.h
253
if (bits == 0)
drivers/block/drbd/drbd_vli.h
256
if ((bs->cur.b + ((bs->cur.bit + bits -1) >> 3)) - bs->buf >= bs->buf_len)
drivers/block/drbd/drbd_vli.h
260
if (bits < 64)
drivers/block/drbd/drbd_vli.h
261
val &= ~0ULL >> (64 - bits);
drivers/block/drbd/drbd_vli.h
265
for (tmp = 8 - bs->cur.bit; tmp < bits; tmp += 8)
drivers/block/drbd/drbd_vli.h
268
bitstream_cursor_advance(&bs->cur, bits);
drivers/block/drbd/drbd_vli.h
269
return bits;
drivers/block/drbd/drbd_vli.h
281
static inline int bitstream_get_bits(struct bitstream *bs, u64 *out, int bits)
drivers/block/drbd/drbd_vli.h
286
if (bits > 64)
drivers/block/drbd/drbd_vli.h
289
if (bs->cur.b + ((bs->cur.bit + bs->pad_bits + bits -1) >> 3) - bs->buf >= bs->buf_len)
drivers/block/drbd/drbd_vli.h
290
bits = ((bs->buf_len - (bs->cur.b - bs->buf)) << 3)
drivers/block/drbd/drbd_vli.h
293
if (bits == 0) {
drivers/block/drbd/drbd_vli.h
300
n = (bs->cur.bit + bits + 7) >> 3;
drivers/block/drbd/drbd_vli.h
312
val &= ~0ULL >> (64 - bits);
drivers/block/drbd/drbd_vli.h
314
bitstream_cursor_advance(&bs->cur, bits);
drivers/block/drbd/drbd_vli.h
317
return bits;
drivers/block/drbd/drbd_vli.h
331
int bits = __vli_encode_bits(&code, in);
drivers/block/drbd/drbd_vli.h
333
if (bits <= 0)
drivers/block/drbd/drbd_vli.h
334
return bits;
drivers/block/drbd/drbd_vli.h
336
return bitstream_put_bits(bs, code, bits);
drivers/bluetooth/btintel_pcie.h
559
u32 offset, u32 bits)
drivers/bluetooth/btintel_pcie.h
564
r |= bits;
drivers/bluetooth/btintel_pcie.h
569
u32 offset, u32 bits)
drivers/bluetooth/btintel_pcie.h
574
r &= ~bits;
drivers/bluetooth/btmrvl_sdio.c
414
static int btmrvl_sdio_poll_card_status(struct btmrvl_sdio_card *card, u8 bits)
drivers/bluetooth/btmrvl_sdio.c
424
if ((status & bits) == bits)
drivers/cdrom/cdrom.c
411
#define ENSURE(cdo, call, bits) \
drivers/cdrom/cdrom.c
414
WARN_ON_ONCE((cdo)->capability & (bits)); \
drivers/char/agp/alpha-agp.c
78
agp->mode.bits.enable = 1;
drivers/char/ds1620.c
146
static void ds1620_out(int cmd, int bits, int value)
drivers/char/ds1620.c
158
if (bits)
drivers/char/ds1620.c
159
ds1620_send_bits(bits, value);
drivers/char/ds1620.c
169
static unsigned int ds1620_in(int cmd, int bits)
drivers/char/ds1620.c
184
value = ds1620_recv_bits(bits);
drivers/char/hw_random/arm_smccc_trng.c
70
size_t bits = min_t(size_t, (max - copied) * BITS_PER_BYTE,
drivers/char/hw_random/arm_smccc_trng.c
73
arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND, bits, &res);
drivers/char/hw_random/arm_smccc_trng.c
78
bits / BITS_PER_BYTE);
drivers/char/lp.c
172
if (!test_and_set_bit(LP_PARPORT_CLAIMED, &this_lp->bits)) {
drivers/char/lp.c
180
if (test_and_clear_bit(LP_PARPORT_CLAIMED, &this_lp->bits)) {
drivers/char/lp.c
190
set_bit(LP_PREEMPT_REQUEST, &this_lp->bits);
drivers/char/lp.c
403
&lp_table[minor].bits)) {
drivers/char/pc8736x_gpio.c
125
static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits,
drivers/char/pc8736x_gpio.c
139
new_config = (config & mask) | bits;
drivers/char/pc8736x_gpio.c
147
static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits)
drivers/char/pc8736x_gpio.c
149
return pc8736x_gpio_configure_fn(index, mask, bits,
drivers/char/random.c
1142
unsigned int bits;
drivers/char/random.c
1189
bits = min(fls(delta >> 1), 11);
drivers/char/random.c
1199
this_cpu_ptr(&irq_randomness)->count += max(1u, bits * 64) - 1;
drivers/char/random.c
1201
_credit_init_bits(bits);
drivers/char/random.c
710
#define credit_init_bits(bits) if (!crng_ready()) _credit_init_bits(bits)
drivers/char/random.c
712
static void __cold _credit_init_bits(size_t bits)
drivers/char/random.c
719
if (!bits)
drivers/char/random.c
722
add = min_t(size_t, bits, POOL_BITS);
drivers/char/sonypi.c
1262
dev->bits = irq_list->bits;
drivers/char/sonypi.c
172
u16 bits;
drivers/char/sonypi.c
469
u16 bits;
drivers/char/sonypi.c
570
v |= (((u32) sonypi_device.bits) << SONYPI_IRQ_SHIFT);
drivers/char/sonypi.c
584
if (sonypi_ec_write(SONYPI_SIRQ, sonypi_device.bits))
drivers/char/tpm/tpm2-sessions.c
445
const __be32 bits = cpu_to_be32(bytes * 8);
drivers/char/tpm/tpm2-sessions.c
456
hmac_sha256_update(&hctx, (u8 *)&bits, sizeof(bits));
drivers/clk/at91/sckc.c
107
if (tmp & osc->bits->cr_osc32byp)
drivers/clk/at91/sckc.c
110
return !!(tmp & osc->bits->cr_osc32en);
drivers/clk/at91/sckc.c
125
const struct clk_slow_bits *bits)
drivers/clk/at91/sckc.c
148
osc->bits = bits;
drivers/clk/at91/sckc.c
151
writel((readl(sckcr) & ~osc->bits->cr_osc32en) |
drivers/clk/at91/sckc.c
152
osc->bits->cr_osc32byp, sckcr);
drivers/clk/at91/sckc.c
193
writel(readl(sckcr) | osc->bits->cr_rcen, sckcr);
drivers/clk/at91/sckc.c
208
writel(readl(sckcr) & ~osc->bits->cr_rcen, sckcr);
drivers/clk/at91/sckc.c
215
return !!(readl(osc->sckcr) & osc->bits->cr_rcen);
drivers/clk/at91/sckc.c
232
const struct clk_slow_bits *bits)
drivers/clk/at91/sckc.c
254
osc->bits = bits;
drivers/clk/at91/sckc.c
288
if ((!index && !(tmp & slowck->bits->cr_oscsel)) ||
drivers/clk/at91/sckc.c
289
(index && (tmp & slowck->bits->cr_oscsel)))
drivers/clk/at91/sckc.c
293
tmp |= slowck->bits->cr_oscsel;
drivers/clk/at91/sckc.c
295
tmp &= ~slowck->bits->cr_oscsel;
drivers/clk/at91/sckc.c
311
return !!(readl(slowck->sckcr) & slowck->bits->cr_oscsel);
drivers/clk/at91/sckc.c
325
const struct clk_slow_bits *bits)
drivers/clk/at91/sckc.c
34
const struct clk_slow_bits *bits;
drivers/clk/at91/sckc.c
347
slowck->bits = bits;
drivers/clk/at91/sckc.c
348
slowck->parent = !!(readl(sckcr) & slowck->bits->cr_oscsel);
drivers/clk/at91/sckc.c
370
const struct clk_slow_bits *bits)
drivers/clk/at91/sckc.c
388
rc_osc_startup_us, bits);
drivers/clk/at91/sckc.c
413
&parent_data, 1200000, bypass, bits);
drivers/clk/at91/sckc.c
420
2, bits);
drivers/clk/at91/sckc.c
43
const struct clk_slow_bits *bits;
drivers/clk/at91/sckc.c
53
const struct clk_slow_bits *bits;
drivers/clk/at91/sckc.c
556
if ((readl(osc->sckcr) & osc->bits->cr_oscsel)) {
drivers/clk/at91/sckc.c
627
osc->bits = &at91sama5d4_bits;
drivers/clk/at91/sckc.c
64
const struct clk_slow_bits *bits;
drivers/clk/at91/sckc.c
76
if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en))
drivers/clk/at91/sckc.c
79
writel(tmp | osc->bits->cr_osc32en, sckcr);
drivers/clk/at91/sckc.c
95
if (tmp & osc->bits->cr_osc32byp)
drivers/clk/at91/sckc.c
98
writel(tmp & ~osc->bits->cr_osc32en, sckcr);
drivers/clk/ingenic/cgu.c
345
GENMASK(clk_info->mux.bits - 1, 0);
drivers/clk/ingenic/cgu.c
377
num_poss = 1 << clk_info->mux.bits;
drivers/clk/ingenic/cgu.c
389
mask = GENMASK(clk_info->mux.bits - 1, 0);
drivers/clk/ingenic/cgu.c
423
GENMASK(clk_info->div.bits - 1, 0);
drivers/clk/ingenic/cgu.c
445
for (i = 0; i < (1 << clk_info->div.bits)
drivers/clk/ingenic/cgu.c
483
clk_info->div.div << clk_info->div.bits);
drivers/clk/ingenic/cgu.c
553
mask = GENMASK(clk_info->div.bits - 1, 0);
drivers/clk/ingenic/cgu.c
706
num_possible = 1 << clk_info->mux.bits;
drivers/clk/ingenic/cgu.h
104
u8 bits;
drivers/clk/ingenic/cgu.h
80
u8 bits;
drivers/clk/mmp/clk-of-mmp2.c
474
cells[i].bits = 0x4;
drivers/clk/mmp/clk-of-pxa168.c
294
cells[i].bits = 0x4;
drivers/clk/mmp/clk-of-pxa1928.c
201
cells[base + i].bits = 0x4;
drivers/clk/mmp/clk-of-pxa910.c
253
cells[base + i].bits = 0x4;
drivers/clk/mmp/clk-of-pxa910.c
263
cells[base + i].bits = 0x4;
drivers/clk/mmp/clk-pxa1908-apbc.c
114
cells[i].bits = BIT(2);
drivers/clk/mmp/clk-pxa1908-apbcp.c
61
cells[i].bits = BIT(2);
drivers/clk/mmp/reset.c
47
val |= cell->bits;
drivers/clk/mmp/reset.c
69
val &= ~cell->bits;
drivers/clk/mmp/reset.h
12
u32 bits;
drivers/clk/ti/clkctrl.c
430
const struct omap_clkctrl_bit_data *bits = data->bit_data;
drivers/clk/ti/clkctrl.c
432
if (!bits)
drivers/clk/ti/clkctrl.c
435
while (bits->bit) {
drivers/clk/ti/clkctrl.c
436
switch (bits->type) {
drivers/clk/ti/clkctrl.c
439
bits, reg, clkctrl_name);
drivers/clk/ti/clkctrl.c
444
bits, reg, clkctrl_name);
drivers/clk/ti/clkctrl.c
449
bits, reg, clkctrl_name);
drivers/clk/ti/clkctrl.c
454
bits->type);
drivers/clk/ti/clkctrl.c
457
bits++;
drivers/clocksource/mmio.c
54
unsigned long hz, int rating, unsigned bits,
drivers/clocksource/mmio.c
59
if (bits > 64 || bits < 16)
drivers/clocksource/mmio.c
70
cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
drivers/clocksource/samsung_pwm_timer.c
105
u8 bits;
drivers/clocksource/samsung_pwm_timer.c
107
bits = (fls(divisor) - 1) - pwm.variant.div_base;
drivers/clocksource/samsung_pwm_timer.c
113
reg |= bits << shift;
drivers/clocksource/samsung_pwm_timer.c
352
pwm.variant.bits, clock_rate);
drivers/clocksource/samsung_pwm_timer.c
354
samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
drivers/clocksource/samsung_pwm_timer.c
362
pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;
drivers/clocksource/samsung_pwm_timer.c
363
if (pwm.variant.bits == 16) {
drivers/clocksource/samsung_pwm_timer.c
466
.bits = 16,
drivers/clocksource/samsung_pwm_timer.c
479
.bits = 32,
drivers/clocksource/samsung_pwm_timer.c
492
.bits = 32,
drivers/clocksource/samsung_pwm_timer.c
505
.bits = 32,
drivers/clocksource/timer-atmel-pit.c
169
unsigned bits;
drivers/clocksource/timer-atmel-pit.c
220
bits = 12 /* PICNT */ + ilog2(data->cycle) /* PIV */;
drivers/clocksource/timer-atmel-pit.c
221
data->clksrc.mask = CLOCKSOURCE_MASK(bits);
drivers/clocksource/timer-atmel-tcb.c
261
int bits = tc->tcb_config->counter_width;
drivers/clocksource/timer-atmel-tcb.c
271
if (bits == 32) {
drivers/clocksource/timer-atmel-tcb.c
292
if (bits != 32)
drivers/clocksource/timer-atmel-tcb.c
297
clockevents_config_and_register(&clkevt.clkevt, clkevt.rate, 1, BIT(bits) - 1);
drivers/clocksource/timer-atmel-tcb.c
383
int bits;
drivers/clocksource/timer-atmel-tcb.c
423
bits = tc.tcb_config->counter_width;
drivers/clocksource/timer-atmel-tcb.c
458
if (bits == 32) {
drivers/clocksource/timer-atmel-tcb.c
501
if (bits != 32)
drivers/clocksource/timer-stm32.c
233
u32 bits = stm32_timer_of_bits_get(to);
drivers/clocksource/timer-stm32.c
245
if (bits == 32 && !stm32_timer_cnt) {
drivers/clocksource/timer-stm32.c
254
sched_clock_register(stm32_read_sched_clock, bits, timer_of_rate(to));
drivers/clocksource/timer-stm32.c
264
timer_of_rate(to), bits == 32 ? 250 : 100,
drivers/clocksource/timer-stm32.c
265
bits, clocksource_mmio_readl_up);
drivers/clocksource/timer-stm32.c
270
u32 bits = stm32_timer_of_bits_get(to);
drivers/clocksource/timer-stm32.c
279
to->clkevt.rating = bits == 32 ? 250 : 100;
drivers/clocksource/timer-stm32.c
282
(1 << bits) - 1);
drivers/clocksource/timer-stm32.c
285
to->np, bits);
drivers/clocksource/timer-stm32.c
50
int bits;
drivers/clocksource/timer-stm32.c
62
static void stm32_timer_of_bits_set(struct timer_of *to, int bits)
drivers/clocksource/timer-stm32.c
66
pd->bits = bits;
drivers/clocksource/timer-stm32.c
82
return pd->bits;
drivers/comedi/comedi_fops.c
622
unsigned int bits)
drivers/comedi/comedi_fops.c
624
s->runflags &= ~bits;
drivers/comedi/comedi_fops.c
628
unsigned int bits)
drivers/comedi/comedi_fops.c
630
s->runflags |= bits;
drivers/comedi/comedi_fops.c
635
unsigned int bits)
drivers/comedi/comedi_fops.c
641
__comedi_set_subdevice_runflags(s, bits & mask);
drivers/comedi/drivers.c
395
unsigned int bits = data[1];
drivers/comedi/drivers.c
399
s->state |= (bits & mask);
drivers/comedi/drivers/addi_apci_2032.c
191
unsigned short bits = 0;
drivers/comedi/drivers/addi_apci_2032.c
199
bits |= (1 << i);
drivers/comedi/drivers/addi_apci_2032.c
202
comedi_buf_write_samples(s, &bits, 1);
drivers/comedi/drivers/c6xdigio.c
100
bits = (val >> 4) & 0x03;
drivers/comedi/drivers/c6xdigio.c
101
c6xdigio_write_data(dev, cmd | bits | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
102
bits = (val >> 6) & 0x03;
drivers/comedi/drivers/c6xdigio.c
103
c6xdigio_write_data(dev, cmd | bits | (1 << 2), 0x80);
drivers/comedi/drivers/c6xdigio.c
104
bits = (val >> 8) & 0x03;
drivers/comedi/drivers/c6xdigio.c
105
c6xdigio_write_data(dev, cmd | bits | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
115
unsigned int bits;
drivers/comedi/drivers/c6xdigio.c
119
c6xdigio_get_encoder_bits(dev, &bits, cmd | (1 << 2), 0x80);
drivers/comedi/drivers/c6xdigio.c
120
val |= (bits << 0);
drivers/comedi/drivers/c6xdigio.c
122
c6xdigio_get_encoder_bits(dev, &bits, cmd | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
123
val |= (bits << 3);
drivers/comedi/drivers/c6xdigio.c
125
c6xdigio_get_encoder_bits(dev, &bits, cmd | (1 << 2), 0x80);
drivers/comedi/drivers/c6xdigio.c
126
val |= (bits << 6);
drivers/comedi/drivers/c6xdigio.c
128
c6xdigio_get_encoder_bits(dev, &bits, cmd | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
129
val |= (bits << 9);
drivers/comedi/drivers/c6xdigio.c
131
c6xdigio_get_encoder_bits(dev, &bits, cmd | (1 << 2), 0x80);
drivers/comedi/drivers/c6xdigio.c
132
val |= (bits << 12);
drivers/comedi/drivers/c6xdigio.c
134
c6xdigio_get_encoder_bits(dev, &bits, cmd | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
135
val |= (bits << 15);
drivers/comedi/drivers/c6xdigio.c
137
c6xdigio_get_encoder_bits(dev, &bits, cmd | (1 << 2), 0x80);
drivers/comedi/drivers/c6xdigio.c
138
val |= (bits << 18);
drivers/comedi/drivers/c6xdigio.c
140
c6xdigio_get_encoder_bits(dev, &bits, cmd | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
141
val |= (bits << 21);
drivers/comedi/drivers/c6xdigio.c
70
unsigned int *bits,
drivers/comedi/drivers/c6xdigio.c
80
*bits = val;
drivers/comedi/drivers/c6xdigio.c
89
unsigned int bits;
drivers/comedi/drivers/c6xdigio.c
96
bits = (val >> 0) & 0x03;
drivers/comedi/drivers/c6xdigio.c
97
c6xdigio_write_data(dev, cmd | bits | (0 << 2), 0x00);
drivers/comedi/drivers/c6xdigio.c
98
bits = (val >> 2) & 0x03;
drivers/comedi/drivers/c6xdigio.c
99
c6xdigio_write_data(dev, cmd | bits | (1 << 2), 0x80);
drivers/comedi/drivers/cb_pcidas.c
332
unsigned int bits;
drivers/comedi/drivers/cb_pcidas.c
346
bits = PCIDAS_AI_CHAN(chan) | PCIDAS_AI_GAIN(range);
drivers/comedi/drivers/cb_pcidas.c
349
bits |= PCIDAS_AI_UNIP;
drivers/comedi/drivers/cb_pcidas.c
352
bits |= PCIDAS_AI_SE;
drivers/comedi/drivers/cb_pcidas.c
353
outw(bits, devpriv->pcibar1 + PCIDAS_AI_REG);
drivers/comedi/drivers/cb_pcidas.c
792
unsigned int bits;
drivers/comedi/drivers/cb_pcidas.c
803
bits = PCIDAS_AI_FIRST(CR_CHAN(cmd->chanlist[0])) |
drivers/comedi/drivers/cb_pcidas.c
808
bits |= PCIDAS_AI_UNIP;
drivers/comedi/drivers/cb_pcidas.c
811
bits |= PCIDAS_AI_SE;
drivers/comedi/drivers/cb_pcidas.c
814
bits |= PCIDAS_AI_PACER_EXTP;
drivers/comedi/drivers/cb_pcidas.c
816
bits |= PCIDAS_AI_PACER_INT;
drivers/comedi/drivers/cb_pcidas.c
817
outw(bits, devpriv->pcibar1 + PCIDAS_AI_REG);
drivers/comedi/drivers/cb_pcidas.c
850
bits = 0;
drivers/comedi/drivers/cb_pcidas.c
852
bits |= PCIDAS_TRIG_SEL_SW;
drivers/comedi/drivers/cb_pcidas.c
854
bits |= PCIDAS_TRIG_SEL_EXT | PCIDAS_TRIG_EN | PCIDAS_TRIG_CLR;
drivers/comedi/drivers/cb_pcidas.c
857
bits |= PCIDAS_TRIG_POL;
drivers/comedi/drivers/cb_pcidas.c
859
bits |= PCIDAS_TRIG_MODE;
drivers/comedi/drivers/cb_pcidas.c
863
bits |= PCIDAS_TRIG_BURSTE;
drivers/comedi/drivers/cb_pcidas.c
864
outw(bits, devpriv->pcibar1 + PCIDAS_TRIG_REG);
drivers/comedi/drivers/cb_pcidas64.c
1187
u16 *bits, unsigned int channel,
drivers/comedi/drivers/cb_pcidas64.c
1198
*bits &= ~(0x3 << (2 * channel));
drivers/comedi/drivers/cb_pcidas64.c
1199
*bits |= code << (2 * channel);
drivers/comedi/drivers/cb_pcidas64.c
1249
u32 bits;
drivers/comedi/drivers/cb_pcidas64.c
1252
bits = EN_ADC_OVERRUN_BIT | EN_ADC_DONE_INTR_BIT |
drivers/comedi/drivers/cb_pcidas64.c
1261
bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT;
drivers/comedi/drivers/cb_pcidas64.c
1264
devpriv->intr_enable_bits |= bits;
drivers/comedi/drivers/cb_pcidas64.c
1275
u32 bits;
drivers/comedi/drivers/cb_pcidas64.c
1282
bits = PLX_BIGEND_DMA0 | PLX_BIGEND_DMA1;
drivers/comedi/drivers/cb_pcidas64.c
1284
bits = 0;
drivers/comedi/drivers/cb_pcidas64.c
1286
writel(bits, devpriv->plx9080_iobase + PLX_REG_BIGEND);
drivers/comedi/drivers/cb_pcidas64.c
1294
bits = 0;
drivers/comedi/drivers/cb_pcidas64.c
1296
bits |= PLX_DMAMODE_READYIEN;
drivers/comedi/drivers/cb_pcidas64.c
1298
bits |= PLX_DMAMODE_BTERMIEN;
drivers/comedi/drivers/cb_pcidas64.c
1300
bits |= PLX_DMAMODE_CHAINEN;
drivers/comedi/drivers/cb_pcidas64.c
1305
bits |= PLX_DMAMODE_DONEIEN;
drivers/comedi/drivers/cb_pcidas64.c
1310
bits |= PLX_DMAMODE_LACONST;
drivers/comedi/drivers/cb_pcidas64.c
1312
bits |= PLX_DMAMODE_INTRPCI;
drivers/comedi/drivers/cb_pcidas64.c
1314
bits |= PLX_DMAMODE_DEMAND;
drivers/comedi/drivers/cb_pcidas64.c
1316
bits |= PLX_DMAMODE_BURSTEN;
drivers/comedi/drivers/cb_pcidas64.c
1319
bits |= PLX_DMAMODE_WIDTH_32;
drivers/comedi/drivers/cb_pcidas64.c
1321
bits |= PLX_DMAMODE_WIDTH_16;
drivers/comedi/drivers/cb_pcidas64.c
1322
writel(bits, plx_iobase + PLX_REG_DMAMODE1);
drivers/comedi/drivers/cb_pcidas64.c
1324
writel(bits, plx_iobase + PLX_REG_DMAMODE0);
drivers/comedi/drivers/cb_pcidas64.c
1361
u16 bits;
drivers/comedi/drivers/cb_pcidas64.c
1371
bits = (~(num_increments - 1)) & fifo->fifo_size_reg_mask;
drivers/comedi/drivers/cb_pcidas64.c
1373
devpriv->fifo_size_bits |= bits;
drivers/comedi/drivers/cb_pcidas64.c
1418
u16 bits;
drivers/comedi/drivers/cb_pcidas64.c
1435
bits = SLOW_DAC_BIT | DMA_CH_SELECT_BIT;
drivers/comedi/drivers/cb_pcidas64.c
1437
bits |= INTERNAL_CLOCK_4020_BITS;
drivers/comedi/drivers/cb_pcidas64.c
1438
devpriv->hw_config_bits |= bits;
drivers/comedi/drivers/cb_pcidas64.c
1746
unsigned int bits = 0, n;
drivers/comedi/drivers/cb_pcidas64.c
1797
bits = 0;
drivers/comedi/drivers/cb_pcidas64.c
1799
bits |= ai_range_bits_6xxx(dev, CR_RANGE(insn->chanspec));
drivers/comedi/drivers/cb_pcidas64.c
1801
bits |= se_diff_bit_6xxx(dev, aref == AREF_DIFF);
drivers/comedi/drivers/cb_pcidas64.c
1803
bits |= ADC_COMMON_BIT;
drivers/comedi/drivers/cb_pcidas64.c
1804
bits |= adc_chan_bits(channel);
drivers/comedi/drivers/cb_pcidas64.c
1809
writew(bits, devpriv->main_iobase + ADC_QUEUE_LOAD_REG);
drivers/comedi/drivers/cb_pcidas64.c
2411
unsigned short bits;
drivers/comedi/drivers/cb_pcidas64.c
2419
bits = 0;
drivers/comedi/drivers/cb_pcidas64.c
2421
bits |= adc_chan_bits(CR_CHAN(cmd->chanlist[0]));
drivers/comedi/drivers/cb_pcidas64.c
2423
bits |= ai_range_bits_6xxx(dev,
drivers/comedi/drivers/cb_pcidas64.c
2426
bits |= se_diff_bit_6xxx(dev,
drivers/comedi/drivers/cb_pcidas64.c
2430
bits |= ADC_COMMON_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2436
writew(bits,
drivers/comedi/drivers/cb_pcidas64.c
2457
bits = 0;
drivers/comedi/drivers/cb_pcidas64.c
2459
bits |= adc_chan_bits(CR_CHAN(chanspec));
drivers/comedi/drivers/cb_pcidas64.c
2461
bits |= ai_range_bits_6xxx(dev,
drivers/comedi/drivers/cb_pcidas64.c
2467
bits |= se_diff_bit_6xxx(dev, use_differential);
drivers/comedi/drivers/cb_pcidas64.c
2470
bits |= ADC_COMMON_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2473
bits |= QUEUE_EOSCAN_BIT |
drivers/comedi/drivers/cb_pcidas64.c
2475
writew(bits,
drivers/comedi/drivers/cb_pcidas64.c
2553
u32 bits;
drivers/comedi/drivers/cb_pcidas64.c
2629
bits = 0;
drivers/comedi/drivers/cb_pcidas64.c
2631
bits |= EXT_START_TRIG_BNC_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2633
bits |= EXT_STOP_TRIG_BNC_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2634
writew(bits, devpriv->main_iobase + DAQ_ATRIG_LOW_4020_REG);
drivers/comedi/drivers/cb_pcidas64.c
2640
bits = ADC_ENABLE_BIT | ADC_SOFT_GATE_BITS | ADC_GATE_LEVEL_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2642
bits |= ADC_DMA_DISABLE_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2645
bits |= ADC_START_TRIG_EXT_BITS;
drivers/comedi/drivers/cb_pcidas64.c
2647
bits |= ADC_START_TRIG_FALLING_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2649
bits |= ADC_START_TRIG_SOFT_BITS;
drivers/comedi/drivers/cb_pcidas64.c
2652
bits |= ADC_SAMPLE_COUNTER_EN_BIT;
drivers/comedi/drivers/cb_pcidas64.c
2653
writew(bits, devpriv->main_iobase + ADC_CONTROL0_REG);
drivers/comedi/drivers/cb_pcidas64.c
3126
unsigned int bits = DAC_ENABLE_BIT | WAVEFORM_GATE_LEVEL_BIT |
drivers/comedi/drivers/cb_pcidas64.c
3130
bits |= WAVEFORM_TRIG_EXT_BITS;
drivers/comedi/drivers/cb_pcidas64.c
3132
bits |= WAVEFORM_TRIG_FALLING_BIT;
drivers/comedi/drivers/cb_pcidas64.c
3134
bits |= WAVEFORM_TRIG_SOFT_BITS;
drivers/comedi/drivers/cb_pcidas64.c
3137
bits |= DAC_EXT_UPDATE_ENABLE_BIT;
drivers/comedi/drivers/cb_pcidas64.c
3139
bits |= DAC_EXT_UPDATE_FALLING_BIT;
drivers/comedi/drivers/cb_pcidas64.c
3141
writew(bits, devpriv->main_iobase + DAC_CONTROL0_REG);
drivers/comedi/drivers/cb_pcidas64.c
3167
u16 bits;
drivers/comedi/drivers/cb_pcidas64.c
3176
bits = (first_channel & 0x7) | (last_channel & 0x7) << 3;
drivers/comedi/drivers/cb_pcidas64.c
3178
writew(bits, devpriv->main_iobase + DAC_SELECT_REG);
drivers/comedi/drivers/cb_pcidas64.c
3432
unsigned int bits;
drivers/comedi/drivers/cb_pcidas64.c
3434
bits = readb(dev->mmio + DI_REG);
drivers/comedi/drivers/cb_pcidas64.c
3435
bits &= 0xf;
drivers/comedi/drivers/cb_pcidas64.c
3436
data[1] = bits;
drivers/comedi/drivers/das1800.c
730
unsigned char bits;
drivers/comedi/drivers/das1800.c
732
bits = UQEN;
drivers/comedi/drivers/das1800.c
734
bits |= SD;
drivers/comedi/drivers/das1800.c
736
bits |= CMEN;
drivers/comedi/drivers/das1800.c
738
bits |= UB;
drivers/comedi/drivers/das1800.c
740
return bits;
drivers/comedi/drivers/dt3000.c
539
static void dt3k_dio_config(struct comedi_device *dev, int bits)
drivers/comedi/drivers/dt3000.c
544
writew(bits, dev->mmio + DPR_PARAMS(0));
drivers/comedi/drivers/dt9812.c
378
static int dt9812_digital_in(struct comedi_device *dev, u8 *bits)
drivers/comedi/drivers/dt9812.c
393
*bits = (value[0] & 0x7f) | ((value[1] & 0x08) << 4);
drivers/comedi/drivers/dt9812.c
400
static int dt9812_digital_out(struct comedi_device *dev, u8 bits)
drivers/comedi/drivers/dt9812.c
404
u8 value[1] = { bits };
drivers/comedi/drivers/dt9812.c
603
u8 bits = 0;
drivers/comedi/drivers/dt9812.c
606
ret = dt9812_digital_in(dev, &bits);
drivers/comedi/drivers/dt9812.c
610
data[1] = bits;
drivers/comedi/drivers/gsc_hpdi.c
281
u32 bits;
drivers/comedi/drivers/gsc_hpdi.c
303
bits = devpriv->dma_desc_phys_addr | PLX_DMADPR_DESCPCI |
drivers/comedi/drivers/gsc_hpdi.c
305
writel(bits, devpriv->plx9080_mmio + PLX_REG_DMADPR0);
drivers/comedi/drivers/gsc_hpdi.c
538
u32 bits;
drivers/comedi/drivers/gsc_hpdi.c
542
bits = PLX_BIGEND_DMA0 | PLX_BIGEND_DMA1;
drivers/comedi/drivers/gsc_hpdi.c
544
bits = 0;
drivers/comedi/drivers/gsc_hpdi.c
546
writel(bits, devpriv->plx9080_mmio + PLX_REG_BIGEND);
drivers/comedi/drivers/gsc_hpdi.c
554
bits = 0;
drivers/comedi/drivers/gsc_hpdi.c
556
bits |= PLX_DMAMODE_READYIEN;
drivers/comedi/drivers/gsc_hpdi.c
558
bits |= PLX_DMAMODE_CHAINEN;
drivers/comedi/drivers/gsc_hpdi.c
563
bits |= PLX_DMAMODE_DONEIEN;
drivers/comedi/drivers/gsc_hpdi.c
568
bits |= PLX_DMAMODE_LACONST;
drivers/comedi/drivers/gsc_hpdi.c
570
bits |= PLX_DMAMODE_INTRPCI;
drivers/comedi/drivers/gsc_hpdi.c
572
bits |= PLX_DMAMODE_DEMAND;
drivers/comedi/drivers/gsc_hpdi.c
574
bits |= PLX_DMAMODE_BURSTEN;
drivers/comedi/drivers/gsc_hpdi.c
575
bits |= PLX_DMAMODE_WIDTH_32;
drivers/comedi/drivers/gsc_hpdi.c
576
writel(bits, plx_iobase + PLX_REG_DMAMODE0);
drivers/comedi/drivers/jr3_pci.h
682
s32 bits; /* offset 0x00fd */
drivers/comedi/drivers/multiq3.c
75
static void multiq3_set_ctrl(struct comedi_device *dev, unsigned int bits)
drivers/comedi/drivers/multiq3.c
81
outw(MULTIQ3_CTRL_SH | MULTIQ3_CTRL_CLK | bits,
drivers/comedi/drivers/ni_65xx.c
428
unsigned int port_mask, port_data, bits;
drivers/comedi/drivers/ni_65xx.c
447
bits = readb(dev->mmio + NI_65XX_IO_DATA_REG(port));
drivers/comedi/drivers/ni_65xx.c
448
bits ^= s->io_bits; /* invert if necessary */
drivers/comedi/drivers/ni_65xx.c
449
bits &= ~port_mask;
drivers/comedi/drivers/ni_65xx.c
450
bits |= (port_data & port_mask);
drivers/comedi/drivers/ni_65xx.c
451
bits ^= s->io_bits; /* invert back */
drivers/comedi/drivers/ni_65xx.c
452
writeb(bits, dev->mmio + NI_65XX_IO_DATA_REG(port));
drivers/comedi/drivers/ni_65xx.c
456
bits = readb(dev->mmio + NI_65XX_IO_DATA_REG(port));
drivers/comedi/drivers/ni_65xx.c
457
bits ^= s->io_bits; /* invert if necessary */
drivers/comedi/drivers/ni_65xx.c
459
bits <<= bitshift;
drivers/comedi/drivers/ni_65xx.c
461
bits >>= -bitshift;
drivers/comedi/drivers/ni_65xx.c
463
read_bits |= bits;
drivers/comedi/drivers/ni_660x.c
271
unsigned int bits, unsigned int reg)
drivers/comedi/drivers/ni_660x.c
277
writew(bits, dev->mmio + addr);
drivers/comedi/drivers/ni_660x.c
279
writel(bits, dev->mmio + addr);
drivers/comedi/drivers/ni_660x.c
293
static void ni_660x_gpct_write(struct ni_gpct *counter, unsigned int bits,
drivers/comedi/drivers/ni_660x.c
298
ni_660x_write(dev, counter->chip_index, bits, reg);
drivers/comedi/drivers/ni_660x.c
406
unsigned int bits = 0;
drivers/comedi/drivers/ni_660x.c
415
bits = NI660X_CLK_CFG_COUNTER_SWAP;
drivers/comedi/drivers/ni_660x.c
417
ni_660x_write(dev, chip, bits, NI660X_CLK_CFG);
drivers/comedi/drivers/ni_660x.c
537
unsigned int bits = data[1] << shift;
drivers/comedi/drivers/ni_660x.c
547
s->state |= (bits & mask);
drivers/comedi/drivers/ni_660x.c
566
unsigned int bits;
drivers/comedi/drivers/ni_660x.c
587
bits = ni_660x_read(dev, idle_chip, NI660X_IO_CFG(chan));
drivers/comedi/drivers/ni_660x.c
588
bits &= ~NI660X_IO_CFG_OUT_SEL_MASK(chan);
drivers/comedi/drivers/ni_660x.c
589
bits |= NI660X_IO_CFG_OUT_SEL(chan, 0); /* high-z */
drivers/comedi/drivers/ni_660x.c
590
ni_660x_write(dev, idle_chip, bits, NI660X_IO_CFG(chan));
drivers/comedi/drivers/ni_660x.c
594
bits = ni_660x_read(dev, active_chip, NI660X_IO_CFG(chan));
drivers/comedi/drivers/ni_660x.c
595
bits &= ~NI660X_IO_CFG_OUT_SEL_MASK(chan);
drivers/comedi/drivers/ni_660x.c
596
bits |= NI660X_IO_CFG_OUT_SEL(chan, out_sel);
drivers/comedi/drivers/ni_660x.c
597
ni_660x_write(dev, active_chip, bits, NI660X_IO_CFG(chan));
drivers/comedi/drivers/ni_at_ao.c
240
unsigned int bits;
drivers/comedi/drivers/ni_at_ao.c
246
bits = (bit & bitstring) ? ATAO_CFG2_SDATA : 0;
drivers/comedi/drivers/ni_at_ao.c
248
outw(bits, dev->iobase + ATAO_CFG2_REG);
drivers/comedi/drivers/ni_at_ao.c
249
outw(bits | ATAO_CFG2_SCLK,
drivers/comedi/drivers/ni_mio_common.c
2924
unsigned int bits;
drivers/comedi/drivers/ni_mio_common.c
2928
bits =
drivers/comedi/drivers/ni_mio_common.c
2961
bits |= NISTC_AO_PERSONAL_NUM_DAC;
drivers/comedi/drivers/ni_mio_common.c
2963
ni_stc_writew(dev, bits, NISTC_AO_PERSONAL_REG);
drivers/comedi/drivers/ni_mio_common.c
3183
unsigned int bits = 0;
drivers/comedi/drivers/ni_mio_common.c
3190
bits = 0;
drivers/comedi/drivers/ni_mio_common.c
3194
bits |= 1 << chan;
drivers/comedi/drivers/ni_mio_common.c
3197
ni_ao_win_outw(dev, bits, NI611X_AO_TIMED_REG);
drivers/comedi/drivers/ni_mio_common.c
3204
bits = NISTC_AO_OUT_CTRL_CHANS(cmd->scan_end_arg - 1)
drivers/comedi/drivers/ni_mio_common.c
3209
bits = NISTC_AO_OUT_CTRL_UPDATE_SEL_HIGHZ;
drivers/comedi/drivers/ni_mio_common.c
3211
bits |= NISTC_AO_OUT_CTRL_CHANS(0);
drivers/comedi/drivers/ni_mio_common.c
3213
bits |= NISTC_AO_OUT_CTRL_CHANS(
drivers/comedi/drivers/ni_mio_common.c
3218
ni_stc_writew(dev, bits, NISTC_AO_OUT_CTRL_REG);
drivers/comedi/drivers/ni_mio_common.c
4025
static void ni_gpct_write_register(struct ni_gpct *counter, unsigned int bits,
drivers/comedi/drivers/ni_mio_common.c
4044
ni_writew(dev, bits, stc_register);
drivers/comedi/drivers/ni_mio_common.c
4052
ni_stc_writel(dev, bits, stc_register);
drivers/comedi/drivers/ni_mio_common.c
4059
bits);
drivers/comedi/drivers/ni_mio_common.c
4064
bits);
drivers/comedi/drivers/ni_mio_common.c
4067
ni_stc_writew(dev, bits, stc_register);
drivers/comedi/drivers/ni_mio_common.c
4380
unsigned int loadbit = 0, bits = 0, bit, bitstring = 0;
drivers/comedi/drivers/ni_mio_common.c
4394
bits = caldacs[type].packbits(addr, val, &bitstring);
drivers/comedi/drivers/ni_mio_common.c
4402
if (bits == 0)
drivers/comedi/drivers/ni_mio_common.c
4405
for (bit = 1 << (bits - 1); bit; bit >>= 1) {
drivers/comedi/drivers/ni_mio_common.c
4663
unsigned int bits;
drivers/comedi/drivers/ni_mio_common.c
4673
bits = ni_readl(dev, NI_M_PFI_FILTER_REG);
drivers/comedi/drivers/ni_mio_common.c
4674
bits &= ~NI_M_PFI_FILTER_SEL_MASK(chan);
drivers/comedi/drivers/ni_mio_common.c
4675
bits |= NI_M_PFI_FILTER_SEL(chan, filter);
drivers/comedi/drivers/ni_mio_common.c
4676
ni_writel(dev, bits, NI_M_PFI_FILTER_REG);
drivers/comedi/drivers/ni_mio_common.c
581
unsigned int bits;
drivers/comedi/drivers/ni_mio_common.c
594
bits = NI_STC_DMA_CHAN_SEL(mite_chan->channel);
drivers/comedi/drivers/ni_mio_common.c
596
NI_E_DMA_AI_SEL_MASK, NI_E_DMA_AI_SEL(bits));
drivers/comedi/drivers/ni_mio_common.c
607
unsigned int bits;
drivers/comedi/drivers/ni_mio_common.c
620
bits = NI_STC_DMA_CHAN_SEL(mite_chan->channel);
drivers/comedi/drivers/ni_mio_common.c
622
NI_E_DMA_AO_SEL_MASK, NI_E_DMA_AO_SEL(bits));
drivers/comedi/drivers/ni_mio_common.c
636
unsigned int bits;
drivers/comedi/drivers/ni_mio_common.c
650
bits = NI_STC_DMA_CHAN_SEL(mite_chan->channel);
drivers/comedi/drivers/ni_mio_common.c
653
NI_E_DMA_G0_G1_SEL(gpct_index, bits));
drivers/comedi/drivers/ni_mio_common.c
664
unsigned int bits;
drivers/comedi/drivers/ni_mio_common.c
683
bits = NI_STC_DMA_CHAN_SEL(mite_chan->channel);
drivers/comedi/drivers/ni_mio_common.c
686
NI_M_CDIO_DMA_SEL_CDO(bits));
drivers/comedi/drivers/ni_mio_common.c
878
unsigned int bits, unsigned int value)
drivers/comedi/drivers/ni_mio_common.c
883
bit_values = bits;
drivers/comedi/drivers/ni_mio_common.c
886
ni_set_bitfield(dev, reg, bits, bit_values);
drivers/comedi/drivers/ni_tio.c
1666
unsigned int bits = ni_tio_read(counter, NITIO_SHARED_STATUS_REG(cidx));
drivers/comedi/drivers/ni_tio.c
1668
return (bits & GI_NEXT_LOAD_SRC(cidx))
drivers/comedi/drivers/ni_tio.c
291
unsigned int bits = 0;
drivers/comedi/drivers/ni_tio.c
295
bits |= NI_GPCT_INVERT_CLOCK_SRC_BIT;
drivers/comedi/drivers/ni_tio.c
297
bits |= NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS;
drivers/comedi/drivers/ni_tio.c
299
bits |= NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS;
drivers/comedi/drivers/ni_tio.c
300
return bits;
drivers/comedi/drivers/ni_tio.c
447
unsigned int bits = 0;
drivers/comedi/drivers/ni_tio.c
493
bits = mask;
drivers/comedi/drivers/ni_tio.c
495
ni_tio_set_bits(counter, reg, mask, bits);
drivers/comedi/drivers/ni_tio.c
532
unsigned int bits = 0;
drivers/comedi/drivers/ni_tio.c
534
bits |= GI_CNT_MODE(mode >> NI_GPCT_COUNTING_MODE_SHIFT);
drivers/comedi/drivers/ni_tio.c
535
bits |= GI_INDEX_PHASE((mode >> NI_GPCT_INDEX_PHASE_BITSHIFT));
drivers/comedi/drivers/ni_tio.c
537
bits |= GI_INDEX_MODE;
drivers/comedi/drivers/ni_tio.c
540
GI_INDEX_MODE, bits);
drivers/comedi/drivers/ni_tio.c
566
unsigned int bits = 0;
drivers/comedi/drivers/ni_tio.c
595
bits |= GI_HW_ARM_ENA |
drivers/comedi/drivers/ni_tio.c
605
GI_HW_ARM_ENA | mask, bits);
drivers/comedi/drivers/ni_tio.c
615
static int ni_660x_clk_src(unsigned int clock_source, unsigned int *bits)
drivers/comedi/drivers/ni_tio.c
662
*bits = GI_SRC_SEL(ni_660x_clock);
drivers/comedi/drivers/ni_tio.c
666
static int ni_m_clk_src(unsigned int clock_source, unsigned int *bits)
drivers/comedi/drivers/ni_tio.c
719
*bits = GI_SRC_SEL(ni_m_series_clock);
drivers/comedi/drivers/ni_tio.c
758
unsigned int bits = 0;
drivers/comedi/drivers/ni_tio.c
763
ret = ni_660x_clk_src(clock_source, &bits);
drivers/comedi/drivers/ni_tio.c
768
ret = ni_m_clk_src(clock_source, &bits);
drivers/comedi/drivers/ni_tio.c
780
bits |= GI_SRC_POL_INVERT;
drivers/comedi/drivers/ni_tio.c
782
GI_SRC_SEL_MASK | GI_SRC_POL_INVERT, bits);
drivers/comedi/drivers/ni_tio.c
786
bits = 0;
drivers/comedi/drivers/ni_tio.c
791
bits |= GI_PRESCALE_X2(counter_dev->variant);
drivers/comedi/drivers/ni_tio.c
794
bits |= GI_PRESCALE_X8(counter_dev->variant);
drivers/comedi/drivers/ni_tio.c
801
GI_PRESCALE_X8(counter_dev->variant), bits);
drivers/comedi/drivers/ni_tiocmd.c
44
unsigned int bits;
drivers/comedi/drivers/ni_tiocmd.c
47
bits = 0;
drivers/comedi/drivers/ni_tiocmd.c
51
bits |= GI_READ_ACKS_IRQ;
drivers/comedi/drivers/ni_tiocmd.c
53
bits |= GI_WRITE_ACKS_IRQ;
drivers/comedi/drivers/ni_tiocmd.c
55
ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), mask, bits);
drivers/comedi/drivers/ni_tiocmd.c
63
bits = 0;
drivers/comedi/drivers/ni_tiocmd.c
66
bits |= GI_DMA_ENABLE | GI_DMA_INT_ENA;
drivers/comedi/drivers/ni_tiocmd.c
68
bits |= GI_DMA_WRITE;
drivers/comedi/drivers/ni_tiocmd.c
69
ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx), mask, bits);
drivers/comedi/drivers/pcmmio.c
385
unsigned int bits = 0;
drivers/comedi/drivers/pcmmio.c
398
bits |= (1 << chan);
drivers/comedi/drivers/pcmmio.c
402
bits &= ((1 << s->n_chan) - 1);
drivers/comedi/drivers/pcmmio.c
403
devpriv->enabled_mask = bits;
drivers/comedi/drivers/pcmmio.c
407
pcmmio_dio_write(dev, bits, PCMMIO_PAGE_ENAB, 0);
drivers/comedi/drivers/pcmuio.c
381
unsigned int bits = 0;
drivers/comedi/drivers/pcmuio.c
394
bits |= (1 << chan);
drivers/comedi/drivers/pcmuio.c
398
bits &= ((1 << s->n_chan) - 1);
drivers/comedi/drivers/pcmuio.c
399
chip->enabled_mask = bits;
drivers/comedi/drivers/pcmuio.c
403
pcmuio_write(dev, bits, asic, PCMUIO_PAGE_ENAB, 0);
drivers/comedi/kcomedilib/kcomedilib_main.c
276
unsigned int mask, unsigned int *bits,
drivers/comedi/kcomedilib/kcomedilib_main.c
297
data[1] = *bits;
drivers/comedi/kcomedilib/kcomedilib_main.c
315
*bits = data[1] >> shift;
drivers/cpufreq/longhaul.c
141
bcr2.bits.ESOFTBF = 1;
drivers/cpufreq/longhaul.c
142
bcr2.bits.CLOCKMUL = mults_index & 0xff;
drivers/cpufreq/longhaul.c
155
bcr2.bits.ESOFTBF = 0;
drivers/cpufreq/longhaul.c
170
longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
drivers/cpufreq/longhaul.c
172
longhaul.bits.RevisionKey = 0;
drivers/cpufreq/longhaul.c
173
longhaul.bits.SoftBusRatio = mults_index & 0xf;
drivers/cpufreq/longhaul.c
174
longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4;
drivers/cpufreq/longhaul.c
177
longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f;
drivers/cpufreq/longhaul.c
182
longhaul.bits.EnableSoftVID = 1;
drivers/cpufreq/longhaul.c
196
longhaul.bits.EnableSoftVID = 0;
drivers/cpufreq/longhaul.c
201
longhaul.bits.EnableSoftBusRatio = 1;
drivers/cpufreq/longhaul.c
214
longhaul.bits.EnableSoftBusRatio = 0;
drivers/cpufreq/longhaul.c
219
longhaul.bits.EnableSoftVID = 1;
drivers/cpufreq/longhaul.c
233
longhaul.bits.EnableSoftVID = 0;
drivers/cpufreq/longhaul.c
537
if (!(longhaul.bits.RevisionID & 1)) {
drivers/cpufreq/longhaul.c
542
if (!longhaul.bits.VRMRev) {
drivers/cpufreq/longhaul.c
554
minvid = vrm_mV_table[longhaul.bits.MinimumVID];
drivers/cpufreq/longhaul.c
555
maxvid = vrm_mV_table[longhaul.bits.MaximumVID];
drivers/cpufreq/longhaul.c
578
j = longhaul.bits.MinMHzBR;
drivers/cpufreq/longhaul.c
579
if (longhaul.bits.MinMHzBR4)
drivers/cpufreq/longhaul.c
584
switch (longhaul.bits.MinMHzFSB) {
drivers/cpufreq/longhaul.h
16
} bits;
drivers/cpufreq/longhaul.h
45
} bits;
drivers/cpufreq/powernow-k7.c
224
if (fidvidctl.bits.FID != fid) {
drivers/cpufreq/powernow-k7.c
225
fidvidctl.bits.SGTC = latency;
drivers/cpufreq/powernow-k7.c
226
fidvidctl.bits.FID = fid;
drivers/cpufreq/powernow-k7.c
227
fidvidctl.bits.VIDC = 0;
drivers/cpufreq/powernow-k7.c
228
fidvidctl.bits.FIDC = 1;
drivers/cpufreq/powernow-k7.c
239
if (fidvidctl.bits.VID != vid) {
drivers/cpufreq/powernow-k7.c
240
fidvidctl.bits.SGTC = latency;
drivers/cpufreq/powernow-k7.c
241
fidvidctl.bits.VID = vid;
drivers/cpufreq/powernow-k7.c
242
fidvidctl.bits.FIDC = 0;
drivers/cpufreq/powernow-k7.c
243
fidvidctl.bits.VIDC = 1;
drivers/cpufreq/powernow-k7.c
265
cfid = fidvidstatus.bits.CFID;
drivers/cpufreq/powernow-k7.c
365
pc.bits.sgtc);
drivers/cpufreq/powernow-k7.c
367
vid = pc.bits.vid;
drivers/cpufreq/powernow-k7.c
368
fid = pc.bits.fid;
drivers/cpufreq/powernow-k7.c
405
if (latency < pc.bits.sgtc)
drivers/cpufreq/powernow-k7.c
406
latency = pc.bits.sgtc;
drivers/cpufreq/powernow-k7.c
562
cfid = fidvidstatus.bits.CFID;
drivers/cpufreq/powernow-k7.c
606
fsb = (10 * cpu_khz) / fid_codes[fidvidstatus.bits.CFID];
drivers/cpufreq/powernow-k7.c
617
result = powernow_decode_bios(fidvidstatus.bits.MFID,
drivers/cpufreq/powernow-k7.c
618
fidvidstatus.bits.SVID);
drivers/cpufreq/powernow-k7.c
65
} bits;
drivers/cpufreq/powernow-k7.h
21
} bits;
drivers/cpufreq/powernow-k7.h
39
} bits;
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
446
__be64 *bits = (__be64 *)&bf[j];
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
447
*bits = cpu_to_be64(op->byte_count << 3);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
450
__le64 *bits = (__le64 *)&bf[j];
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
451
*bits = cpu_to_le64(op->byte_count << 3);
drivers/crypto/aspeed/aspeed-hace-hash.c
121
__be64 bits[2];
drivers/crypto/aspeed/aspeed-hace-hash.c
129
bits[0] = cpu_to_be64(rctx->digcnt[0] << 3);
drivers/crypto/aspeed/aspeed-hace-hash.c
135
bits[1] = cpu_to_be64(rctx->digcnt[0] << 3);
drivers/crypto/aspeed/aspeed-hace-hash.c
136
bits[0] = cpu_to_be64(rctx->digcnt[1] << 3 |
drivers/crypto/aspeed/aspeed-hace-hash.c
145
memcpy(buf + padlen, bits, bitslen);
drivers/crypto/atmel-sha.c
363
__be64 bits[2];
drivers/crypto/atmel-sha.c
377
bits[1] = cpu_to_be64(size[0] << 3);
drivers/crypto/atmel-sha.c
378
bits[0] = cpu_to_be64(size[1] << 3 | size[0] >> 61);
drivers/crypto/atmel-sha.c
387
memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 16);
drivers/crypto/atmel-sha.c
397
memcpy(ctx->buffer + ctx->bufcnt + padlen, &bits[1], 8);
drivers/crypto/axis/artpec6_crypto.c
1001
__be64 bits = __cpu_to_be64(bitcount);
drivers/crypto/axis/artpec6_crypto.c
1028
memcpy(dst + 1 + pad_bytes + 8, &bits, 8);
drivers/crypto/axis/artpec6_crypto.c
1030
memcpy(dst + 1 + pad_bytes, &bits, 8);
drivers/crypto/gemini/sl3516-ce-core.c
138
rdd->frame_ctrl.bits.buffer_size = rctx->t_dst[i].len;
drivers/crypto/gemini/sl3516-ce-core.c
139
rdd->frame_ctrl.bits.own = CE_DMA;
drivers/crypto/gemini/sl3516-ce-core.c
141
rdd->next_desc.bits.eofie = 1;
drivers/crypto/gemini/sl3516-ce-core.c
151
dd->frame_ctrl.bits.buffer_size = rctx->pctrllen;
drivers/crypto/gemini/sl3516-ce-core.c
154
dd->next_desc.bits.eofie = 0;
drivers/crypto/gemini/sl3516-ce-core.c
155
dd->next_desc.bits.dec = 0;
drivers/crypto/gemini/sl3516-ce-core.c
156
dd->next_desc.bits.sof_eof = DESC_FIRST | DESC_LAST;
drivers/crypto/gemini/sl3516-ce-core.c
157
dd->frame_ctrl.bits.own = CE_DMA;
drivers/crypto/gemini/sl3516-ce-core.c
162
dd->frame_ctrl.bits.buffer_size = rctx->t_src[i].len;
drivers/crypto/gemini/sl3516-ce-core.c
165
dd->next_desc.bits.eofie = 0;
drivers/crypto/gemini/sl3516-ce-core.c
166
dd->next_desc.bits.dec = 0;
drivers/crypto/gemini/sl3516-ce-core.c
167
dd->next_desc.bits.sof_eof = DESC_FIRST | DESC_LAST;
drivers/crypto/gemini/sl3516-ce-core.c
168
dd->frame_ctrl.bits.own = CE_DMA;
drivers/crypto/gemini/sl3516-ce-core.c
43
ce->tx[i].frame_ctrl.bits.own = CE_CPU;
drivers/crypto/gemini/sl3516-ce-core.c
49
ce->rx[i].frame_ctrl.bits.own = CE_CPU;
drivers/crypto/gemini/sl3516-ce.h
119
} bits;
drivers/crypto/gemini/sl3516-ce.h
153
} bits;
drivers/crypto/hisilicon/hpre/hpre_crypto.c
731
unsigned int bits = len << HPRE_BITS_2_BYTES_SHIFT;
drivers/crypto/hisilicon/hpre/hpre_crypto.c
738
switch (bits) {
drivers/crypto/hisilicon/sec2/sec_crypto.c
1632
static void ctr_iv_inc(__u8 *counter, __u8 bits, __u32 nums)
drivers/crypto/hisilicon/sec2/sec_crypto.c
1635
--bits;
drivers/crypto/hisilicon/sec2/sec_crypto.c
1636
nums += counter[bits];
drivers/crypto/hisilicon/sec2/sec_crypto.c
1637
counter[bits] = nums & BITS_MASK;
drivers/crypto/hisilicon/sec2/sec_crypto.c
1639
} while (bits && nums);
drivers/crypto/marvell/cesa/hash.c
149
__le64 bits = cpu_to_le64(creq->len << 3);
drivers/crypto/marvell/cesa/hash.c
151
memcpy(buf + padlen, &bits, sizeof(bits));
drivers/crypto/marvell/cesa/hash.c
153
__be64 bits = cpu_to_be64(creq->len << 3);
drivers/crypto/marvell/cesa/hash.c
155
memcpy(buf + padlen, &bits, sizeof(bits));
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
1089
bitmap_zero(tmp_bmap.bits, eng_grp->g->engs_num);
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
1092
bitmap_set(tmp_bmap.bits, j, 1);
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
1102
bitmap_copy(engs->bmap, tmp_bmap.bits, eng_grp->g->engs_num);
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
1120
bitmap_copy(tmp_bmap.bits, mirrored_engs->bmap,
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
1125
bitmap_clear(tmp_bmap.bits, bit, -engs->count);
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
1127
bitmap_or(engs->bmap, engs->bmap, tmp_bmap.bits,
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
198
for_each_set_bit(i, bmap.bits, bmap.size)
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
220
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
236
for_each_set_bit(i, bmap.bits, bmap.size)
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
245
for_each_set_bit(i, bmap.bits, bmap.size)
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
267
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
277
for_each_set_bit(i, bmap.bits, bmap.size)
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
583
bitmap_to_arr32(mask, bmap.bits, bmap.size);
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
74
bitmap_or(bmap.bits, bmap.bits,
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.h
57
unsigned long bits[OTX_CPT_ENGS_BITMASK_LEN];
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
231
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
257
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
273
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
317
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
337
for_each_set_bit(i, bmap.bits, bmap.size) {
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
47
bitmap_or(bmap.bits, bmap.bits,
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
890
bitmap_zero(tmp_bmap.bits, eng_grp->g->engs_num);
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
893
bitmap_set(tmp_bmap.bits, j, 1);
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
903
bitmap_copy(engs->bmap, tmp_bmap.bits, eng_grp->g->engs_num);
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
921
bitmap_copy(tmp_bmap.bits, mirrored_engs->bmap,
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
926
bitmap_clear(tmp_bmap.bits, bit, -engs->count);
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
928
bitmap_or(engs->bmap, engs->bmap, tmp_bmap.bits,
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h
51
unsigned long bits[OTX2_CPT_ENGS_BITMASK_LEN];
drivers/crypto/tegra/tegra-se-aes.c
100
counter[bits] = nums & 0xff;
drivers/crypto/tegra/tegra-se-aes.c
102
} while (bits && nums);
drivers/crypto/tegra/tegra-se-aes.c
95
static void ctr_iv_inc(__u8 *counter, __u8 bits, __u32 nums)
drivers/crypto/tegra/tegra-se-aes.c
98
--bits;
drivers/crypto/tegra/tegra-se-aes.c
99
nums += counter[bits];
drivers/dma/dmaengine.c
269
bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
drivers/dma/dmaengine.c
275
clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
drivers/dma/dmaengine.c
276
clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
drivers/dma/dmaengine.c
277
clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
drivers/dma/dmaengine.c
399
bitmap_and(has.bits, want->bits, device->cap_mask.bits,
drivers/dma/dmaengine.c
401
return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
drivers/dma/dmaengine.c
583
if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
drivers/dma/dmaengine.c
584
test_bit(DMA_CYCLIC, device->cap_mask.bits)))
drivers/dma/idxd/cdev.c
337
status.bits = ioread64(idxd->reg_base + IDXD_EVLSTATUS_OFFSET);
drivers/dma/idxd/debugfs.c
71
evl_status.bits = ioread64(idxd->reg_base + IDXD_EVLSTATUS_OFFSET);
drivers/dma/idxd/device.c
1009
iowrite32(wq->wqcfg->bits[i], idxd->reg_base + wq_offset);
drivers/dma/idxd/device.c
1181
dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n", wq->id, i, wqcfg_offset, wq->wqcfg->bits[i]);
drivers/dma/idxd/device.c
1242
group->grpcfg.flags.bits = ioread64(idxd->reg_base + grpcfg_offset);
drivers/dma/idxd/device.c
1244
group->id, grpcfg_offset, group->grpcfg.flags.bits);
drivers/dma/idxd/device.c
1252
reg.bits = ioread32(idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/device.c
1316
mperm.bits = 0;
drivers/dma/idxd/device.c
1319
iowrite32(mperm.bits, idxd->reg_base + idxd->msix_perm_offset + ie->id * 8);
drivers/dma/idxd/device.c
26
genctrl.bits = ioread32(idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
29
iowrite32(genctrl.bits, idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
328
wqcfg.bits[WQCFG_PASID_IDX] = ioread32(idxd->reg_base + offset);
drivers/dma/idxd/device.c
331
wq->wqcfg->bits[WQCFG_PASID_IDX] = wqcfg.bits[WQCFG_PASID_IDX];
drivers/dma/idxd/device.c
332
iowrite32(wqcfg.bits[WQCFG_PASID_IDX], idxd->reg_base + offset);
drivers/dma/idxd/device.c
36
genctrl.bits = ioread32(idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
366
wqcfg.bits[WQCFG_PASID_IDX] = ioread32(idxd->reg_base + offset);
drivers/dma/idxd/device.c
369
iowrite32(wqcfg.bits[WQCFG_PASID_IDX], idxd->reg_base + offset);
drivers/dma/idxd/device.c
39
iowrite32(genctrl.bits, idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
451
gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
drivers/dma/idxd/device.c
462
gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
drivers/dma/idxd/device.c
486
iowrite32(cmd.bits, idxd->reg_base + IDXD_CMD_OFFSET);
drivers/dma/idxd/device.c
526
iowrite32(cmd.bits, idxd->reg_base + IDXD_CMD_OFFSET);
drivers/dma/idxd/device.c
666
iowrite32(cmd.bits, idxd->reg_base + IDXD_CMD_OFFSET);
drivers/dma/idxd/device.c
801
evlcfg.bits[0] = dma_addr & GENMASK(63, 12);
drivers/dma/idxd/device.c
804
iowrite64(evlcfg.bits[0], idxd->reg_base + IDXD_EVLCFG_OFFSET);
drivers/dma/idxd/device.c
805
iowrite64(evlcfg.bits[1], idxd->reg_base + IDXD_EVLCFG_OFFSET + 8);
drivers/dma/idxd/device.c
807
genctrl.bits = ioread32(idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
809
iowrite32(genctrl.bits, idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
811
gencfg.bits = ioread32(idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/device.c
813
iowrite32(gencfg.bits, idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/device.c
839
iowrite32(gencfg.bits, idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/device.c
841
genctrl.bits = ioread32(idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
843
iowrite32(genctrl.bits, idxd->reg_base + IDXD_GENCTRL_OFFSET);
drivers/dma/idxd/device.c
885
iowrite64(group->grpcfg.flags.bits, idxd->reg_base + grpcfg_offset);
drivers/dma/idxd/device.c
900
reg.bits = ioread32(idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/device.c
902
iowrite32(reg.bits, idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/device.c
942
wq->wqcfg->bits[i] |= ioread32(idxd->reg_base + wq_offset);
drivers/dma/idxd/dma.c
234
if (idxd->hw.opcap.bits[0] & IDXD_OPCAP_MEMMOVE) {
drivers/dma/idxd/idxd.h
527
reg.bits = ioread32(idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/idxd.h
529
iowrite32(reg.bits, idxd->reg_base + IDXD_GENCFG_OFFSET);
drivers/dma/idxd/init.c
504
offsets.bits[0] = ioread64(idxd->reg_base + IDXD_TABLE_OFFSET);
drivers/dma/idxd/init.c
505
offsets.bits[1] = ioread64(idxd->reg_base + IDXD_TABLE_OFFSET + sizeof(u64));
drivers/dma/idxd/init.c
535
idxd->hw.gen_cap.bits = ioread64(idxd->reg_base + IDXD_GENCAP_OFFSET);
drivers/dma/idxd/init.c
536
dev_dbg(dev, "gen_cap: %#llx\n", idxd->hw.gen_cap.bits);
drivers/dma/idxd/init.c
555
idxd->hw.group_cap.bits =
drivers/dma/idxd/init.c
557
dev_dbg(dev, "group_cap: %#llx\n", idxd->hw.group_cap.bits);
drivers/dma/idxd/init.c
565
idxd->hw.engine_cap.bits =
drivers/dma/idxd/init.c
567
dev_dbg(dev, "engine_cap: %#llx\n", idxd->hw.engine_cap.bits);
drivers/dma/idxd/init.c
572
idxd->hw.wq_cap.bits = ioread64(idxd->reg_base + IDXD_WQCAP_OFFSET);
drivers/dma/idxd/init.c
573
dev_dbg(dev, "wq_cap: %#llx\n", idxd->hw.wq_cap.bits);
drivers/dma/idxd/init.c
583
idxd->hw.opcap.bits[i] = ioread64(idxd->reg_base +
drivers/dma/idxd/init.c
585
dev_dbg(dev, "opcap[%d]: %#llx\n", i, idxd->hw.opcap.bits[i]);
drivers/dma/idxd/init.c
587
multi_u64_to_bmap(idxd->opcap_bmap, &idxd->hw.opcap.bits[0], 4);
drivers/dma/idxd/init.c
590
idxd->hw.dsacap0.bits = ioread64(idxd->reg_base + IDXD_DSACAP0_OFFSET);
drivers/dma/idxd/init.c
591
idxd->hw.dsacap1.bits = ioread64(idxd->reg_base + IDXD_DSACAP1_OFFSET);
drivers/dma/idxd/init.c
592
idxd->hw.dsacap2.bits = ioread64(idxd->reg_base + IDXD_DSACAP2_OFFSET);
drivers/dma/idxd/init.c
601
idxd->hw.iaa_cap.bits = ioread64(idxd->reg_base + IDXD_IAACAP_OFFSET);
drivers/dma/idxd/irq.c
363
evl_status.bits = 0;
drivers/dma/idxd/irq.c
370
evl_status.bits = ioread64(idxd->reg_base + IDXD_EVLSTATUS_OFFSET);
drivers/dma/idxd/irq.c
415
gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
drivers/dma/idxd/irq.c
475
idxd->sw_err.bits[i] = ioread64(idxd->reg_base +
drivers/dma/idxd/irq.c
478
iowrite64(idxd->sw_err.bits[0] & IDXD_SWERR_ACK,
drivers/dma/idxd/irq.c
503
i, idxd->sw_err.bits[i]);
drivers/dma/idxd/perfmon.c
508
perfcap.bits = ioread64(PERFCAP_REG(idxd));
drivers/dma/idxd/registers.h
102
u64 bits[4];
drivers/dma/idxd/registers.h
119
u64 bits[2];
drivers/dma/idxd/registers.h
133
u32 bits;
drivers/dma/idxd/registers.h
144
u32 bits;
drivers/dma/idxd/registers.h
154
u32 bits;
drivers/dma/idxd/registers.h
188
u32 bits;
drivers/dma/idxd/registers.h
218
u32 bits;
drivers/dma/idxd/registers.h
289
u64 bits[4];
drivers/dma/idxd/registers.h
308
u64 bits;
drivers/dma/idxd/registers.h
325
u64 bits[2];
drivers/dma/idxd/registers.h
339
u32 bits;
drivers/dma/idxd/registers.h
357
u64 bits;
drivers/dma/idxd/registers.h
416
u32 bits[16];
drivers/dma/idxd/registers.h
480
u64 bits;
drivers/dma/idxd/registers.h
489
u64 bits;
drivers/dma/idxd/registers.h
50
u64 bits;
drivers/dma/idxd/registers.h
586
u64 bits;
drivers/dma/idxd/registers.h
591
u64 bits;
drivers/dma/idxd/registers.h
605
u64 bits;
drivers/dma/idxd/registers.h
610
u64 bits;
drivers/dma/idxd/registers.h
70
u64 bits;
drivers/dma/idxd/registers.h
84
u64 bits;
drivers/dma/idxd/registers.h
93
u64 bits;
drivers/dma/idxd/sysfs.c
1492
return sysfs_emit(buf, "%#llx\n", idxd->hw.gen_cap.bits);
drivers/dma/idxd/sysfs.c
1558
multi_u64_to_bmap(swerr_bmap, &idxd->sw_err.bits[0], 4);
drivers/dma/idxd/sysfs.c
1671
return sysfs_emit(buf, "%#llx\n", idxd->hw.iaa_cap.bits);
drivers/dma/idxd/sysfs.c
1722
(u64)idxd->hw.dsacap2.bits,
drivers/dma/idxd/sysfs.c
1723
(u64)idxd->hw.dsacap1.bits,
drivers/dma/idxd/sysfs.c
1724
(u64)idxd->hw.dsacap0.bits);
drivers/dma/mxs-dma.c
508
ccw->bits |= CCW_CHAIN;
drivers/dma/mxs-dma.c
509
ccw->bits &= ~CCW_IRQ;
drivers/dma/mxs-dma.c
510
ccw->bits &= ~CCW_DEC_SEM;
drivers/dma/mxs-dma.c
522
ccw->bits = 0;
drivers/dma/mxs-dma.c
523
ccw->bits |= CCW_IRQ;
drivers/dma/mxs-dma.c
524
ccw->bits |= CCW_DEC_SEM;
drivers/dma/mxs-dma.c
526
ccw->bits |= CCW_WAIT4END;
drivers/dma/mxs-dma.c
527
ccw->bits |= CCW_HALT_ON_TERM;
drivers/dma/mxs-dma.c
528
ccw->bits |= CCW_TERM_FLUSH;
drivers/dma/mxs-dma.c
529
ccw->bits |= BF_CCW(sg_len, PIO_NUM);
drivers/dma/mxs-dma.c
530
ccw->bits |= BF_CCW(MXS_DMA_CMD_NO_XFER, COMMAND);
drivers/dma/mxs-dma.c
532
ccw->bits |= CCW_WAIT4RDY;
drivers/dma/mxs-dma.c
547
ccw->bits = 0;
drivers/dma/mxs-dma.c
548
ccw->bits |= CCW_CHAIN;
drivers/dma/mxs-dma.c
549
ccw->bits |= CCW_HALT_ON_TERM;
drivers/dma/mxs-dma.c
550
ccw->bits |= CCW_TERM_FLUSH;
drivers/dma/mxs-dma.c
551
ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ?
drivers/dma/mxs-dma.c
556
ccw->bits &= ~CCW_CHAIN;
drivers/dma/mxs-dma.c
557
ccw->bits |= CCW_IRQ;
drivers/dma/mxs-dma.c
558
ccw->bits |= CCW_DEC_SEM;
drivers/dma/mxs-dma.c
560
ccw->bits |= CCW_WAIT4END;
drivers/dma/mxs-dma.c
615
ccw->bits = 0;
drivers/dma/mxs-dma.c
616
ccw->bits |= CCW_CHAIN;
drivers/dma/mxs-dma.c
617
ccw->bits |= CCW_IRQ;
drivers/dma/mxs-dma.c
618
ccw->bits |= CCW_HALT_ON_TERM;
drivers/dma/mxs-dma.c
619
ccw->bits |= CCW_TERM_FLUSH;
drivers/dma/mxs-dma.c
620
ccw->bits |= CCW_DEC_SEM;
drivers/dma/mxs-dma.c
621
ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ?
drivers/dma/mxs-dma.c
97
u16 bits;
drivers/dma/sh/rz-dmac.c
189
#define CHCFG_SEL(bits) ((bits) & 0x07)
drivers/edac/altera_edac.c
1838
unsigned long bits;
drivers/edac/altera_edac.c
1848
bits = irq_status;
drivers/edac/altera_edac.c
1849
for_each_set_bit(bit, &bits, 32)
drivers/edac/amd64_edac.c
312
u32 intlv_en, bits;
drivers/edac/amd64_edac.c
342
bits = (((u32) sys_addr) >> 12) & intlv_en;
drivers/edac/amd64_edac.c
345
if ((dram_intlv_sel(pvt, node_id) & intlv_en) == bits)
drivers/edac/pnd2_edac.c
754
u16 bits[PMI_ADDRESS_WIDTH];
drivers/edac/pnd2_edac.c
759
.bits = {
drivers/edac/pnd2_edac.c
769
.bits = {
drivers/edac/pnd2_edac.c
779
.bits = {
drivers/edac/pnd2_edac.c
789
.bits = {
drivers/edac/pnd2_edac.c
799
.bits = {
drivers/edac/pnd2_edac.c
809
.bits = {
drivers/edac/pnd2_edac.c
819
.bits = {
drivers/edac/pnd2_edac.c
829
.bits = {
drivers/edac/pnd2_edac.c
839
.bits = {
drivers/edac/pnd2_edac.c
849
.bits = {
drivers/edac/pnd2_edac.c
859
.bits = {
drivers/edac/pnd2_edac.c
869
.bits = {
drivers/edac/pnd2_edac.c
922
type = d->bits[i + skiprs] & ~0xf;
drivers/edac/pnd2_edac.c
923
idx = d->bits[i + skiprs] & 0xf;
drivers/edac/pnd2_edac.c
931
type = d->bits[i + skiprs] & ~0xf;
drivers/edac/pnd2_edac.c
932
idx = d->bits[i + skiprs] & 0xf;
drivers/edac/sb_edac.c
1950
static int sb_bits(u64 addr, int nbits, u8 *bits)
drivers/edac/sb_edac.c
1955
res |= ((addr >> bits[i]) & 1) << i;
drivers/edac/sb_edac.c
2133
int bits, a7mode = A7MODE(dram_rule);
drivers/edac/sb_edac.c
2137
bits = GET_BITFIELD(addr, 7, 8) << 1;
drivers/edac/sb_edac.c
2138
bits |= GET_BITFIELD(addr, 9, 9);
drivers/edac/sb_edac.c
2140
bits = GET_BITFIELD(addr, 6, 8);
drivers/edac/sb_edac.c
2145
idx ^= bits;
drivers/edac/sb_edac.c
2147
idx = bits;
drivers/edac/skx_base.c
535
static int skx_bits(u64 addr, int nbits, u8 *bits)
drivers/edac/skx_base.c
540
res |= ((addr >> bits[i]) & 1) << i;
drivers/edac/ti_edac.c
134
int bits;
drivers/edac/ti_edac.c
143
bits = ((val & SDRAM_PAGESIZE_MASK) >> SDRAM_PAGESIZE_SHIFT) + 8;
drivers/edac/ti_edac.c
144
bits += ((val & SDRAM_ROWSIZE_MASK) >> SDRAM_ROWSIZE_SHIFT) + 9;
drivers/edac/ti_edac.c
145
bits += (val & SDRAM_IBANK_MASK) >> SDRAM_IBANK_SHIFT;
drivers/edac/ti_edac.c
148
bits++;
drivers/edac/ti_edac.c
151
bits += 2;
drivers/edac/ti_edac.c
155
bits = 16;
drivers/edac/ti_edac.c
156
bits += ((val & SDRAM_K2_PAGESIZE_MASK) >>
drivers/edac/ti_edac.c
158
bits += (val & SDRAM_K2_IBANK_MASK) >> SDRAM_K2_IBANK_SHIFT;
drivers/edac/ti_edac.c
159
bits += (val & SDRAM_K2_EBANK_MASK) >> SDRAM_K2_EBANK_SHIFT;
drivers/edac/ti_edac.c
165
bits += 3;
drivers/edac/ti_edac.c
169
bits += 2;
drivers/edac/ti_edac.c
173
bits++;
drivers/edac/ti_edac.c
179
memsize = 1 << bits;
drivers/extcon/extcon-axp288.c
134
unsigned long bits;
drivers/extcon/extcon-axp288.c
143
bits = val & GENMASK(ARRAY_SIZE(axp288_pwr_up_down_info) - 1, 0);
drivers/extcon/extcon-axp288.c
144
for_each_set_bit(i, &bits, ARRAY_SIZE(axp288_pwr_up_down_info))
drivers/extcon/extcon-axp288.c
146
clear_mask = bits;
drivers/firmware/efi/cper-x86.c
13
#define VALID_PROC_ERR_INFO_NUM(bits) (((bits) & GENMASK_ULL(7, 2)) >> 2)
drivers/firmware/efi/cper-x86.c
14
#define VALID_PROC_CXT_INFO_NUM(bits) (((bits) & GENMASK_ULL(13, 8)) >> 8)
drivers/firmware/efi/cper.c
139
int cper_bits_to_str(char *buf, int buf_size, unsigned long bits,
drivers/firmware/efi/cper.c
148
for_each_set_bit(i, &bits, strs_size) {
drivers/firmware/efi/cper.c
149
if (!(bits & BIT_ULL(i)))
drivers/firmware/efi/cper.c
84
void cper_print_bits(const char *pfx, unsigned int bits,
drivers/firmware/efi/cper.c
92
if (!(bits & (1U << i)))
drivers/firmware/efi/efi.c
1196
get_random_bytes(seed->bits, seed->size);
drivers/firmware/efi/efi.c
760
add_bootloader_randomness(seed->bits, size);
drivers/firmware/efi/efi.c
761
memzero_explicit(seed->bits, size);
drivers/firmware/efi/libstub/random.c
106
struct_size(seed, bits, seed_size),
drivers/firmware/efi/libstub/random.c
115
EFI_RANDOM_SEED_SIZE, seed->bits);
drivers/firmware/efi/libstub/random.c
123
EFI_RANDOM_SEED_SIZE, seed->bits);
drivers/firmware/efi/libstub/random.c
131
&nv_seed_size, seed->bits + offset);
drivers/firmware/efi/libstub/random.c
148
memzero_explicit(seed->bits + offset, nv_seed_size);
drivers/firmware/efi/libstub/random.c
155
memcpy(seed->bits + offset, prev_seed->bits, prev_seed_size);
drivers/firmware/efi/libstub/random.c
166
memzero_explicit(prev_seed->bits, prev_seed_size);
drivers/firmware/efi/libstub/random.c
172
memzero_explicit(seed, struct_size(seed, bits, seed_size));
drivers/firmware/google/gsmi.c
711
static u64 __init local_hash_64(u64 val, unsigned bits)
drivers/firmware/google/gsmi.c
731
return hash >> (64 - bits);
drivers/fpga/socfpga.c
163
u32 offset, u32 bits)
drivers/fpga/socfpga.c
168
val |= bits;
drivers/fpga/socfpga.c
173
u32 offset, u32 bits)
drivers/fpga/socfpga.c
178
val &= ~bits;
drivers/fsi/fsi-master-ast-cf.c
124
uint8_t bits;
drivers/fsi/fsi-master-ast-cf.c
130
static void msg_push_bits(struct fsi_msg *msg, uint64_t data, int bits)
drivers/fsi/fsi-master-ast-cf.c
132
msg->msg <<= bits;
drivers/fsi/fsi-master-ast-cf.c
133
msg->msg |= data & ((1ull << bits) - 1);
drivers/fsi/fsi-master-ast-cf.c
134
msg->bits += bits;
drivers/fsi/fsi-master-ast-cf.c
142
top = msg->bits & 0x3;
drivers/fsi/fsi-master-ast-cf.c
145
crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
drivers/fsi/fsi-master-ast-cf.c
148
crc = crc4(crc, msg->msg, msg->bits - top);
drivers/fsi/fsi-master-ast-cf.c
156
cmd->msg <<= (64 - cmd->bits);
drivers/fsi/fsi-master-ast-cf.c
218
cmd->bits = 0;
drivers/fsi/fsi-master-ast-cf.c
276
cmd->bits = 0;
drivers/fsi/fsi-master-ast-cf.c
287
cmd->bits = 0;
drivers/fsi/fsi-master-ast-cf.c
298
cmd->bits = 0;
drivers/fsi/fsi-master-ast-cf.c
370
op |= cmd->bits << CMD_REG_CLEN_SHIFT;
drivers/fsi/fsi-master-gpio.c
124
msg->bits += num_bits;
drivers/fsi/fsi-master-gpio.c
134
uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
drivers/fsi/fsi-master-gpio.c
138
trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
drivers/fsi/fsi-master-gpio.c
140
if (!cmd->bits) {
drivers/fsi/fsi-master-gpio.c
151
for (bit = 0; bit < cmd->bits; bit++) {
drivers/fsi/fsi-master-gpio.c
152
next_bit = (msg & sda_mask) >> (cmd->bits - 1);
drivers/fsi/fsi-master-gpio.c
162
static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
drivers/fsi/fsi-master-gpio.c
164
msg->msg <<= bits;
drivers/fsi/fsi-master-gpio.c
165
msg->msg |= data & ((1ull << bits) - 1);
drivers/fsi/fsi-master-gpio.c
166
msg->bits += bits;
drivers/fsi/fsi-master-gpio.c
174
top = msg->bits & 0x3;
drivers/fsi/fsi-master-gpio.c
177
crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
drivers/fsi/fsi-master-gpio.c
180
crc = crc4(crc, msg->msg, msg->bits - top);
drivers/fsi/fsi-master-gpio.c
243
cmd->bits = 0;
drivers/fsi/fsi-master-gpio.c
300
cmd->bits = 0;
drivers/fsi/fsi-master-gpio.c
310
cmd->bits = 0;
drivers/fsi/fsi-master-gpio.c
320
cmd->bits = 0;
drivers/fsi/fsi-master-gpio.c
347
msg.bits = 0;
drivers/fsi/fsi-master-gpio.c
360
msg.bits = 0;
drivers/fsi/fsi-master-gpio.c
379
crc = crc4(crc, msg.msg, msg.bits);
drivers/fsi/fsi-master-gpio.c
382
if (((~msg.msg) & ((1ull << msg.bits) - 1)) == 0)
drivers/fsi/fsi-master-gpio.c
385
msg.msg, msg.bits);
drivers/fsi/fsi-master-gpio.c
46
uint8_t bits;
drivers/gpib/agilent_82357a/agilent_82357a.c
1062
unsigned short bits;
drivers/gpib/agilent_82357a/agilent_82357a.c
1064
bits = (*nanosec + nanosec_per_bit / 2) / nanosec_per_bit;
drivers/gpib/agilent_82357a/agilent_82357a.c
1065
if (bits < min_value)
drivers/gpib/agilent_82357a/agilent_82357a.c
1066
bits = min_value;
drivers/gpib/agilent_82357a/agilent_82357a.c
1067
if (bits > max_value)
drivers/gpib/agilent_82357a/agilent_82357a.c
1068
bits = max_value;
drivers/gpib/agilent_82357a/agilent_82357a.c
1069
*nanosec = bits * nanosec_per_bit;
drivers/gpib/agilent_82357a/agilent_82357a.c
1070
return bits;
drivers/gpib/cb7210/cb7210.c
1003
bits = INBOX_FULL_INTR_BIT | INBOX_BYTE_BITS(3) | INBOX_SELECT_BITS(3) |
drivers/gpib/cb7210/cb7210.c
1005
outl(bits, cb_priv->amcc_iobase + INTCSR_REG);
drivers/gpib/cb7210/cb7210.c
1041
unsigned int bits;
drivers/gpib/cb7210/cb7210.c
1057
bits = irq_bits(config->ibirq);
drivers/gpib/cb7210/cb7210.c
1058
if (bits == 0)
drivers/gpib/cb7210/cb7210.c
436
int bits;
drivers/gpib/cb7210/cb7210.c
450
bits = INBOX_FULL_INTR_BIT | INBOX_BYTE_BITS(3) |
drivers/gpib/cb7210/cb7210.c
452
outl(bits, priv->amcc_iobase + INTCSR_REG);
drivers/gpib/cb7210/cb7210.c
936
int bits;
drivers/gpib/include/nec7210.h
119
unsigned int mask, unsigned int bits);
drivers/gpib/ines/ines_gpib.c
897
u32 bits;
drivers/gpib/ines/ines_gpib.c
899
bits = amcc_prefetch_bits(region, PREFETCH_DISABLED);
drivers/gpib/ines/ines_gpib.c
900
bits |= amcc_PTADR_mode_bit(region);
drivers/gpib/ines/ines_gpib.c
901
bits |= amcc_disable_write_fifo_bit(region);
drivers/gpib/ines/ines_gpib.c
902
bits |= amcc_wait_state_bits(region, num_wait_states);
drivers/gpib/ines/ines_gpib.c
903
outl(bits, ines_priv->amcc_iobase + AMCC_PASS_THRU_REG);
drivers/gpib/nec7210/nec7210.c
231
unsigned int mask, unsigned int bits)
drivers/gpib/nec7210/nec7210.c
234
priv->reg_bits[reg] |= mask & bits;
drivers/gpib/tnt4882/tnt4882_gpib.c
285
unsigned int bits;
drivers/gpib/tnt4882/tnt4882_gpib.c
300
bits = TNT_B_16BIT | TNT_IN | TNT_CCEN;
drivers/gpib/tnt4882/tnt4882_gpib.c
301
tnt_writeb(tnt_priv, bits, CFG);
drivers/gpib/tnt4882/tnt4882_gpib.c
460
unsigned int bits;
drivers/gpib/tnt4882/tnt4882_gpib.c
478
bits = TNT_B_16BIT;
drivers/gpib/tnt4882/tnt4882_gpib.c
480
bits |= TNT_CCEN;
drivers/gpib/tnt4882/tnt4882_gpib.c
485
bits |= TNT_COMMAND;
drivers/gpib/tnt4882/tnt4882_gpib.c
486
tnt_writeb(tnt_priv, bits, CFG);
drivers/gpio/gpio-74x164.c
71
unsigned long *bits)
drivers/gpio/gpio-74x164.c
83
bitmask = bitmap_get_value8(bits, offset) & bankmask;
drivers/gpio/gpio-aggregator.c
301
unsigned long *bits)
drivers/gpio/gpio-aggregator.c
321
__assign_bit(i, bits, test_bit(j++, values));
drivers/gpio/gpio-aggregator.c
327
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-aggregator.c
335
error = gpio_fwd_get_multiple(fwd, mask, bits);
drivers/gpio/gpio-aggregator.c
339
error = gpio_fwd_get_multiple(fwd, mask, bits);
drivers/gpio/gpio-aggregator.c
386
unsigned long *bits)
drivers/gpio/gpio-aggregator.c
393
__assign_bit(j, values, test_bit(i, bits));
drivers/gpio/gpio-aggregator.c
406
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-aggregator.c
414
ret = gpio_fwd_set_multiple(fwd, mask, bits);
drivers/gpio/gpio-aggregator.c
418
ret = gpio_fwd_set_multiple(fwd, mask, bits);
drivers/gpio/gpio-aggregator.c
607
unsigned long *bits)
drivers/gpio/gpio-aggregator.c
611
return gpio_fwd_get_multiple_locked(gc, mask, bits);
drivers/gpio/gpio-aggregator.c
642
unsigned long *bits)
drivers/gpio/gpio-aggregator.c
646
return gpio_fwd_set_multiple_locked(gc, mask, bits);
drivers/gpio/gpio-ath79.c
57
struct ath79_gpio_ctrl *ctrl, unsigned reg, u32 mask, u32 bits)
drivers/gpio/gpio-ath79.c
62
new_val = (old_val & ~mask) | (bits & mask);
drivers/gpio/gpio-kempld.c
101
bits[0] |= (kempld_read8(pld, reg) & msk) << shift;
drivers/gpio/gpio-kempld.c
123
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-kempld.c
144
val |= (bits[0] >> shift) & msk;
drivers/gpio/gpio-kempld.c
83
unsigned long *bits)
drivers/gpio/gpio-kempld.c
90
bits[0] &= ~mask[0];
drivers/gpio/gpio-max3191x.c
220
unsigned long *bits)
drivers/gpio/gpio-max3191x.c
234
bitmap_zero(bits, gpio->ngpio);
drivers/gpio/gpio-max3191x.c
245
bitmap_set_value8(bits, in, bit);
drivers/gpio/gpio-max732x.c
242
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-max732x.c
248
max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] & 0xff);
drivers/gpio/gpio-max732x.c
250
max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] >> 8) & 0xff);
drivers/gpio/gpio-mmio.c
129
return BIT(chip->bits - 1 - line);
drivers/gpio/gpio-mmio.c
150
unsigned long *bits)
drivers/gpio/gpio-mmio.c
156
*bits &= ~*mask;
drivers/gpio/gpio-mmio.c
162
*bits |= chip->read_reg(chip->reg_set) & set_mask;
drivers/gpio/gpio-mmio.c
164
*bits |= chip->read_reg(chip->reg_dat) & get_mask;
drivers/gpio/gpio-mmio.c
180
unsigned long *bits)
drivers/gpio/gpio-mmio.c
185
*bits &= ~*mask;
drivers/gpio/gpio-mmio.c
186
*bits |= chip->read_reg(chip->reg_dat) & *mask;
drivers/gpio/gpio-mmio.c
194
unsigned long *bits)
drivers/gpio/gpio-mmio.c
202
*bits &= ~*mask;
drivers/gpio/gpio-mmio.c
216
*bits |= gpio_mmio_line2mask(gc, bit);
drivers/gpio/gpio-mmio.c
276
unsigned long *bits,
drivers/gpio/gpio-mmio.c
286
for_each_set_bit(i, mask, chip->bits) {
drivers/gpio/gpio-mmio.c
287
if (test_bit(i, bits))
drivers/gpio/gpio-mmio.c
296
unsigned long *bits,
drivers/gpio/gpio-mmio.c
304
gpio_mmio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
drivers/gpio/gpio-mmio.c
313
unsigned long *bits)
drivers/gpio/gpio-mmio.c
317
gpio_mmio_set_multiple_single_reg(gc, mask, bits, chip->reg_dat);
drivers/gpio/gpio-mmio.c
323
unsigned long *bits)
drivers/gpio/gpio-mmio.c
327
gpio_mmio_set_multiple_single_reg(gc, mask, bits, chip->reg_set);
drivers/gpio/gpio-mmio.c
334
unsigned long *bits)
drivers/gpio/gpio-mmio.c
339
gpio_mmio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
drivers/gpio/gpio-mmio.c
461
switch (chip->bits) {
drivers/gpio/gpio-mmio.c
497
dev_err(dev, "unsupported data width %u bits\n", chip->bits);
drivers/gpio/gpio-mmio.c
635
chip->bits = cfg->sz * 8;
drivers/gpio/gpio-mmio.c
636
if (chip->bits > BITS_PER_LONG)
drivers/gpio/gpio-mmio.c
648
gc->ngpio = chip->bits;
drivers/gpio/gpio-mockup.c
104
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-mockup.c
112
__assign_bit(bit, bits, val);
drivers/gpio/gpio-mockup.c
138
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-mockup.c
146
__gpio_mockup_set(chip, bit, test_bit(bit, bits));
drivers/gpio/gpio-mpsse.c
223
unsigned long *bits)
drivers/gpio/gpio-mpsse.c
238
bank_bits = bitmap_get_value8(bits, i);
drivers/gpio/gpio-mpsse.c
254
unsigned long *bits)
drivers/gpio/gpio-mpsse.c
273
bitmap_set_value8(bits, ret & bank_mask, i);
drivers/gpio/gpio-mpsse.c
283
unsigned long mask = 0, bits = 0;
drivers/gpio/gpio-mpsse.c
286
err = gpio_mpsse_get_multiple(chip, &mask, &bits);
drivers/gpio/gpio-mpsse.c
291
if (bits)
drivers/gpio/gpio-mpsse.c
300
unsigned long mask = 0, bits = 0;
drivers/gpio/gpio-mpsse.c
304
__set_bit(offset, &bits);
drivers/gpio/gpio-mpsse.c
306
return gpio_mpsse_set_multiple(chip, &mask, &bits);
drivers/gpio/gpio-omap.c
894
unsigned long *bits)
drivers/gpio/gpio-omap.c
910
*bits = val;
drivers/gpio/gpio-omap.c
973
unsigned long *bits)
drivers/gpio/gpio-omap.c
981
l = (readl_relaxed(reg) & ~*mask) | (*bits & *mask);
drivers/gpio/gpio-pca953x.c
710
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-pca953x.c
721
bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
drivers/gpio/gpio-pca953x.c
726
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-pca953x.c
738
bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
drivers/gpio/gpio-pcf857x.c
142
unsigned long *bits)
drivers/gpio/gpio-pcf857x.c
150
*bits &= ~*mask;
drivers/gpio/gpio-pcf857x.c
151
*bits |= value & *mask;
drivers/gpio/gpio-pcf857x.c
179
unsigned long *bits)
drivers/gpio/gpio-pcf857x.c
186
gpio->out |= *bits & *mask;
drivers/gpio/gpio-pisosr.c
81
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-pisosr.c
90
bitmap_zero(bits, chip->ngpio);
drivers/gpio/gpio-pisosr.c
93
bitmap_set_value8(bits, buffer_state, offset);
drivers/gpio/gpio-rcar.c
332
unsigned long *bits)
drivers/gpio/gpio-rcar.c
340
bits[0] = gpio_rcar_read(p, INDT) & bankmask;
drivers/gpio/gpio-rcar.c
355
bits[0] = val;
drivers/gpio/gpio-rcar.c
372
unsigned long *bits)
drivers/gpio/gpio-rcar.c
382
val |= (bankmask & bits[0]);
drivers/gpio/gpio-reg.c
104
r->out = (r->out & ~*mask) | (*bits & *mask);
drivers/gpio/gpio-reg.c
98
unsigned long *bits)
drivers/gpio/gpio-sim.c
132
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-sim.c
137
bitmap_replace(bits, bits, chip->value_map, mask, gc->ngpio);
drivers/gpio/gpio-sim.c
143
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-sim.c
148
bitmap_replace(chip->value_map, chip->value_map, bits, mask,
drivers/gpio/gpio-tb10x.c
78
const unsigned long bits = r & m;
drivers/gpio/gpio-tb10x.c
81
for_each_set_bit(i, &bits, 32)
drivers/gpio/gpio-thunderx.c
276
unsigned long *bits)
drivers/gpio/gpio-thunderx.c
283
set_bits = bits[bank] & mask[bank];
drivers/gpio/gpio-thunderx.c
284
clear_bits = ~bits[bank] & mask[bank];
drivers/gpio/gpio-tpic2810.c
44
static void tpic2810_set_mask_bits(struct gpio_chip *chip, u8 mask, u8 bits)
drivers/gpio/gpio-tpic2810.c
53
buffer |= (mask & bits);
drivers/gpio/gpio-tpic2810.c
71
unsigned long *bits)
drivers/gpio/gpio-tpic2810.c
73
tpic2810_set_mask_bits(chip, *mask, *bits);
drivers/gpio/gpio-uniphier.c
150
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpio-uniphier.c
156
bank_bits = bitmap_get_value8(bits, i);
drivers/gpio/gpio-xilinx.c
179
unsigned long *bits)
drivers/gpio/gpio-xilinx.c
188
bitmap_scatter(hw_bits, bits, chip->map, 64);
drivers/gpio/gpiolib-acpi-core.c
1094
u32 bits, u64 *value, void *handler_context,
drivers/gpio/gpiolib-acpi-core.c
1131
length = min_t(unsigned int, agpio->pin_table_length, pin_index + bits);
drivers/gpio/gpiolib-cdev.c
1314
lv.bits = 0;
drivers/gpio/gpiolib-cdev.c
1323
lv.bits |= BIT_ULL(i);
drivers/gpio/gpiolib-cdev.c
1359
if (lv.bits & BIT_ULL(i))
drivers/gpio/gpiolib.c
3457
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpiolib.c
3464
ret = gc->get_multiple(gc, mask, bits);
drivers/gpio/gpiolib.c
3477
__assign_bit(i, bits, value);
drivers/gpio/gpiolib.c
3537
unsigned long *mask, *bits;
drivers/gpio/gpiolib.c
3546
bits = fastpath_bits;
drivers/gpio/gpiolib.c
3554
bits = bitmap_alloc(guard.gc->ngpio, flags);
drivers/gpio/gpiolib.c
3555
if (!bits) {
drivers/gpio/gpiolib.c
3581
ret = gpio_chip_get_multiple(guard.gc, mask, bits);
drivers/gpio/gpiolib.c
3585
if (bits != fastpath_bits)
drivers/gpio/gpiolib.c
3586
bitmap_free(bits);
drivers/gpio/gpiolib.c
3593
int value = test_bit(hwgpio, bits);
drivers/gpio/gpiolib.c
3608
if (bits != fastpath_bits)
drivers/gpio/gpiolib.c
3609
bitmap_free(bits);
drivers/gpio/gpiolib.c
3806
unsigned long *mask, unsigned long *bits)
drivers/gpio/gpiolib.c
3814
ret = gc->set_multiple(gc, mask, bits);
drivers/gpio/gpiolib.c
3823
ret = gpiochip_set(gc, i, test_bit(i, bits));
drivers/gpio/gpiolib.c
3882
unsigned long *mask, *bits;
drivers/gpio/gpiolib.c
3891
bits = fastpath_bits;
drivers/gpio/gpiolib.c
3899
bits = bitmap_alloc(guard.gc->ngpio, flags);
drivers/gpio/gpiolib.c
3900
if (!bits) {
drivers/gpio/gpiolib.c
3939
__assign_bit(hwgpio, bits, value);
drivers/gpio/gpiolib.c
3951
ret = gpiochip_set_multiple(guard.gc, mask, bits);
drivers/gpio/gpiolib.c
3958
if (bits != fastpath_bits)
drivers/gpio/gpiolib.c
3959
bitmap_free(bits);
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
63
int amdgpu_pasid_alloc(unsigned int bits)
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
68
if (bits == 0)
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
72
XA_LIMIT(1, (1U << bits) - 1),
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h
73
int amdgpu_pasid_alloc(unsigned int bits);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1700
if (adev->virt.ras_en_caps.bits.block_umc)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1702
if (adev->virt.ras_en_caps.bits.block_sdma)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1704
if (adev->virt.ras_en_caps.bits.block_gfx)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1706
if (adev->virt.ras_en_caps.bits.block_mmhub)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1708
if (adev->virt.ras_en_caps.bits.block_athub)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1710
if (adev->virt.ras_en_caps.bits.block_pcie_bif)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1712
if (adev->virt.ras_en_caps.bits.block_hdp)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1714
if (adev->virt.ras_en_caps.bits.block_xgmi_wafl)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1716
if (adev->virt.ras_en_caps.bits.block_df)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1718
if (adev->virt.ras_en_caps.bits.block_smn)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1720
if (adev->virt.ras_en_caps.bits.block_sem)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1722
if (adev->virt.ras_en_caps.bits.block_mp0)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1724
if (adev->virt.ras_en_caps.bits.block_mp1)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1726
if (adev->virt.ras_en_caps.bits.block_fuse)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1728
if (adev->virt.ras_en_caps.bits.block_mca)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1730
if (adev->virt.ras_en_caps.bits.block_vcn)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1732
if (adev->virt.ras_en_caps.bits.block_jpeg)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1734
if (adev->virt.ras_en_caps.bits.block_ih)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1736
if (adev->virt.ras_en_caps.bits.block_mpio)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1739
if (adev->virt.ras_en_caps.bits.poison_propogation_mode)
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1742
if (adev->virt.ras_en_caps.bits.uniras_supported)
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
2332
unsigned bits = ilog2(vm_size) + 18;
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
2337
return (bits - 9);
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
2339
return ((bits + 3) / 2);
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
209
} bits;
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
1029
u32 bits = (VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
1039
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
1042
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
1047
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
1050
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
1215
u32 bits = (VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
1226
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
1230
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
1236
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
1240
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
1385
u32 bits = (VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
1397
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
1401
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
1407
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
1411
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
417
u32 bits, i, tmp, reg;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
425
bits = 0x7f;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
432
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
438
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
446
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
452
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
469
u32 tmp, reg, bits, i, j;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
471
bits = VM_CONTEXT1_CNTL__RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT_MASK |
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
499
tmp &= ~bits;
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
527
tmp |= bits;
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
668
misc_pkt.change_config.option.bits.limit_single_process =
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
699
misc_pkt.change_config.option.bits.limit_single_process =
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
633
misc_pkt.change_config.option.bits.limit_single_process =
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
977
reg_gfx_index.bits.sh_broadcast_writes = 1;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
978
reg_gfx_index.bits.se_broadcast_writes = 1;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
979
reg_gfx_index.bits.instance_broadcast_writes = 1;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
980
reg_sq_cmd.bits.mode = SQ_IND_CMD_MODE_BROADCAST;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
981
reg_sq_cmd.bits.cmd = SQ_IND_CMD_CMD_KILL;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
982
reg_sq_cmd.bits.vm_id = vmid;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
59
} bitfields, bits;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
74
} bitfields, bits;
drivers/gpu/drm/amd/amdkfd/kfd_events.c
162
struct kfd_process *p, uint32_t id, uint32_t bits,
drivers/gpu/drm/amd/amdkfd/kfd_events.c
173
if (bits > 31 || (1U << bits) >= KFD_SIGNAL_EVENT_LIMIT) {
drivers/gpu/drm/amd/amdkfd/kfd_events.c
184
for (ev = NULL; id < KFD_SIGNAL_EVENT_LIMIT && !ev; id += 1U << bits) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
10187
attributes.attribute_flags.bits.ENABLE_CURSOR_DEGAMMA = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
12738
dm_new_plane_state->dc_state->update_flags.bits.full_update = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1422
!dc->debug.dpia_debug.bits.disable_dpia) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1424
hw_params.disable_dpia = dc->debug.dpia_debug.bits.disable_dpia;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1651
if (offload_work->data.bytes.device_service_irq.bits.UP_REQ_MSG_RDY ||
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1652
offload_work->data.bytes.device_service_irq.bits.DOWN_REP_MSG_RDY) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1661
if (offload_work->data.bytes.device_service_irq.bits.AUTOMATED_TEST) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1671
test_response.bits.ACK = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1843
reg.bits.status = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1844
reg.bits.command_code = command_code;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1845
reg.bits.param = param;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
1853
reg.bits.status = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2143
init_data.flags.allow_lttpr_non_transparent_mode.bits.DP1_4A = true;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2145
init_data.flags.allow_lttpr_non_transparent_mode.bits.DP2_0 = true;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2236
adev->dm.dc->debug.fams2_config.bits.enable = false;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
2969
if (option.bits.bootcrc_en_at_S0i3 == 0)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4077
if (link->dpcd_sink_ext_caps.bits.miniled == 1)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4079
if (link->dpcd_sink_ext_caps.bits.oled == 1)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4136
if (caps->ext_caps->bits.oled == 1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4583
if (hpd_irq_data.bytes.device_service_irq.bits.AUTOMATED_TEST) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4589
if (hpd_irq_data.bytes.device_service_irq.bits.UP_REQ_MSG_RDY ||
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4590
hpd_irq_data.bytes.device_service_irq.bits.DOWN_REP_MSG_RDY) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
4671
if (hpd_irq_data.bytes.device_service_irq.bits.CP_IRQ) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5681
if (caps->ext_caps && !caps->ext_caps->bits.oled && amdgpu_dm_abm_level < 0)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7762
stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1064
lut->state.bits.initialized = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1071
lut->state.bits.initialized = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1721
lut->state.bits.initialized = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
1729
lut->state.bits.initialized = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1249
if (!test_request.bits.EDID_READ)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1252
test_response.bits.EDID_CHECKSUM_WRITE = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1397
new_downspread.bits.IGNORE_MSA_TIMING_PARAM =
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1439
switch (dpcd_test_pattern.bits.PATTERN) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1447
test_pattern = (dpcd_test_params.bits.DYN_RANGE ==
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1457
if (dpcd_test_params.bits.CLR_FORMAT == 0)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1460
test_pattern_color_space = dpcd_test_params.bits.YCBCR_COEFS ?
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1464
switch (dpcd_test_params.bits.BPC) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1481
switch (dpcd_test_params.bits.CLR_FORMAT) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1593
if (dpcd_caps->adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT == true &&
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1707
(dpcd_caps->adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT == true))
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1185
aconnector->mst_downstream_port_caps.bytes.byte0.bits.DWN_STRM_PORTX_TYPE == DOWN_STREAM_DETAILED_HDMI) {
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1188
aconnector->mst_downstream_port_caps.bytes.byte2.bits.MAX_ENCODED_LINK_BW_SUPPORT);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1898
dp_link_encoding, link_bw_set, lane_count.bits.LANE_COUNT_SET);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1930
*cur_link_bw = link_rate_per_lane_kbps * lane_count.bits.LANE_COUNT_SET / 10000 * total_data_bw_efficiency_x10000;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
246
link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
1407
attributes.attribute_flags.bits.ENABLE_CURSOR_DEGAMMA = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
49
if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP ||
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
50
!link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
53
if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED &&
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
79
caps->psr_rfb_setup_time = (6 - dpcd_caps->psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME) * 55;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
81
!dpcd_caps->psr_info.psr_dpcd_caps.bits.LINK_TRAINING_ON_EXIT_NOT_REQUIRED;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
85
dpcd_caps->psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
86
caps->y_coordinate_required = dpcd_caps->psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
88
caps->alpm_cap = dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
89
caps->standby_support = dpcd_caps->alpm_caps.bits.PM_STATE_2A_SUPPORT;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
59
if (!dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
63
if (!as_caps->dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT)
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c
1169
lut->state.bits.initialized = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c
1174
initialized = lut->state.bits.initialized;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c
1198
initialized = lut->state.bits.initialized;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c
1252
lut->state.bits.initialized = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c
1256
initialized = lut->state.bits.initialized;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c
1279
initialized = lut->state.bits.initialized;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
110
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME = 6;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
125
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.LINK_TRAINING_ON_EXIT_NOT_REQUIRED = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
138
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.LINK_TRAINING_ON_EXIT_NOT_REQUIRED = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
156
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
157
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
159
link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
160
link->dpcd_caps.alpm_caps.bits.PM_STATE_2A_SUPPORT = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
82
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_psr_test.c
96
link->dpcd_caps.psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME = 3;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c
123
ctx->link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c
136
ctx->link->dpcd_caps.adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT = 0;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c
59
ctx->link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP = 1;
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_replay_test.c
60
ctx->link->dpcd_caps.adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT = 1;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c
106
} bits;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c
504
msg_data.bits.hr_id = hr_id;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c
505
msg_data.bits.bw_mbps = bw_kbps / 1000;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c
96
} bits;
drivers/gpu/drm/amd/display/dc/core/dc.c
2062
if (link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) {
drivers/gpu/drm/amd/display/dc/core/dc.c
2067
if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
drivers/gpu/drm/amd/display/dc/core/dc.c
2311
uint32_t prev_dsc_changed = context->streams[i]->update_flags.bits.dsc_changed;
drivers/gpu/drm/amd/display/dc/core/dc.c
2314
context->streams[i]->update_flags.bits.dsc_changed = prev_dsc_changed;
drivers/gpu/drm/amd/display/dc/core/dc.c
2641
if (dc->debug.enable_mem_low_power.bits.cm) {
drivers/gpu/drm/amd/display/dc/core/dc.c
2777
update_flags->bits.color_space_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2782
update_flags->bits.horizontal_mirror_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2787
update_flags->bits.rotation_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2792
update_flags->bits.pixel_format_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2797
update_flags->bits.stereo_format_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2802
update_flags->bits.per_pixel_alpha_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2807
update_flags->bits.global_alpha_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2819
update_flags->bits.dcc_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2828
update_flags->bits.bpp_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2834
update_flags->bits.plane_size_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2841
update_flags->bits.swizzle_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2846
update_flags->bits.bandwidth_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2876
update_flags->bits.scaling_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2882
update_flags->bits.clock_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2889
update_flags->bits.bandwidth_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2895
update_flags->bits.bandwidth_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2905
update_flags->bits.position_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2934
update_flags->bits.addr_update = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2938
update_flags->bits.tmz_changed = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2943
update_flags->bits.in_transfer_func_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2948
update_flags->bits.input_csc_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2953
update_flags->bits.cursor_csc_color_matrix_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2958
update_flags->bits.coeff_reduction_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2963
update_flags->bits.gamut_remap_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2968
update_flags->bits.gamma_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2973
update_flags->bits.lut_3d = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2980
update_flags->bits.hdr_mult = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2987
update_flags->bits.sdr_white_level_nits = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2992
update_flags->bits.cm_hist_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
2999
update_flags->bits.mcm_transfer_function_enable_change = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3004
if (update_flags->bits.lut_3d &&
drivers/gpu/drm/amd/display/dc/core/dc.c
3010
(update_flags->bits.gamma_change ||
drivers/gpu/drm/amd/display/dc/core/dc.c
3011
update_flags->bits.gamut_remap_change ||
drivers/gpu/drm/amd/display/dc/core/dc.c
3012
update_flags->bits.input_csc_change ||
drivers/gpu/drm/amd/display/dc/core/dc.c
3013
update_flags->bits.cm_hist_change ||
drivers/gpu/drm/amd/display/dc/core/dc.c
3014
update_flags->bits.coeff_reduction_change)) {
drivers/gpu/drm/amd/display/dc/core/dc.c
3039
updates[i].surface->update_flags.bits.addr_update = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3074
su_flags->bits.scaling = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3077
su_flags->bits.out_tf = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3080
su_flags->bits.abm_level = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3083
su_flags->bits.dpms_off = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3088
su_flags->bits.gamut_remap = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3091
su_flags->bits.wb_update = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3094
su_flags->bits.dsc_changed = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3097
su_flags->bits.mst_bw = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3102
su_flags->bits.fams_changed = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3105
su_flags->bits.scaler_sharpener = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3108
su_flags->bits.sharpening_required = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3111
su_flags->bits.out_csc = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3120
su_flags->bits.gamut_remap = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3132
su_flags->bits.info_frame = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3137
su_flags->bits.dmdata = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3142
su_flags->bits.out_csc = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3147
su_flags->bits.out_tf = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3152
su_flags->bits.periodic_interrupt = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3157
su_flags->bits.dither = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3162
su_flags->bits.cursor_attr = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3167
su_flags->bits.cursor_pos = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
3716
uint32_t dsc_changed = stream_update->stream->update_flags.bits.dsc_changed;
drivers/gpu/drm/amd/display/dc/core/dc.c
3718
stream_update->stream->update_flags.bits.dsc_changed = dsc_changed;
drivers/gpu/drm/amd/display/dc/core/dc.c
3770
if (surface->update_flags.bits.position_change) {
drivers/gpu/drm/amd/display/dc/core/dc.c
4557
addr_only_update_flags.bits.addr_update = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
4559
return update_flags.bits.addr_update &&
drivers/gpu/drm/amd/display/dc/core/dc.c
4620
if (pipe_ctx->plane_state->update_flags.bits.addr_update)
drivers/gpu/drm/amd/display/dc/core/dc.c
4651
if (dc->debug.fams2_config.bits.enable &&
drivers/gpu/drm/amd/display/dc/core/dc.c
4652
dc->debug.fams2_config.bits.enable_offload_flip &&
drivers/gpu/drm/amd/display/dc/core/dc.c
4843
if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)
drivers/gpu/drm/amd/display/dc/core/dc.c
4850
hw_locks.bits.lock_dig = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
5090
if (pipe_ctx->plane_state->update_flags.bits.addr_update)
drivers/gpu/drm/amd/display/dc/core/dc.c
5102
if ((update_type != UPDATE_TYPE_FAST) && stream->update_flags.bits.dsc_changed)
drivers/gpu/drm/amd/display/dc/core/dc.c
5119
hw_locks.bits.lock_dig = 1;
drivers/gpu/drm/amd/display/dc/core/dc.c
5181
!pipe_ctx->plane_state->update_flags.bits.addr_update ||
drivers/gpu/drm/amd/display/dc/core/dc.c
6608
!dc->debug.dpia_debug.bits.disable_dpia)
drivers/gpu/drm/amd/display/dc/core/dc.c
6615
if (!dc->debug.dpia_debug.bits.disable_dpia)
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1019
if (current_pipe->stream->update_flags.bits.dither) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1044
if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1060
if (hws->funcs.set_input_transfer_func && current_mpc_pipe->plane_state->update_flags.bits.gamma_change) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1069
(current_mpc_pipe->plane_state->update_flags.bits.gamut_remap_change ||
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1070
current_mpc_pipe->stream->update_flags.bits.gamut_remap)) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1075
if (current_mpc_pipe->plane_state->update_flags.bits.input_csc_change) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1080
if (current_mpc_pipe->plane_state->update_flags.bits.coeff_reduction_change) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1085
if (current_mpc_pipe->plane_state->update_flags.bits.cm_hist_change) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1098
current_mpc_pipe->plane_state->update_flags.bits.cursor_csc_color_matrix_change) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1106
if (hws->funcs.set_output_transfer_func && current_mpc_pipe->stream->update_flags.bits.out_tf) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1121
if (current_mpc_pipe->stream->update_flags.bits.out_csc) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
1179
current_mpc_pipe->plane_state->update_flags.bits.addr_update &&
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
719
if (!dc->ctx || !dc->ctx->dmub_srv || !pipe_ctx || !context || !dc->debug.fams2_config.bits.enable)
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
793
if (dc->hwss.setup_periodic_interrupt && stream->update_flags.bits.periodic_interrupt) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
800
if (stream->update_flags.bits.info_frame) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
815
if (dc->hwss.set_dmdata_attributes && stream->update_flags.bits.dmdata &&
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
838
if ((dc->hwss.set_cursor_attribute && stream->update_flags.bits.cursor_attr) ||
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
839
(dc->hwss.set_cursor_position && stream->update_flags.bits.cursor_pos))
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
843
if (dc->hwss.set_cursor_attribute && stream->update_flags.bits.cursor_attr) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
945
if (dc->hwss.set_cursor_position && stream->update_flags.bits.cursor_pos) {
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4817
hdmi_info.bits.header.info_frame_type = HDMI_INFOFRAME_TYPE_AVI;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4820
hdmi_info.bits.header.version = 2;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4821
hdmi_info.bits.header.length = HDMI_AVI_INFOFRAME_SIZE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4847
hdmi_info.bits.Y0_Y1_Y2 = (uint8_t)pixel_encoding;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4850
hdmi_info.bits.A0 = ACTIVE_FORMAT_VALID;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4853
hdmi_info.bits.B0_B1 = BAR_INFO_BOTH_VALID;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4855
hdmi_info.bits.SC0_SC1 = PICTURE_SCALING_UNIFORM;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4860
hdmi_info.bits.S0_S1 = scan_type;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4866
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU709;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4870
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU601;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4875
hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_BT2020RGBYCBCR;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4876
hdmi_info.bits.C0_C1 = COLORIMETRY_EXTENDED;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4879
hdmi_info.bits.EC0_EC2 = COLORIMETRYEX_ADOBERGB;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4880
hdmi_info.bits.C0_C1 = COLORIMETRY_EXTENDED;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4884
hdmi_info.bits.C0_C1 = COLORIMETRY_NO_DATA;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4890
hdmi_info.bits.EC0_EC2 = 0;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4891
hdmi_info.bits.C0_C1 = COLORIMETRY_ITU709;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4900
hdmi_info.bits.M0_M1 = aspect;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4907
hdmi_info.bits.M0_M1 = 0;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4911
hdmi_info.bits.R0_R3 = ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4915
hdmi_info.bits.CN0_CN1 = 0;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4916
hdmi_info.bits.ITC = 1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4919
hdmi_info.bits.CN0_CN1 = 0;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4920
hdmi_info.bits.ITC = 1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4923
hdmi_info.bits.CN0_CN1 = 1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4924
hdmi_info.bits.ITC = 1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4927
hdmi_info.bits.CN0_CN1 = 2;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4928
hdmi_info.bits.ITC = 1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4931
hdmi_info.bits.CN0_CN1 = 3;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4932
hdmi_info.bits.ITC = 1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4939
hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_FULL_RANGE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4942
hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_LIMITED_RANGE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4944
hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_DEFAULT_RANGE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4946
hdmi_info.bits.Q0_Q1 = RGB_QUANTIZATION_DEFAULT_RANGE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4950
hdmi_info.bits.YQ0_YQ1 = YYC_QUANTIZATION_LIMITED_RANGE;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4977
hdmi_info.bits.VIC0_VIC7 = (uint8_t)vic;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4979
hdmi_info.bits.header.version = 3;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4983
if (hdmi_info.bits.C0_C1 == COLORIMETRY_EXTENDED &&
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4984
hdmi_info.bits.EC0_EC2 == COLORIMETRYEX_RESERVED) {
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4985
hdmi_info.bits.header.version = 4;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4986
hdmi_info.bits.header.length = 14;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4990
hdmi_info.bits.header.version = 4;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4991
hdmi_info.bits.header.length = 15;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4993
hdmi_info.bits.FR0_FR3 = fr_ind & 0xF;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4994
hdmi_info.bits.FR4 = (fr_ind >> 4) & 0x1;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
4995
hdmi_info.bits.RID0_RID5 = (uint8_t)rid;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5001
hdmi_info.bits.PR0_PR3 = 0;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5008
hdmi_info.bits.bar_top = (uint16_t)stream->timing.v_border_top;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5009
hdmi_info.bits.bar_bottom = (uint16_t)(stream->timing.v_total
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5011
hdmi_info.bits.bar_left = (uint16_t)stream->timing.h_border_left;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5012
hdmi_info.bits.bar_right = (uint16_t)(stream->timing.h_total
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5020
hdmi_info.bits.ACE0_ACE3 = 0;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5025
*check_sum = HDMI_INFOFRAME_TYPE_AVI + hdmi_info.bits.header.length + hdmi_info.bits.header.version;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
5027
for (byte_index = 1; byte_index <= hdmi_info.bits.header.length; byte_index++)
drivers/gpu/drm/amd/display/dc/core/dc_state.c
1016
is_fams2_in_use |= state->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;
drivers/gpu/drm/amd/display/dc/core/dc_state.c
1019
is_fams2_in_use |= dc->current_state->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;
drivers/gpu/drm/amd/display/dc/core/dc_surface.c
141
if (pipe_ctx->plane_state && flags.bits.address)
drivers/gpu/drm/amd/display/dc/core/dc_surface.c
143
if (pipe_ctx->plane_state && flags.bits.histogram)
drivers/gpu/drm/amd/display/dc/core/dc_surface.c
159
if (flags.bits.address)
drivers/gpu/drm/amd/display/dc/core/dc_surface.c
161
if (flags.bits.histogram) {
drivers/gpu/drm/amd/display/dc/dc.h
1448
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
1540
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
557
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
861
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
878
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
899
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
943
} bits;
drivers/gpu/drm/amd/display/dc/dc.h
959
} bits;
drivers/gpu/drm/amd/display/dc/dc_ddc_types.h
148
} bits;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1068
payload->enable = (uint8_t)hubp->pos.cur_ctl.bits.cur_enable;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1212
if (!dc_dmub_srv->dmub->meta_info.feature_bits.bits.cursor_offload_v1_support)
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1377
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1378
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1384
new_signals.bits.allow_idle = 1; /* always set */
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1388
new_signals.bits.allow_pg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1389
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1390
new_signals.bits.allow_ips2 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1391
new_signals.bits.allow_z10 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1393
new_signals.bits.allow_ips1z8 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1395
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1398
new_signals.bits.allow_pg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1399
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1402
new_signals.bits.allow_pg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1403
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1404
new_signals.bits.allow_ips2 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1409
new_signals.bits.allow_pg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1410
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1411
new_signals.bits.allow_ips2 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1412
new_signals.bits.allow_z10 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1414
new_signals.bits.allow_ips1z8 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1417
new_signals.bits.allow_pg = 0;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1418
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1419
new_signals.bits.allow_ips2 = 0;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1420
new_signals.bits.allow_z10 = 0;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1423
new_signals.bits.allow_pg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1424
new_signals.bits.allow_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1425
new_signals.bits.allow_ips2 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1426
new_signals.bits.allow_z10 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1430
new_signals.bits.allow_ips0_rcg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1431
new_signals.bits.allow_ips1_rcg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1433
new_signals.bits.allow_ips1_rcg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1435
new_signals.bits.allow_ips0_rcg = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1439
new_signals.bits.allow_dynamic_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1441
new_signals.bits.allow_dynamic_ips1 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1442
new_signals.bits.allow_dynamic_ips1_z8 = 1;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1452
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1453
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1495
ips_driver->signals.bits.allow_ips1,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1496
ips_driver->signals.bits.allow_ips2,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1497
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1498
ips_fw->signals.bits.ips2_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1499
ips_fw->signals.bits.ips1z8_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1510
if (!dc->caps.ips_v2_support && ((prev_driver_signals.bits.allow_ips2 || prev_driver_signals.all == 0) &&
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1512
ips_fw->signals.bits.ips2_commit || !ips_fw->signals.bits.in_idle))) {
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1515
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1516
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1518
if (!dc->debug.optimize_ips_handshake || !ips_fw->signals.bits.ips2_commit)
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1523
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1524
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1529
if (ips_fw->signals.bits.ips2_commit) {
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1533
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1534
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1541
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1542
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1548
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1549
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1551
while (ips_fw->signals.bits.ips2_commit)
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1556
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1557
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1564
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1565
ips_fw->signals.bits.ips2_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1572
if (prev_driver_signals.bits.allow_ips1 || prev_driver_signals.all == 0) {
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1575
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1576
ips_fw->signals.bits.ips2_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1577
ips_fw->signals.bits.ips1z8_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1579
while (ips_fw->signals.bits.ips1_commit)
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1584
ips_fw->signals.bits.ips1_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1585
ips_fw->signals.bits.ips2_commit,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1586
ips_fw->signals.bits.ips1z8_commit);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1651
dc_dmub_srv->dmub->meta_info.feature_bits.bits.shared_state_link_detection) {
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1653
return (bool)ips_fw->signals.bits.detection_required;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1832
global_cmd->config.global.features.bits.enable_stall_recovery = dc->debug.fams2_config.bits.enable_stall_recovery;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1833
global_cmd->config.global.features.bits.enable_debug = dc->debug.fams2_config.bits.enable_debug;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1834
global_cmd->config.global.features.bits.enable_offload_flip = dc->debug.fams2_config.bits.enable_offload_flip;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1864
global_cmd->config.global.features.bits.enable_visual_confirm = dc->debug.visual_confirm == VISUAL_CONFIRM_FAMS2;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1865
global_cmd->config.global.features.bits.enable = enable && context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1866
global_cmd->config.global.features.bits.enable_ppt_check = dc->debug.fams2_config.bits.enable_ppt_check;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1901
config->global.features.bits.enable_stall_recovery = dc->debug.fams2_config.bits.enable_stall_recovery;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1902
config->global.features.bits.enable_offload_flip = dc->debug.fams2_config.bits.enable_offload_flip;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1903
config->global.features.bits.enable_debug = dc->debug.fams2_config.bits.enable_debug;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1919
config->global.features.bits.enable_visual_confirm = dc->debug.visual_confirm == VISUAL_CONFIRM_FAMS2;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1920
config->global.features.bits.enable = enable && context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1921
config->global.features.bits.enable_ppt_check = dc->debug.fams2_config.bits.enable_ppt_check;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2003
cmds[num_cmds].fams2_flip.flip_info.config.bits.is_immediate = plane_state->flip_immediate;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
339
return (bool)boot_status.bits.optimized_init_done;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
371
return (bool)boot_status.bits.restore_required;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1007
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1017
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1026
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1036
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1051
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1059
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1067
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1077
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1117
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1128
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1140
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1166
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1179
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1335
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1357
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1370
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1381
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1395
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1406
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1417
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1425
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1436
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1446
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
1454
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
212
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
220
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
230
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
240
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
248
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
258
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
272
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
286
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
295
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
309
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
322
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
331
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
364
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
378
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
399
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
420
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
432
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
446
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
455
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
467
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
495
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
505
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
540
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
561
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
571
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
650
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
664
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
672
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
686
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
696
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
705
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
714
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
723
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
737
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
745
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
753
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
786
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
925
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
943
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
952
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
961
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
970
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
989
} bits;
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
997
} bits;
drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h
113
} bits;
drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h
92
} bits;
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
613
} bits;
drivers/gpu/drm/amd/display/dc/dc_plane.h
35
} bits;
drivers/gpu/drm/amd/display/dc/dc_stream.h
126
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
1083
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
1179
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
1197
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
1209
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
680
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
896
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
906
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
918
} bits;
drivers/gpu/drm/amd/display/dc/dc_types.h
929
} bits;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
124
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
134
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
187
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
196
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
205
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
214
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
240
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
249
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
258
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
267
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
336
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
360
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
404
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
459
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
466
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
476
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
483
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
493
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
500
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
510
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
517
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
527
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
534
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
690
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmistream)
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
701
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar) {
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
740
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar) {
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
762
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
769
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) {
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
778
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar)
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
322
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
326
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
331
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1315
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && !disallow_rcg)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
142
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dsc && allow_rcg)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1589
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1595
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1601
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1607
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1624
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1630
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1636
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1642
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1683
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmistream)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1694
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1746
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
175
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1909
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1920
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1931
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1942
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1960
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmistream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1974
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar) {
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1998
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2011
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2021
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2093
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2101
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2109
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2117
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2136
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
214
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2142
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2148
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2154
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2160
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2170
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2177
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2184
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2191
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2198
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
241
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
278
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk_fe && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
327
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk_fe && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
372
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
398
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && allow_rcg)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
431
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
468
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
505
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.hdmistream && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
527
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar && enable)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
284
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
291
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
301
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
308
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
318
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
325
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
335
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
342
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
406
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar) {
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
434
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar) {
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
460
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
469
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
478
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
487
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
513
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
522
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
531
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
540
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
558
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
567
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
576
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
585
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
607
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
615
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
623
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
631
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
770
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le) {
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
777
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
784
if (dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) {
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
792
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
877
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
884
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
891
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
898
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
111
dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
127
dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
143
dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
159
dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
175
dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
194
dccg->ctx->dc->debug.root_clock_optimization.bits.hdmistream ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
207
HDMICHARCLK0_ROOT_GATE_DISABLE, dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
278
if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_le) {
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
285
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpstream) {
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
291
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.physymclk) {
drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c
300
if (dccg->ctx->dc->debug.root_clock_optimization.bits.hdmichar)
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
240
masterCmdData1.bits.timehyst_frames = psr_context->timehyst_frames;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
241
masterCmdData1.bits.hyst_lines = psr_context->hyst_lines;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
242
masterCmdData1.bits.rfb_update_auto_en =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
244
masterCmdData1.bits.dp_port_num = psr_context->transmitterId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
245
masterCmdData1.bits.dcp_sel = psr_context->controllerId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
246
masterCmdData1.bits.phy_type = psr_context->phyType;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
247
masterCmdData1.bits.frame_cap_ind =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
249
masterCmdData1.bits.aux_chan = psr_context->channel;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
250
masterCmdData1.bits.aux_repeat = psr_context->aux_repeats;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
255
masterCmdData2.bits.dig_fe = psr_context->engineId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
256
masterCmdData2.bits.dig_be = psr_context->transmitterId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
257
masterCmdData2.bits.skip_wait_for_pll_lock =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
259
masterCmdData2.bits.frame_delay = psr_context->frame_delay;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
260
masterCmdData2.bits.smu_phy_id = psr_context->smuPhyId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
261
masterCmdData2.bits.num_of_controllers =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
267
masterCmdData3.bits.psr_level = psr_context->psr_level.u32all;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
314
masterCmdData1.bits.wait_loop = wait_loop_number;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
400
if (ctx->dc->links[i]->link_enc->features.flags.bits.DP_IS_USB_C) {
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
678
masterCmdData1.bits.timehyst_frames = psr_context->timehyst_frames;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
679
masterCmdData1.bits.hyst_lines = psr_context->hyst_lines;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
680
masterCmdData1.bits.rfb_update_auto_en =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
682
masterCmdData1.bits.dp_port_num = psr_context->transmitterId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
683
masterCmdData1.bits.dcp_sel = psr_context->controllerId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
684
masterCmdData1.bits.phy_type = psr_context->phyType;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
685
masterCmdData1.bits.frame_cap_ind =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
687
masterCmdData1.bits.aux_chan = psr_context->channel;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
688
masterCmdData1.bits.aux_repeat = psr_context->aux_repeats;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
689
masterCmdData1.bits.allow_smu_optimizations = psr_context->allow_smu_optimizations;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
694
masterCmdData2.bits.dig_fe = psr_context->engineId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
695
masterCmdData2.bits.dig_be = psr_context->transmitterId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
696
masterCmdData2.bits.skip_wait_for_pll_lock =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
698
masterCmdData2.bits.frame_delay = psr_context->frame_delay;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
699
masterCmdData2.bits.smu_phy_id = psr_context->smuPhyId;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
700
masterCmdData2.bits.num_of_controllers =
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
706
masterCmdData3.bits.psr_level = psr_context->psr_level.u32all;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
740
masterCmdData1.bits.wait_loop = wait_loop_number;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
265
} bits;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
281
} bits;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
293
} bits;
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
301
} bits;
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c
328
if (dce_i2c_hw->ctx->dc->debug.enable_mem_low_power.bits.i2c) {
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c
437
if (dce_i2c_hw->ctx->dc->debug.enable_mem_low_power.bits.i2c) {
drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c
100
CUR_INV_TRANS_CLAMP, attributes->attribute_flags.bits.INVERSE_TRANSPARENT_CLAMPING);
drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c
99
CURSOR_2X_MAGNIFY, attributes->attribute_flags.bits.ENABLE_MAGNIFICATION,
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1000
enc110->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1007
enc110->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1492
training_lane_set.bits.VOLTAGE_SWING_SET =
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1494
training_lane_set.bits.PRE_EMPHASIS_SET =
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1502
training_lane_set.bits.POST_CURSOR2_SET =
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1819
if (enc->features.flags.bits.IS_HBR2_CAPABLE)
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
1822
if (enc->features.flags.bits.IS_HBR3_CAPABLE)
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
2023
enc110->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
2030
enc110->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
2032
enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
2034
enc110->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
2041
enc110->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
837
if ((!enc110->base.features.flags.bits.HDMI_6GB_EN ||
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
989
enc110->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
996
enc110->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
998
enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
36
dc->ctx->dmub_srv->dmub->meta_info.feature_bits.bits.inbox0_lock_support;
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
396
if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&
drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c
181
if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
149
if (compressor->options.bits.CLK_GATING_DISABLED == 1) {
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
191
if (compressor->options.bits.FBC_SUPPORT &&
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
243
if (compressor->options.bits.FBC_SUPPORT) {
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
427
compressor->base.options.bits.FBC_SUPPORT = true;
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
431
compressor->base.options.bits.DUMMY_BACKEND = false;
drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
439
compressor->base.options.bits.CLK_GATING_DISABLED = false;
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
109
if (cp110->base.options.bits.LPT_MC_CONFIG == 1) {
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
327
if (compressor->options.bits.CLK_GATING_DISABLED == 1) {
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
370
if (compressor->options.bits.FBC_SUPPORT &&
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
371
(compressor->options.bits.DUMMY_BACKEND == 0) &&
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
384
if (compressor->options.bits.LPT_SUPPORT && (paths_num < 2) &&
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
419
if (compressor->options.bits.FBC_SUPPORT &&
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
433
if (compressor->options.bits.LPT_SUPPORT)
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
498
if (compressor->options.bits.LPT_SUPPORT) {
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
665
if (!compressor->options.bits.LPT_SUPPORT)
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
795
compressor->base.options.bits.FBC_SUPPORT = true;
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
796
compressor->base.options.bits.LPT_SUPPORT = true;
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
799
compressor->base.options.bits.DUMMY_BACKEND = false;
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
804
compressor->base.options.bits.LPT_SUPPORT = false;
drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c
806
compressor->base.options.bits.CLK_GATING_DISABLED = false;
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
189
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
196
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
198
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
200
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
201
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_link_encoder.c
209
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
210
if (enc->features.flags.bits.DP_IS_USB_C) {
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
244
if (enc->features.flags.bits.DP_IS_USB_C) {
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
424
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
431
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
433
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
435
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
436
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_link_encoder.c
444
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_afmt.c
61
if (afmt->ctx->dc->debug.enable_mem_low_power.bits.afmt == false)
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_afmt.c
71
if (afmt->ctx->dc->debug.enable_mem_low_power.bits.afmt == false)
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c
56
if (vpg->ctx->dc->debug.enable_mem_low_power.bits.vpg == false)
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c
70
if (vpg->ctx->dc->debug.enable_mem_low_power.bits.vpg == false &&
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1135
training_lane_set.bits.VOLTAGE_SWING_SET =
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1137
training_lane_set.bits.PRE_EMPHASIS_SET =
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1145
training_lane_set.bits.POST_CURSOR2_SET =
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1469
if (enc->features.flags.bits.IS_HBR2_CAPABLE)
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1472
if (enc->features.flags.bits.IS_HBR3_CAPABLE)
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1475
if (enc->features.flags.bits.IS_UHBR10_CAPABLE)
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1478
if (enc->features.flags.bits.IS_UHBR13_5_CAPABLE)
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
1481
if (enc->features.flags.bits.IS_UHBR20_CAPABLE)
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
649
if ((!enc10->base.features.flags.bits.HDMI_6GB_EN ||
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
762
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
769
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
771
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
773
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
774
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c
782
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
291
if (enc->features.flags.bits.DP_IS_USB_C) {
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
483
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
490
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
492
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
494
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
495
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c
503
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
421
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
428
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
430
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
432
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
433
enc10->base.features.flags.bits.IS_DP2_CAPABLE = bp_cap_info.IS_DP2_CAPABLE;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
434
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
435
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
436
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
437
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
440
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = bp_cap_info.IS_HDMI_FRL_CAPABLE;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
441
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
442
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
443
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
451
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
454
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
455
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
456
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
457
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_link_encoder.c
58
if (!enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE)
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
179
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
186
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
188
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
190
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
191
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
193
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = bp_cap_info.IS_HDMI_FRL_CAPABLE;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
194
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
195
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
196
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
204
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
207
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
208
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
209
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn301/dcn301_dio_link_encoder.c
210
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
475
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
482
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
484
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
486
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
487
enc10->base.features.flags.bits.IS_DP2_CAPABLE = bp_cap_info.IS_DP2_CAPABLE;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
488
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
489
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
490
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
491
enc10->base.features.flags.bits.DP_IS_USB_C =
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
493
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = bp_cap_info.IS_HDMI_FRL_CAPABLE;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
494
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
495
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
496
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
504
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
507
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
508
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
509
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
510
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
716
if (!enc->features.flags.bits.DP_IS_USB_C)
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
762
if (!enc->features.flags.bits.DP_IS_USB_C)
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
517
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
525
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
527
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
529
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
530
enc10->base.features.flags.bits.IS_DP2_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
531
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
532
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
533
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
535
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
536
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
537
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
538
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
546
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
549
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
550
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
551
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c
552
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
129
enc10->base.features.flags.bits.DP_IS_USB_C = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
178
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
186
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
188
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
190
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
191
enc10->base.features.flags.bits.IS_DP2_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
192
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
193
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
194
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
195
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
196
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
197
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
198
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
206
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
208
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
209
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
210
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn321/dcn321_dio_link_encoder.c
211
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
205
enc10->base.features.flags.bits.DP_IS_USB_C = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
255
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
263
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
265
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
267
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
268
enc10->base.features.flags.bits.IS_DP2_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
269
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
270
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
271
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
273
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
275
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
276
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
277
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
285
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
287
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
288
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
289
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
290
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
458
enc10->base.features.flags.bits.DP_IS_USB_C = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
508
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
516
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
518
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
520
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
521
enc10->base.features.flags.bits.IS_DP2_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
522
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
523
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
524
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
525
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
527
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
528
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
529
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
537
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
540
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
541
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
542
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_link_encoder.c
543
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
139
enc10->base.features.flags.bits.DP_IS_USB_C = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
189
enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
197
enc10->base.features.flags.bits.IS_HBR2_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
199
enc10->base.features.flags.bits.IS_HBR3_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
201
enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
202
enc10->base.features.flags.bits.IS_DP2_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
203
enc10->base.features.flags.bits.IS_UHBR10_CAPABLE = bp_cap_info.DP_UHBR10_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
204
enc10->base.features.flags.bits.IS_UHBR13_5_CAPABLE = bp_cap_info.DP_UHBR13_5_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
205
enc10->base.features.flags.bits.IS_UHBR20_CAPABLE = bp_cap_info.DP_UHBR20_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
206
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE =
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
208
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = bp_cap_info.FRL_8G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
209
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = bp_cap_info.FRL_10G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
210
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = bp_cap_info.FRL_12G_EN;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
218
enc10->base.features.flags.bits.HDMI_6GB_EN = 0;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
221
enc10->base.features.flags.bits.IS_HDMI_FRL_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
222
enc10->base.features.flags.bits.IS_FRL_8G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
223
enc10->base.features.flags.bits.IS_FRL_10G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c
224
enc10->base.features.flags.bits.IS_FRL_12G_CAPABLE = 1;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1240
pipe->plane_state->update_flags.bits.full_update = 1;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c
17
bool disable_fams2 = !in_dc->debug.fams2_config.bits.enable;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c
655
if (plane_state->cm.flags.bits.lut3d_dma_enable) {
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c
527
(context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable != 0);
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12864
fams2_global_config->features.bits.enable = display_cfg->stage3.fams2_required;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12866
if (fams2_global_config->features.bits.enable) {
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12867
fams2_global_config->features.bits.enable_stall_recovery = true;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12868
fams2_global_config->features.bits.allow_delay_check_mode = FAMS2_ALLOW_DELAY_CHECK_FROM_START;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12908
base_programming->config.bits.is_drr = stream_descriptor->timing.drr_config.enabled;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12923
base_programming->config.bits.min_ttu_vblank_usable = true;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12928
base_programming->config.bits.min_ttu_vblank_usable = false;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12944
base_programming->config.bits.clamp_vtotal_min = true;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12954
base_programming->config.bits.clamp_vtotal_min = true;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12968
base_programming->config.bits.clamp_vtotal_min = display_cfg->display_config.num_streams == 1;
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12986
sub_programming->subvp.config.bits.is_multi_planar =
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12988
sub_programming->subvp.config.bits.is_yuv420 =
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12997
base_programming->config.bits.clamp_vtotal_min = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
493
if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) {
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
498
dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
499
dpp_base->att.cur0_ctl.bits.cur0_enable = cur_en;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
514
dpp_base->att.fp_scale_bias.bits.fp_bias = attr->bias;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
515
dpp_base->att.fp_scale_bias.bits.fp_scale = attr->scale;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
543
dpp_base->pos.cur0_ctl.bits.cur0_enable = 0;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
168
if (dpp->base.ctx->dc->debug.enable_mem_low_power.bits.dscl) {
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
170
dpp->base.deferred_reg_writes.bits.disable_dscl = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
630
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.dscl) {
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c
659
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.dscl)
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c
352
if (cursor_attributes->attribute_flags.bits.ENABLE_CURSOR_DEGAMMA) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1239
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm)
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1434
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm)
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
410
if (cursor_attributes->attribute_flags.bits.ENABLE_CURSOR_DEGAMMA) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
432
dpp_base->att.cur0_ctl.bits.expansion_mode = 0;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
433
dpp_base->att.cur0_ctl.bits.cur0_rom_en = cur_rom_en;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
434
dpp_base->att.cur0_ctl.bits.mode = color_format;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
554
if (dpp_base->deferred_reg_writes.bits.disable_dscl) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
556
dpp_base->deferred_reg_writes.bits.disable_dscl = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
559
if (dpp_base->deferred_reg_writes.bits.disable_gamcor) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
565
dpp_base->deferred_reg_writes.bits.disable_gamcor = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
568
if (dpp_base->deferred_reg_writes.bits.disable_blnd_lut) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
574
dpp_base->deferred_reg_writes.bits.disable_blnd_lut = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
577
if (dpp_base->deferred_reg_writes.bits.disable_3dlut) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
583
dpp_base->deferred_reg_writes.bits.disable_3dlut = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
586
if (dpp_base->deferred_reg_writes.bits.disable_shaper) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
592
dpp_base->deferred_reg_writes.bits.disable_shaper = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
602
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
606
dpp_base->deferred_reg_writes.bits.disable_blnd_lut = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
609
dpp_base->deferred_reg_writes.bits.disable_blnd_lut = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
620
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
624
dpp_base->deferred_reg_writes.bits.disable_3dlut = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
627
dpp_base->deferred_reg_writes.bits.disable_3dlut = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
638
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
642
dpp_base->deferred_reg_writes.bits.disable_shaper = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
645
dpp_base->deferred_reg_writes.bits.disable_shaper = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c
133
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c
139
dpp_base->deferred_reg_writes.bits.disable_gamcor = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c
142
dpp_base->deferred_reg_writes.bits.disable_gamcor = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c
231
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm)
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
120
dpp_base->att.cur0_ctl.bits.expansion_mode = 0;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
121
dpp_base->att.cur0_ctl.bits.cur0_rom_en = cur_rom_en;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
122
dpp_base->att.cur0_ctl.bits.mode = color_format;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
138
if (dpp_base->pos.cur0_ctl.bits.cur0_enable != cur_en) {
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
143
dpp_base->pos.cur0_ctl.bits.cur0_enable = cur_en;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
144
dpp_base->att.cur0_ctl.bits.cur0_enable = cur_en;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
161
dpp_base->att.fp_scale_bias_g_y.bits.fp_bias_g_y = attr->bias;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
162
dpp_base->att.fp_scale_bias_g_y.bits.fp_scale_g_y = attr->scale;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
163
dpp_base->att.fp_scale_bias_rb_crcb.bits.fp_bias_rb_crcb = attr->bias;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
164
dpp_base->att.fp_scale_bias_rb_crcb.bits.fp_scale_rb_crcb = attr->scale;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c
98
if (cursor_attributes->attribute_flags.bits.ENABLE_CURSOR_DEGAMMA) {
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
1122
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.dscl) {
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
1151
if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.dscl)
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
164
dpp->base.deferred_reg_writes.bits.disable_dscl = false;
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
166
if (dpp->base.ctx->dc->debug.enable_mem_low_power.bits.dscl) {
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
168
dpp->base.deferred_reg_writes.bits.disable_dscl = true;
drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
289
dpp_base->pos.cur0_ctl.bits.cur0_enable = 0;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1019
dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1022
dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_2;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1025
dsc_enc_caps->slice_caps.bits.NUM_SLICES_8 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_4;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1028
dsc_enc_caps->slice_caps.bits.NUM_SLICES_16 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_8;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1034
dsc_enc_caps->slice_caps.bits.NUM_SLICES_12 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_4;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1040
dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1043
dsc_enc_caps->slice_caps.bits.NUM_SLICES_8 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_2;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1046
dsc_enc_caps->slice_caps.bits.NUM_SLICES_12 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_3;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1049
dsc_enc_caps->slice_caps.bits.NUM_SLICES_16 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_4;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1171
dsc_common_caps->slice_caps.bits.NUM_SLICES_1 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1172
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1173
dsc_common_caps->slice_caps.bits.NUM_SLICES_2 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1174
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_2;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1175
dsc_common_caps->slice_caps.bits.NUM_SLICES_4 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1176
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_4;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1177
dsc_common_caps->slice_caps.bits.NUM_SLICES_8 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1178
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_8;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1179
dsc_common_caps->slice_caps.bits.NUM_SLICES_12 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1180
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_12;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1181
dsc_common_caps->slice_caps.bits.NUM_SLICES_16 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1182
dsc_sink_caps->slice_caps2.bits.NUM_SLICES_16 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_16;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1203
if (dsc_common_caps->slice_caps.bits.NUM_SLICES_1)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1206
if (dsc_common_caps->slice_caps.bits.NUM_SLICES_2)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1209
if (dsc_common_caps->slice_caps.bits.NUM_SLICES_4)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1576
if (slice_caps.bits.NUM_SLICES_1)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1579
if (slice_caps.bits.NUM_SLICES_2)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1582
if (slice_caps.bits.NUM_SLICES_4)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1585
if (slice_caps.bits.NUM_SLICES_8)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1588
if (slice_caps.bits.NUM_SLICES_12)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1591
if (slice_caps.bits.NUM_SLICES_16)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1784
is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.RGB;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1789
is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_444;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1795
is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_SIMPLE_422;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1799
is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_422;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1805
is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_420;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1823
is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_8_BPC;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1826
is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_10_BPC;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1829
is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_12_BPC;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
1910
if (dsc_common_caps.slice_caps.bits.NUM_SLICES_12)
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
839
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
844
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
845
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
850
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
851
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
852
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
857
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
858
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
859
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
860
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
865
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
866
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
867
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
868
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
873
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
874
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
875
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
876
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
877
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
882
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
883
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
884
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
885
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
886
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
892
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
893
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
894
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
895
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
896
dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
903
dsc_sink_caps->color_formats.bits.RGB = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
904
dsc_sink_caps->color_formats.bits.YCBCR_444 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
905
dsc_sink_caps->color_formats.bits.YCBCR_NATIVE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
906
dsc_sink_caps->color_formats.bits.YCBCR_NATIVE_420 =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
908
dsc_sink_caps->color_depth.bits.COLOR_DEPTH_8_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
909
dsc_sink_caps->color_depth.bits.COLOR_DEPTH_10_BPC =
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
911
dsc_sink_caps->color_depth.bits.COLOR_DEPTH_12_BPC =
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
100
dsc_enc_caps->color_formats.bits.RGB = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
101
dsc_enc_caps->color_formats.bits.YCBCR_444 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
102
dsc_enc_caps->color_formats.bits.YCBCR_SIMPLE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
103
dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
104
dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_420 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
106
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_8_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
107
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_10_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
108
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_12_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
121
dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 0;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
122
dsc_enc_caps->slice_caps.bits.NUM_SLICES_8 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
130
dsc_enc_caps->slice_caps.bits.NUM_SLICES_12 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
131
dsc_enc_caps->slice_caps.bits.NUM_SLICES_16 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
92
dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
93
dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
94
dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c
95
dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
120
dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
121
dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
122
dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
123
dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
128
dsc_enc_caps->color_formats.bits.RGB = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
129
dsc_enc_caps->color_formats.bits.YCBCR_444 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
130
dsc_enc_caps->color_formats.bits.YCBCR_SIMPLE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
131
dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
132
dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_420 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
134
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_8_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
135
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_10_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c
136
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_12_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
70
dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
71
dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
72
dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
73
dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
78
dsc_enc_caps->color_formats.bits.RGB = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
79
dsc_enc_caps->color_formats.bits.YCBCR_444 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
80
dsc_enc_caps->color_formats.bits.YCBCR_SIMPLE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
81
dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_422 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
82
dsc_enc_caps->color_formats.bits.YCBCR_NATIVE_420 = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
84
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_8_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
85
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_10_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c
86
dsc_enc_caps->color_depth.bits.COLOR_DEPTH_12_BPC = 1;
drivers/gpu/drm/amd/display/dc/dsc/dsc.h
91
} bits;
drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c
532
.bits.dchubbub);
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1065
if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) {
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1090
hubp->pos.cur_ctl.bits.cur_enable = cur_en;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1091
hubp->pos.position.bits.x_pos = pos->x;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1092
hubp->pos.position.bits.y_pos = pos->y;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1093
hubp->pos.hot_spot.bits.x_hot = pos->x_hotspot;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1094
hubp->pos.hot_spot.bits.y_hot = pos->y_hotspot;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1095
hubp->pos.dst_offset.bits.dst_x_offset = dst_x_offset;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
630
CURSOR_2X_MAGNIFY, attr->attribute_flags.bits.ENABLE_MAGNIFICATION,
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
643
hubp->att.size.bits.width = attr->width;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
644
hubp->att.size.bits.height = attr->height;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
645
hubp->att.cur_ctl.bits.mode = attr->color_format;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
650
hubp->att.cur_ctl.bits.pitch = hw_pitch;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
651
hubp->att.cur_ctl.bits.line_per_chunk = lpc;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
652
hubp->att.cur_ctl.bits.cur_2x_magnify = attr->attribute_flags.bits.ENABLE_MAGNIFICATION;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
653
hubp->att.settings.bits.dst_y_offset = 0;
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
654
hubp->att.settings.bits.chunk_hdl_adjust = 3;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
155
CURSOR_2X_MAGNIFY, attr->attribute_flags.bits.ENABLE_MAGNIFICATION,
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
169
hubp->att.size.bits.width = attr->width;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
170
hubp->att.size.bits.height = attr->height;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
171
hubp->att.cur_ctl.bits.mode = attr->color_format;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
176
hubp->att.cur_ctl.bits.pitch = hw_pitch;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
177
hubp->att.cur_ctl.bits.line_per_chunk = lpc;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
178
hubp->att.cur_ctl.bits.cur_2x_magnify = attr->attribute_flags.bits.ENABLE_MAGNIFICATION;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
179
hubp->att.settings.bits.dst_y_offset = 0;
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
180
hubp->att.settings.bits.chunk_hdl_adjust = 3;
drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c
52
hubp35_set_fgcg(hubp, hubp->ctx->dc->debug.enable_fine_grain_clock_gating.bits.dchub);
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
770
(1 + hubp->curs_attr.attribute_flags.bits.ENABLE_MAGNIFICATION);
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
784
if (hubp->pos.cur_ctl.bits.cur_enable != cur_en) {
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
806
hubp->pos.cur_ctl.bits.cur_enable = cur_en;
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
807
hubp->pos.position.bits.x_pos = pos->x;
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
808
hubp->pos.position.bits.y_pos = pos->y;
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
809
hubp->pos.hot_spot.bits.x_hot = pos->x_hotspot;
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
810
hubp->pos.hot_spot.bits.y_hot = pos->y_hotspot;
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
811
hubp->pos.dst_offset.bits.dst_x_offset = dst_x_offset;
drivers/gpu/drm/amd/display/dc/hubp/dcn42/dcn42_hubp.c
30
hubp42_set_fgcg(hubp, hubp->ctx->dc->debug.enable_fine_grain_clock_gating.bits.dchub);
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1000
unsigned int post_T7_delay = (link->dpcd_sink_ext_caps.bits.oled ? OLED_POST_T7_DELAY : 0);
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1010
if (link->panel_cntl && !(link->dpcd_sink_ext_caps.bits.oled ||
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1011
link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 ||
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1012
link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1)) {
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1089
if (enable && link->dpcd_sink_ext_caps.bits.oled &&
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1096
if (link->dpcd_sink_ext_caps.bits.oled ||
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1097
link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 ||
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1098
link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1)
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
3188
if (pipe_ctx->plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
3189
pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
3190
pipe_ctx->plane_state->update_flags.bits.gamma_change)
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
3193
if (pipe_ctx->plane_state->update_flags.bits.full_update)
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
999
unsigned int pre_T11_delay = (link->dpcd_sink_ext_caps.bits.oled ? OLED_PRE_T11_DELAY : 0);
drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c
335
if (pipe_ctx->plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c
336
pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c
337
pipe_ctx->plane_state->update_flags.bits.gamma_change)
drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c
340
if (pipe_ctx->plane_state->update_flags.bits.full_update)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2300
hw_locks.bits.lock_cursor = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2984
if (!pipe_ctx->plane_state->update_flags.bits.full_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3044
if (plane_state->update_flags.bits.full_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3099
if (plane_state->update_flags.bits.full_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3116
if (plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3117
plane_state->update_flags.bits.bpp_change)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3120
if (plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3121
plane_state->update_flags.bits.per_pixel_alpha_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3122
plane_state->update_flags.bits.global_alpha_change)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3125
if (plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3126
plane_state->update_flags.bits.per_pixel_alpha_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3127
plane_state->update_flags.bits.global_alpha_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3128
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3129
plane_state->update_flags.bits.position_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3133
if (plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3134
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3135
plane_state->update_flags.bits.position_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3153
if (plane_state->update_flags.bits.full_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3164
if (plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3165
plane_state->update_flags.bits.pixel_format_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3166
plane_state->update_flags.bits.horizontal_mirror_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3167
plane_state->update_flags.bits.rotation_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3168
plane_state->update_flags.bits.swizzle_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3169
plane_state->update_flags.bits.dcc_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3170
plane_state->update_flags.bits.bpp_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3171
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3172
plane_state->update_flags.bits.plane_size_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3281
if (pipe_ctx->plane_state->update_flags.bits.full_update)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3288
if (pipe_ctx->plane_state->update_flags.bits.full_update ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3289
pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3290
pipe_ctx->plane_state->update_flags.bits.gamma_change)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3299
if (pipe_ctx->plane_state->update_flags.bits.full_update)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3355
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3359
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1099
if (plane_state->lut3d_func.state.bits.initialized == 1)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1460
hw_locks.bits.lock_pipe = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1464
hw_locks.bits.triple_buffer_lock = pipe->plane_state->triplebuffer_flips;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1506
new_pipe->update_flags.bits.disable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1513
new_pipe->update_flags.bits.odm = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1520
new_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1521
new_pipe->update_flags.bits.mpcc = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1522
new_pipe->update_flags.bits.dppclk = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1523
new_pipe->update_flags.bits.hubp_interdependent = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1524
new_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1525
new_pipe->update_flags.bits.unbounded_req = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1526
new_pipe->update_flags.bits.gamut_remap = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1527
new_pipe->update_flags.bits.scaler = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1528
new_pipe->update_flags.bits.viewport = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1529
new_pipe->update_flags.bits.det_size = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1533
new_pipe->update_flags.bits.test_pattern_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1535
new_pipe->update_flags.bits.odm = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1536
new_pipe->update_flags.bits.global_sync = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1547
new_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1554
new_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1557
new_pipe->update_flags.bits.disable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1563
new_pipe->update_flags.bits.plane_changed = true;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1573
new_pipe->update_flags.bits.global_sync = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1577
new_pipe->update_flags.bits.det_size = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1587
new_pipe->update_flags.bits.opp_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1589
new_pipe->update_flags.bits.tg_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1598
new_pipe->update_flags.bits.mpcc = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1602
new_pipe->update_flags.bits.dppclk = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1606
new_pipe->update_flags.bits.scaler = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1611
new_pipe->update_flags.bits.viewport = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1657
new_pipe->update_flags.bits.hubp_interdependent = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1663
new_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1667
new_pipe->update_flags.bits.unbounded_req = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1671
new_pipe->update_flags.bits.test_pattern_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1688
if (pipe_ctx->update_flags.bits.dppclk)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1691
if (pipe_ctx->update_flags.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1699
if (pipe_ctx->update_flags.bits.hubp_rq_dlg_ttu) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1718
if (pipe_ctx->update_flags.bits.unbounded_req && hubp->funcs->set_unbounded_requesting)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1721
if (pipe_ctx->update_flags.bits.hubp_interdependent) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1734
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1735
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1736
plane_state->update_flags.bits.bpp_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1737
plane_state->update_flags.bits.input_csc_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1738
plane_state->update_flags.bits.color_space_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1739
plane_state->update_flags.bits.coeff_reduction_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1761
if (pipe_ctx->update_flags.bits.mpcc
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1762
|| pipe_ctx->update_flags.bits.plane_changed
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1763
|| plane_state->update_flags.bits.global_alpha_change
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1764
|| plane_state->update_flags.bits.per_pixel_alpha_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1769
if (pipe_ctx->update_flags.bits.scaler ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1770
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1771
plane_state->update_flags.bits.position_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1772
plane_state->update_flags.bits.per_pixel_alpha_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1773
pipe_ctx->stream->update_flags.bits.scaling) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1781
if (pipe_ctx->update_flags.bits.viewport ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1782
(context == dc->current_state && plane_state->update_flags.bits.position_change) ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1783
(context == dc->current_state && plane_state->update_flags.bits.scaling_change) ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1784
(context == dc->current_state && pipe_ctx->stream->update_flags.bits.scaling)) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1797
if ((pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1798
pipe_ctx->update_flags.bits.scaler || viewport_changed == true) &&
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1812
if (pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1813
|| pipe_ctx->update_flags.bits.plane_changed
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1814
|| pipe_ctx->stream->update_flags.bits.gamut_remap
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1815
|| plane_state->update_flags.bits.gamut_remap_change
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1816
|| pipe_ctx->stream->update_flags.bits.out_csc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1828
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1829
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1830
pipe_ctx->update_flags.bits.opp_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1831
plane_state->update_flags.bits.pixel_format_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1832
plane_state->update_flags.bits.horizontal_mirror_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1833
plane_state->update_flags.bits.rotation_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1834
plane_state->update_flags.bits.swizzle_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1835
plane_state->update_flags.bits.dcc_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1836
plane_state->update_flags.bits.bpp_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1837
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1838
plane_state->update_flags.bits.plane_size_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1854
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1855
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1856
plane_state->update_flags.bits.addr_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1869
if (pipe_ctx->update_flags.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1935
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1936
pipe_ctx->update_flags.bits.odm ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1937
pipe_ctx->stream->update_flags.bits.abm_level)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1944
if (pipe_ctx->update_flags.bits.global_sync && !pipe_ctx->top_pipe
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1948
if (pipe_ctx->update_flags.bits.odm)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1951
if (pipe_ctx->update_flags.bits.enable) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1961
if (pipe_ctx->update_flags.bits.det_size) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1976
if (pipe_ctx->plane_state && (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1977
pipe_ctx->plane_state->update_flags.bits.hdr_mult))
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1981
(pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1982
pipe_ctx->plane_state->update_flags.bits.gamma_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1983
pipe_ctx->plane_state->update_flags.bits.lut_3d ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1984
pipe_ctx->update_flags.bits.enable))
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1991
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1992
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1993
pipe_ctx->stream->update_flags.bits.out_tf)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2001
if (pipe_ctx->update_flags.bits.enable
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2002
|| pipe_ctx->update_flags.bits.opp_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2025
if (pipe_ctx->update_flags.bits.test_pattern_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2098
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable && stream &&
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2112
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2120
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2121
|| context->res_ctx.pipe_ctx[i].update_flags.bits.opp_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2130
if ((context->res_ctx.pipe_ctx[i].update_flags.bits.disable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2151
pipe->update_flags.bits.odm &&
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2260
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable)
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2272
if (pipe->plane_state && !pipe->top_pipe && pipe->update_flags.bits.enable &&
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
3001
if (!pipe_ctx->plane_state->update_flags.bits.full_update &&
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
3002
!pipe_ctx->update_flags.bits.mpcc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
488
if (!pipe_ctx->plane_state->update_flags.bits.full_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
281
stream->lut3d_func->state.bits.initialized == 1 &&
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
282
stream->lut3d_func->state.bits.rmu_idx_valid == 1) {
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
283
if (stream->lut3d_func->state.bits.rmu_mux_num == 0)
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
284
mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu0_mux;
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
285
else if (stream->lut3d_func->state.bits.rmu_mux_num == 1)
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
286
mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu1_mux;
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
287
else if (stream->lut3d_func->state.bits.rmu_mux_num == 2)
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
288
mpcc_id_projected = stream->lut3d_func->state.bits.mpc_rmu2_mux;
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
295
stream->lut3d_func->state.bits.rmu_mux_num);
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
296
if (acquired_rmu != stream->lut3d_func->state.bits.rmu_mux_num)
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
300
stream->lut3d_func->state.bits.rmu_mux_num);
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
305
stream->lut3d_func->state.bits.rmu_mux_num);
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
667
if (dc->debug.enable_mem_low_power.bits.dmcu) {
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
675
if (dc->debug.enable_mem_low_power.bits.optc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
680
if (dc->debug.enable_mem_low_power.bits.vga) {
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
100
if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerdown) {
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
245
dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, dc->debug.enable_mem_low_power.bits.i2c);
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
293
if (hws->ctx->dc->debug.root_clock_optimization.bits.dsc &&
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
336
if (hws->ctx->dc->debug.root_clock_optimization.bits.dsc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
77
if (dc->debug.enable_mem_low_power.bits.dmcu) {
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
85
if (dc->debug.enable_mem_low_power.bits.optc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
90
if (dc->debug.enable_mem_low_power.bits.vga) {
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
95
if (dc->debug.enable_mem_low_power.bits.mpc &&
drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c
235
if (hws->ctx->dc->debug.root_clock_optimization.bits.dsc &&
drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c
289
if (hws->ctx->dc->debug.root_clock_optimization.bits.dsc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c
460
if (!hws->ctx->dc->debug.root_clock_optimization.bits.dpp)
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1010
dc->debug.fams2_config.bits.enable &= true;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1014
dc->debug.fams2_config.bits.enable = false;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1466
if (pipe->plane_state && pipe->plane_state->update_flags.bits.position_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1474
phantom_pipe->plane_state->update_flags.bits.position_change = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1491
phantom_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1492
phantom_pipe->update_flags.bits.mpcc = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1493
phantom_pipe->update_flags.bits.dppclk = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1494
phantom_pipe->update_flags.bits.hubp_interdependent = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1495
phantom_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1496
phantom_pipe->update_flags.bits.gamut_remap = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1497
phantom_pipe->update_flags.bits.scaler = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1498
phantom_pipe->update_flags.bits.viewport = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1499
phantom_pipe->update_flags.bits.det_size = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1501
phantom_pipe->update_flags.bits.odm = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1502
phantom_pipe->update_flags.bits.global_sync = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
420
hw_lock_cmd.bits.command_code = DMUB_INBOX0_CMD__HW_LOCK;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
421
hw_lock_cmd.bits.hw_lock_client = HW_LOCK_CLIENT_DRIVER;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
422
hw_lock_cmd.bits.lock = lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
423
hw_lock_cmd.bits.should_release = !lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
438
hw_lock_cmd.bits.command_code = DMUB_INBOX0_CMD__HW_LOCK;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
439
hw_lock_cmd.bits.hw_lock_client = HW_LOCK_CLIENT_DRIVER;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
440
hw_lock_cmd.bits.lock = lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
441
hw_lock_cmd.bits.should_release = !lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
469
stream->lut3d_func->state.bits.initialized == 1) {
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
521
if (plane_state->lut3d_func.state.bits.initialized == 1)
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
814
if (dc->debug.enable_mem_low_power.bits.optc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
819
if (dc->debug.enable_mem_low_power.bits.vga) {
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
101
if (dc->debug.enable_mem_low_power.bits.mpc &&
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
105
if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerdown) {
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1747
p->CURSOR0_0_CURSOR_SIZE__CURSOR_WIDTH = hubp->att.size.bits.width;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1748
p->CURSOR0_0_CURSOR_SIZE__CURSOR_HEIGHT = hubp->att.size.bits.height;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1749
p->CURSOR0_0_CURSOR_POSITION__CURSOR_X_POSITION = hubp->pos.position.bits.x_pos;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1750
p->CURSOR0_0_CURSOR_POSITION__CURSOR_Y_POSITION = hubp->pos.position.bits.y_pos;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1751
p->CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X = hubp->pos.hot_spot.bits.x_hot;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1752
p->CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y = hubp->pos.hot_spot.bits.y_hot;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1753
p->CURSOR0_0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET = hubp->pos.dst_offset.bits.dst_x_offset;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1754
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_ENABLE = hubp->pos.cur_ctl.bits.cur_enable;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1755
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE = hubp->att.cur_ctl.bits.mode;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1756
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY = hubp->pos.cur_ctl.bits.cur_2x_magnify;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1757
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH = hubp->att.cur_ctl.bits.pitch;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1758
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK = hubp->att.cur_ctl.bits.line_per_chunk;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1760
p->CNVC_CUR0_CURSOR0_CONTROL__CUR0_ENABLE = dpp->att.cur0_ctl.bits.cur0_enable;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1761
p->CNVC_CUR0_CURSOR0_CONTROL__CUR0_MODE = dpp->att.cur0_ctl.bits.mode;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1762
p->CNVC_CUR0_CURSOR0_CONTROL__CUR0_EXPANSION_MODE = dpp->att.cur0_ctl.bits.expansion_mode;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1763
p->CNVC_CUR0_CURSOR0_CONTROL__CUR0_ROM_EN = dpp->att.cur0_ctl.bits.cur0_rom_en;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1766
p->CNVC_CUR0_CURSOR0_FP_SCALE_BIAS__CUR0_FP_BIAS = dpp->att.fp_scale_bias.bits.fp_bias;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1767
p->CNVC_CUR0_CURSOR0_FP_SCALE_BIAS__CUR0_FP_SCALE = dpp->att.fp_scale_bias.bits.fp_scale;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1769
p->HUBPREQ0_CURSOR_SETTINGS__CURSOR0_DST_Y_OFFSET = hubp->att.settings.bits.dst_y_offset;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
1770
p->HUBPREQ0_CURSOR_SETTINGS__CURSOR0_CHUNK_HDL_ADJUST = hubp->att.settings.bits.chunk_hdl_adjust;
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
280
dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, !dc->debug.enable_mem_low_power.bits.i2c);
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
490
if (!hws->ctx->dc->debug.root_clock_optimization.bits.dpp)
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
501
if (!hws->ctx->dc->debug.root_clock_optimization.bits.dpstream)
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
512
if (!hws->ctx->dc->debug.root_clock_optimization.bits.hdmistream)
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
523
if (!hws->ctx->dc->debug.root_clock_optimization.bits.physymclk)
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
83
if (dc->debug.enable_mem_low_power.bits.dmcu) {
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
91
if (dc->debug.enable_mem_low_power.bits.optc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
96
if (dc->debug.enable_mem_low_power.bits.vga) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1223
if (hubp->curs_attr.attribute_flags.bits.ENABLE_MAGNIFICATION)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1244
if (hubp->curs_attr.attribute_flags.bits.ENABLE_MAGNIFICATION)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1267
if (hubp->curs_attr.attribute_flags.bits.ENABLE_MAGNIFICATION)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1431
pipe_ctx->plane_state->update_flags.bits.addr_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1493
if (dc->debug.fams2_config.bits.enable) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1514
if (dc->debug.fams2_config.bits.enable) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1570
if (!dc->debug.fams2_config.bits.enable && !dc_dmub_srv_is_cursor_offload_enabled(dc))
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1573
hw_lock_cmd.bits.command_code = DMUB_INBOX0_CMD__HW_LOCK;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1574
hw_lock_cmd.bits.hw_lock_client = HW_LOCK_CLIENT_DRIVER;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1575
hw_lock_cmd.bits.lock = lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1576
hw_lock_cmd.bits.should_release = !lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1588
hw_lock_cmd.bits.command_code = DMUB_INBOX0_CMD__HW_LOCK;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1589
hw_lock_cmd.bits.hw_lock_client = HW_LOCK_CLIENT_DRIVER;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1590
hw_lock_cmd.bits.lock = lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1591
hw_lock_cmd.bits.should_release = !lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1602
if (!dc->ctx || !dc->ctx->dmub_srv || !dc->debug.fams2_config.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1605
fams2_enabled = context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable != 0u;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1606
fams2_legacy_no_fams2 = context->bw_ctx.bw.dcn.fams2_global_config.features.bits.legacy_method_no_fams2 != 0u;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
172
if (dc->debug.enable_mem_low_power.bits.optc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
177
if (dc->debug.enable_mem_low_power.bits.vga) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1869
if (dc->ctx->dmub_srv && dc->debug.fams2_config.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1877
dc->current_state->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable) &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
1891
if (dc->ctx->dmub_srv && dc->debug.fams2_config.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2243
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2244
pipe_ctx->update_flags.bits.odm ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2245
pipe_ctx->stream->update_flags.bits.abm_level)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2252
if (pipe_ctx->update_flags.bits.global_sync && !pipe_ctx->top_pipe
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2256
if (pipe_ctx->update_flags.bits.odm)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2259
if (pipe_ctx->update_flags.bits.enable) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2269
if (pipe_ctx->update_flags.bits.det_size) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2283
if (pipe_ctx->plane_state && (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2284
pipe_ctx->plane_state->update_flags.bits.hdr_mult))
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2288
(pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2289
pipe_ctx->plane_state->update_flags.bits.gamma_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2290
pipe_ctx->plane_state->update_flags.bits.lut_3d ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2291
pipe_ctx->update_flags.bits.enable))
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2298
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2299
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2300
pipe_ctx->stream->update_flags.bits.out_tf)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2308
if (pipe_ctx->update_flags.bits.enable
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2309
|| pipe_ctx->update_flags.bits.opp_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2332
if (pipe_ctx->update_flags.bits.test_pattern_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2349
&& pipe_ctx->plane_state->update_flags.bits.cm_hist_change
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2373
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2374
pipe_ctx->update_flags.bits.odm ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2375
pipe_ctx->stream->update_flags.bits.abm_level) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2384
if (pipe_ctx->update_flags.bits.global_sync && !pipe_ctx->top_pipe
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2407
if (pipe_ctx->update_flags.bits.odm) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2412
if (pipe_ctx->update_flags.bits.enable) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2417
if (pipe_ctx->update_flags.bits.det_size) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2437
if (pipe_ctx->plane_state && (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2438
pipe_ctx->plane_state->update_flags.bits.hdr_mult)) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2444
(pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2445
pipe_ctx->plane_state->update_flags.bits.gamma_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2446
pipe_ctx->plane_state->update_flags.bits.lut_3d ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2447
pipe_ctx->update_flags.bits.enable)) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2456
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2457
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2458
pipe_ctx->stream->update_flags.bits.out_tf) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2467
if (pipe_ctx->update_flags.bits.enable
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2468
|| pipe_ctx->update_flags.bits.opp_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2486
if (pipe_ctx->update_flags.bits.test_pattern_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2504
&& pipe_ctx->plane_state->update_flags.bits.cm_hist_change
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2567
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable && stream &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2581
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2589
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2590
|| context->res_ctx.pipe_ctx[i].update_flags.bits.opp_changed) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2599
if ((context->res_ctx.pipe_ctx[i].update_flags.bits.disable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2620
pipe->update_flags.bits.odm &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2692
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2704
if (pipe->plane_state && !pipe->top_pipe && pipe->update_flags.bits.enable &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2888
new_pipe->update_flags.bits.disable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2895
new_pipe->update_flags.bits.odm = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2902
new_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2903
new_pipe->update_flags.bits.mpcc = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2904
new_pipe->update_flags.bits.dppclk = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2905
new_pipe->update_flags.bits.hubp_interdependent = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2906
new_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2907
new_pipe->update_flags.bits.unbounded_req = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2908
new_pipe->update_flags.bits.gamut_remap = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2909
new_pipe->update_flags.bits.scaler = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2910
new_pipe->update_flags.bits.viewport = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2911
new_pipe->update_flags.bits.det_size = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2915
new_pipe->update_flags.bits.test_pattern_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2917
new_pipe->update_flags.bits.odm = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2918
new_pipe->update_flags.bits.global_sync = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2929
new_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2936
new_pipe->update_flags.bits.enable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2939
new_pipe->update_flags.bits.disable = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2945
new_pipe->update_flags.bits.plane_changed = true;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2954
new_pipe->update_flags.bits.global_sync = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2958
new_pipe->update_flags.bits.det_size = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2968
new_pipe->update_flags.bits.opp_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2970
new_pipe->update_flags.bits.tg_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2979
new_pipe->update_flags.bits.mpcc = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2983
new_pipe->update_flags.bits.dppclk = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2987
new_pipe->update_flags.bits.scaler = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2992
new_pipe->update_flags.bits.viewport = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3039
new_pipe->update_flags.bits.hubp_interdependent = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3045
new_pipe->update_flags.bits.hubp_rq_dlg_ttu = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3049
new_pipe->update_flags.bits.unbounded_req = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3053
new_pipe->update_flags.bits.test_pattern_changed = 1;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3111
p->CURSOR0_0_CURSOR_SIZE__CURSOR_WIDTH = hubp->att.size.bits.width;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3112
p->CURSOR0_0_CURSOR_SIZE__CURSOR_HEIGHT = hubp->att.size.bits.height;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3113
p->CURSOR0_0_CURSOR_POSITION__CURSOR_X_POSITION = hubp->pos.position.bits.x_pos;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3114
p->CURSOR0_0_CURSOR_POSITION__CURSOR_Y_POSITION = hubp->pos.position.bits.y_pos;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3115
p->CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X = hubp->pos.hot_spot.bits.x_hot;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3116
p->CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y = hubp->pos.hot_spot.bits.y_hot;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3117
p->CURSOR0_0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET = hubp->pos.dst_offset.bits.dst_x_offset;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3118
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_ENABLE = hubp->pos.cur_ctl.bits.cur_enable;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3119
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE = hubp->att.cur_ctl.bits.mode;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3120
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY = hubp->pos.cur_ctl.bits.cur_2x_magnify;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3121
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH = hubp->att.cur_ctl.bits.pitch;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3122
p->CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK = hubp->att.cur_ctl.bits.line_per_chunk;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3124
p->CM_CUR0_CURSOR0_CONTROL__CUR0_ENABLE = dpp->att.cur0_ctl.bits.cur0_enable;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3125
p->CM_CUR0_CURSOR0_CONTROL__CUR0_MODE = dpp->att.cur0_ctl.bits.mode;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3126
p->CM_CUR0_CURSOR0_CONTROL__CUR0_EXPANSION_MODE = dpp->att.cur0_ctl.bits.expansion_mode;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3127
p->CM_CUR0_CURSOR0_CONTROL__CUR0_ROM_EN = dpp->att.cur0_ctl.bits.cur0_rom_en;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3132
dpp->att.fp_scale_bias_g_y.bits.fp_bias_g_y;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3134
dpp->att.fp_scale_bias_g_y.bits.fp_scale_g_y;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3136
dpp->att.fp_scale_bias_rb_crcb.bits.fp_bias_rb_crcb;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3138
dpp->att.fp_scale_bias_rb_crcb.bits.fp_scale_rb_crcb;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3140
p->HUBPREQ0_CURSOR_SETTINGS__CURSOR0_DST_Y_OFFSET = hubp->att.settings.bits.dst_y_offset;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3141
p->HUBPREQ0_CURSOR_SETTINGS__CURSOR0_CHUNK_HDL_ADJUST = hubp->att.settings.bits.chunk_hdl_adjust;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3708
if (pipe_ctx->update_flags.bits.dppclk)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3712
if (pipe_ctx->update_flags.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3716
if (pipe_ctx->update_flags.bits.hubp_rq_dlg_ttu) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3730
if (pipe_ctx->update_flags.bits.unbounded_req && hubp->funcs->set_unbounded_requesting)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3734
if (pipe_ctx->update_flags.bits.hubp_interdependent) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3742
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3743
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3744
plane_state->update_flags.bits.bpp_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3745
plane_state->update_flags.bits.input_csc_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3746
plane_state->update_flags.bits.color_space_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3747
plane_state->update_flags.bits.coeff_reduction_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3762
if (pipe_ctx->update_flags.bits.mpcc ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3763
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3764
plane_state->update_flags.bits.global_alpha_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3765
plane_state->update_flags.bits.per_pixel_alpha_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3773
if (pipe_ctx->update_flags.bits.scaler ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3774
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3775
plane_state->update_flags.bits.position_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3776
plane_state->update_flags.bits.per_pixel_alpha_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3777
pipe_ctx->stream->update_flags.bits.scaling) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3784
if (pipe_ctx->update_flags.bits.viewport ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3785
(context == dc->current_state && plane_state->update_flags.bits.position_change) ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3786
(context == dc->current_state && plane_state->update_flags.bits.scaling_change) ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3787
(context == dc->current_state && pipe_ctx->stream->update_flags.bits.scaling)) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3798
if ((pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3799
pipe_ctx->update_flags.bits.scaler || viewport_changed == true) &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3815
if (pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3816
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3817
pipe_ctx->stream->update_flags.bits.gamut_remap ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3818
plane_state->update_flags.bits.gamut_remap_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3819
pipe_ctx->stream->update_flags.bits.out_csc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3830
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3831
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3832
pipe_ctx->update_flags.bits.opp_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3833
plane_state->update_flags.bits.pixel_format_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3834
plane_state->update_flags.bits.horizontal_mirror_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3835
plane_state->update_flags.bits.rotation_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3836
plane_state->update_flags.bits.swizzle_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3837
plane_state->update_flags.bits.dcc_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3838
plane_state->update_flags.bits.bpp_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3839
plane_state->update_flags.bits.scaling_change ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3840
plane_state->update_flags.bits.plane_size_change) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3852
if (pipe_ctx->update_flags.bits.enable ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3853
pipe_ctx->update_flags.bits.plane_changed ||
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3854
plane_state->update_flags.bits.addr_update) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3867
if (pipe_ctx->update_flags.bits.enable)
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3927
if (!pipe_ctx->plane_state->update_flags.bits.full_update &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3928
!pipe_ctx->update_flags.bits.mpcc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
394
dc->debug.fams2_config.bits.enable &=
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
398
if ((!dc->debug.fams2_config.bits.enable || dchub_ref_freq_changed) &&
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
512
if (mcm_luts.lut3d_data.lut3d_func && mcm_luts.lut3d_data.lut3d_func->state.bits.initialized) {
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
696
if (plane_state->lut3d_func.state.bits.initialized == 1)
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1496
if (!dc->debug.fams2_config.bits.enable && !dc_dmub_srv_is_cursor_offload_enabled(dc)
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1500
hw_lock_cmd.bits.command_code = DMUB_INBOX0_CMD__HW_LOCK;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1501
hw_lock_cmd.bits.hw_lock_client = HW_LOCK_CLIENT_DRIVER;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1502
hw_lock_cmd.bits.lock = lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1503
hw_lock_cmd.bits.should_release = !lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1515
hw_lock_cmd.bits.command_code = DMUB_INBOX0_CMD__HW_LOCK;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1516
hw_lock_cmd.bits.hw_lock_client = HW_LOCK_CLIENT_DRIVER;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1517
hw_lock_cmd.bits.lock = lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
1518
hw_lock_cmd.bits.should_release = !lock;
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
279
dc->debug.fams2_config.bits.enable &=
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
284
if ((!dc->debug.fams2_config.bits.enable || dchub_ref_freq_changed) &&
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
351
if (!pipe_ctx->plane_state->update_flags.bits.full_update &&
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
352
!pipe_ctx->update_flags.bits.mpcc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
785
if (mcm_luts.lut3d_data.lut3d_func && mcm_luts.lut3d_data.lut3d_func->state.bits.initialized) {
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
92
if (dc->debug.enable_mem_low_power.bits.optc) {
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
937
if (plane_state->lut3d_func.state.bits.initialized == 1)
drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c
97
if (dc->debug.enable_mem_low_power.bits.vga) {
drivers/gpu/drm/amd/display/dc/inc/compressor.h
133
} bits;
drivers/gpu/drm/amd/display/dc/inc/compressor.h
95
} bits;
drivers/gpu/drm/amd/display/dc/inc/core_types.h
432
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h
86
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
104
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
111
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
19
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
28
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
35
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
42
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
55
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
63
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
83
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
97
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
65
} bits;
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
77
} bits;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
218
channel_count = min(dpcd_test_mode.bits.channel_count + 1, AUDIO_CHANNELS_COUNT);
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
238
link->audio_test_data.sampling_rate = (uint8_t)dpcd_test_mode.bits.sampling_rate;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
244
link->audio_test_data.pattern_period[modes] = dpcd_pattern_period[modes].bits.pattern_period;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
309
switch (dpcd_test_pattern.bits.PATTERN) {
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
420
(dpcd_lane_adjust.bits.VOLTAGE_SWING_LANE);
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
423
(dpcd_lane_adjust.bits.PRE_EMPHASIS_LANE);
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
569
if (test_request.bits.LINK_TRAINING) {
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
571
test_response.bits.ACK = 1;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
579
test_response.bits.ACK = 0;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
581
if (test_request.bits.LINK_TEST_PATTRN) {
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
599
test_response.bits.ACK = dm_helpers_dp_handle_test_pattern_request(link->ctx, link,
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
603
if (test_request.bits.AUDIO_TEST_PATTERN) {
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
604
dp_test_get_audio_test_data(link, test_request.bits.TEST_AUDIO_DISABLED_VIDEO);
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
605
test_response.bits.ACK = 1;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
608
if (test_request.bits.PHY_TEST_PATTERN) {
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
610
test_response.bits.ACK = 1;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
614
if (test_response.bits.ACK)
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
860
hw_locks.bits.lock_dig = 1;
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
908
hw_locks.bits.lock_dig = 1;
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
135
link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP);
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
83
if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED)
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c
130
if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED)
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1077
(link->dpcd_sink_ext_caps.bits.oled == 1)) {
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1164
link->link_enc->features.flags.bits.DP_IS_USB_C == 1) {
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1183
link->dpcd_caps.sink_count.bits.SINK_COUNT == 0) {
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1202
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1203
&& link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1204
&& link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support) {
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1206
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc = false;
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1219
if (link->dpcd_caps.sink_count.bits.SINK_COUNT)
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1221
link->dpcd_caps.sink_count.bits.SINK_COUNT;
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1357
link->link_enc->features.flags.bits.IS_HDMI_FRL_CAPABLE && sink->edid_caps.max_frl_rate != 0) {
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1614
ret = link->hdcp_caps.bcaps.bits.HDCP_CAPABLE;
drivers/gpu/drm/amd/display/dc/link/link_detection.c
1638
ret = (link->hdcp_caps.bcaps.bits.HDCP_CAPABLE &&
drivers/gpu/drm/amd/display/dc/link/link_detection.c
545
lane_count_set.bits.LANE_COUNT_SET;
drivers/gpu/drm/amd/display/dc/link/link_detection.c
583
max_down_spread.bits.MAX_DOWN_SPREAD ?
drivers/gpu/drm/amd/display/dc/link/link_detection.c
608
link->link_enc->features.flags.bits.IS_UHBR20_CAPABLE)
drivers/gpu/drm/amd/display/dc/link/link_detection.c
623
link->dpcd_caps.sink_count.bits.SINK_COUNT = 1;
drivers/gpu/drm/amd/display/dc/link/link_detection.c
710
!link->dc->debug.dpia_debug.bits.disable_mst_dsc_work_around)
drivers/gpu/drm/amd/display/dc/link/link_detection.c
718
!link->dc->debug.dpia_debug.bits.disable_mst_dsc_work_around) {
drivers/gpu/drm/amd/display/dc/link/link_detection.c
927
link->link_enc->features.flags.bits.IS_HDMI_FRL_CAPABLE &&
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
1010
new_downspread.bits.IGNORE_MSA_TIMING_PARAM =
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
1179
if (update_status.bits.ACT_HANDLED == 1) {
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
1510
update_status.bits.VC_PAYLOAD_TABLE_UPDATED = 1;
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
1547
if (update_status.bits.VC_PAYLOAD_TABLE_UPDATED == 1) {
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
2137
if (link->dpcd_sink_ext_caps.bits.oled == 1 ||
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
2138
link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1 ||
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
2139
link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1) {
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
2142
if (link->dpcd_sink_ext_caps.bits.oled == 1)
drivers/gpu/drm/amd/display/dc/link/link_factory.c
657
DC_LOG_DC("BIOS object table - DP_IS_USB_C: %d", link->link_enc->features.flags.bits.DP_IS_USB_C);
drivers/gpu/drm/amd/display/dc/link/link_factory.c
658
DC_LOG_DC("BIOS object table - IS_DP2_CAPABLE: %d", link->link_enc->features.flags.bits.IS_DP2_CAPABLE);
drivers/gpu/drm/amd/display/dc/link/link_factory.c
659
DC_LOG_DC("BIOS object table - IS_HDMI_FRL_CAPABLE: %d", link->link_enc->features.flags.bits.IS_HDMI_FRL_CAPABLE);
drivers/gpu/drm/amd/display/dc/link/link_factory.c
864
if ((link->link_enc->features.flags.bits.IS_HDMI_FRL_CAPABLE) &&
drivers/gpu/drm/amd/display/dc/link/link_factory.c
865
(!link->link_enc->features.flags.bits.DP_IS_USB_C) &&
drivers/gpu/drm/amd/display/dc/link/link_validation.c
149
if (dpcd_caps->channel_coding_cap.bits.DP_128b_132b_SUPPORTED == 0 &&
drivers/gpu/drm/amd/display/dc/link/link_validation.c
475
!link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&
drivers/gpu/drm/amd/display/dc/link/link_validation.c
496
link->dpcd_caps.max_uncompressed_pixel_rate_cap.bits.max_uncompressed_pixel_rate_cap * 10000U;
drivers/gpu/drm/amd/display/dc/link/link_validation.c
498
bool is_max_uncompressed_pixel_rate_exceeded = link->dpcd_caps.max_uncompressed_pixel_rate_cap.bits.valid &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1133
autonomous_mode_caps.bits.REGULATED_AUTONOMOUS_MODE_SUPPORTED;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1147
(!hdmi_tx_link_status.bits.HDMI_TX_READY_STATUS ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1148
!hdmi_encoded_link_bw.bits.FRL_LINK_TRAINING_FINISHED)) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1202
switch (port_caps->bits.DWN_STRM_PORTX_TYPE) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1232
hdmi_caps.bits.FRAME_SEQ_TO_FRAME_PACK;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1234
if (port_caps->bits.DWN_STRM_PORTX_TYPE
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1237
hdmi_caps.bits.YCrCr422_PASS_THROUGH;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1239
hdmi_caps.bits.YCrCr420_PASS_THROUGH;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1241
hdmi_caps.bits.YCrCr422_CONVERSION;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1243
hdmi_caps.bits.YCrCr420_CONVERSION;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1248
hdmi_color_caps.bits.MAX_BITS_PER_COLOR_COMPONENT);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1254
hdmi_color_caps.bits.MAX_ENCODED_LINK_BW_SUPPORT);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1385
down_strm_port_count.bits.IGNORE_MSA_TIMING_PARAM;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1394
link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1398
link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ?
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1404
edp_config_cap.bits.ALT_SCRAMBLER_RESET;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1406
edp_config_cap.bits.DPCD_DISPLAY_CONTROL_CAPABLE;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1496
if (!link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1514
link->link_enc->features.flags.bits.DP_IS_USB_C == 0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1565
if (st == DC_OK && cap.bits.MST_CAP == 1)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1588
if (link->is_dds && !link->dpcd_sink_ext_caps.bits.oled) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1832
aux_rd_interval.bits.EXT_RECEIVER_CAP_FIELD_PRESENT == 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1834
if (aux_rd_interval.bits.EXT_RECEIVER_CAP_FIELD_PRESENT == 1) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1925
down_strm_port_count.bits.IGNORE_MSA_TIMING_PARAM;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1934
link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1938
link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ?
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1944
edp_config_cap.bits.ALT_SCRAMBLER_RESET;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
1946
edp_config_cap.bits.DPCD_DISPLAY_CONTROL_CAPABLE;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2032
is_fec_supported = link->dpcd_caps.fec_cap.bits.FEC_CAPABLE;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2064
link->dc->debug.dpia_debug.bits.enable_force_tbt3_work_around &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2068
(link->dpcd_caps.fec_cap.bits.FEC_CAPABLE ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2084
if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2092
if (link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR20)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2094
else if (link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2096
else if (link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR10)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2110
if (link->dpcd_caps.fallback_formats.bits.dp_1920x1080_60Hz_24bpp_support)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2112
if (link->dpcd_caps.fallback_formats.bits.dp_1280x720_60Hz_24bpp_support)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2114
if (link->dpcd_caps.fallback_formats.bits.dp_1024x768_60Hz_24bpp_support)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2118
link->dpcd_caps.fallback_formats.bits.dp_1920x1080_60Hz_24bpp_support = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2126
if (link->dpcd_caps.fec_cap1.bits.AGGREGATED_ERROR_COUNTERS_CAPABLE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2237
if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2265
if (link->dpcd_sink_ext_caps.bits.emission_output)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2361
if (!link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2386
if (!link->dpcd_caps.cable_id.bits.UHBR13_5_CAPABILITY &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2387
link->dpcd_caps.cable_id.bits.CABLE_TYPE >= 2)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2408
if (!link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR13_5)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
243
out.bits.UHBR10_20_CAPABILITY = MIN(a->bits.UHBR10_20_CAPABILITY,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
244
b->bits.UHBR10_20_CAPABILITY);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
245
out.bits.UHBR13_5_CAPABILITY = MIN(a->bits.UHBR13_5_CAPABILITY,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
246
b->bits.UHBR13_5_CAPABILITY);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
247
out.bits.CABLE_TYPE = MAX(a->bits.CABLE_TYPE, b->bits.CABLE_TYPE);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2513
if (link->link_enc && link->link_enc->features.flags.bits.DP_IS_USB_C &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
264
if (hdmi_encoded_link_bw.bits.BW_48Gbps)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2648
if (link->dpcd_caps.alpm_caps.bits.AUX_LESS_ALPM_CAP) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2650
if (link->dpcd_caps.lttpr_caps.alpm.bits.AUX_LESS_ALPM_SUPPORTED)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
2656
if (link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
266
else if (hdmi_encoded_link_bw.bits.BW_40Gbps)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
268
else if (hdmi_encoded_link_bw.bits.BW_32Gbps)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
270
else if (hdmi_encoded_link_bw.bits.BW_24Gbps)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
272
else if (hdmi_encoded_link_bw.bits.BW_18Gbps)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
274
else if (hdmi_encoded_link_bw.bits.BW_9Gbps)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
276
else if (hdmi_encoded_link_bw.bits.FRL_LINK_TRAINING_FINISHED)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
353
link->dpcd_caps.fec_cap.bits.FEC_CAPABLE);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
463
if (link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR20)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
465
else if (link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR13_5)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
467
else if (link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR10)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
477
if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR20) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
479
} else if (link->dpcd_caps.cable_id.bits.UHBR13_5_CAPABILITY) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
481
} else if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR10) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
483
if (link->dpcd_caps.cable_id.bits.CABLE_TYPE < 2) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
584
return link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5 ?
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
638
link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5 == 0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
158
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
160
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
161
&& link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
164
dp_tunnel_setting->group_id = link->dpcd_caps.usb4_dp_tun_info.dpia_tunnel_info.bits.group_id;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
68
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling == false)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
76
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
94
link->dpcd_caps.usb4_dp_tun_info.dpia_info.bits.dpia_num,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
95
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
96
link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
245
if (link->dc->debug.dpia_debug.bits.enable_usb4_bw_zero_alloc_patch) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
308
if (link && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
341
!link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
51
return (link && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
52
&& link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
53
&& link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
138
if (psr_configuration.bits.ENABLE) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
155
if (psr_error_status.bits.LINK_CRC_ERROR ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
156
psr_error_status.bits.RFB_STORAGE_ERROR ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
157
psr_error_status.bits.VSC_SDP_ERROR) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
177
} else if (psr_sink_psr_status.bits.SINK_SELF_REFRESH_STATUS ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
205
if (pr_error_status.bits.LINK_CRC_ERROR ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
206
pr_error_status.bits.RFB_STORAGE_ERROR ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
207
pr_error_status.bits.VSC_SDP_ERROR ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
208
pr_error_status.bits.ASSDP_MISSING_ERROR) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
276
if (replay_error_status.bits.LINK_CRC_ERROR ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
277
replay_configuration.bits.DESYNC_ERROR_STATUS ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
278
replay_configuration.bits.STATE_TRANSITION_ERROR_STATUS ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
279
replay_sink_status.bits.SINK_DEVICE_REPLAY_STATUS == 0x7) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
285
if (replay_configuration.bits.DESYNC_ERROR_STATUS)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
317
replay_sink_status.bits.SINK_DEVICE_REPLAY_STATUS == 0x7) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
388
irq_data->bytes.lane_status_updated.bits.EQ_INTERLANE_ALIGN_DONE_128b_132b =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
389
dpcd_lane_status_updated.bits.EQ_INTERLANE_ALIGN_DONE_128b_132b;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
390
irq_data->bytes.lane_status_updated.bits.CDS_INTERLANE_ALIGN_DONE_128b_132b =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
391
dpcd_lane_status_updated.bits.CDS_INTERLANE_ALIGN_DONE_128b_132b;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
416
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
513
if (hpd_irq_dpcd_data.bytes.device_service_irq.bits.AUTOMATED_TEST) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
519
device_service_clear.bits.AUTOMATED_TEST = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
547
if (hpd_irq_dpcd_data.bytes.device_service_irq.bits.UP_REQ_MSG_RDY) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
554
if (hpd_irq_dpcd_data.bytes.device_service_irq.bits.DOWN_REP_MSG_RDY) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
591
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
592
if (hpd_irq_dpcd_data.bytes.link_service_irq_esi0.bits.DP_LINK_TUNNELING_IRQ)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
597
hpd_irq_dpcd_data.bytes.sink_cnt.bits.SINK_COUNT
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
76
if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
77
!lane_status.bits.CR_DONE_0 ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
78
!lane_status.bits.SYMBOL_LOCKED_0) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
91
(!hpd_irq_dpcd_data->bytes.lane_status_updated.bits.EQ_INTERLANE_ALIGN_DONE_128b_132b ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
92
!hpd_irq_dpcd_data->bytes.lane_status_updated.bits.CDS_INTERLANE_ALIGN_DONE_128b_132b)) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
94
} else if (!hpd_irq_dpcd_data->bytes.lane_status_updated.bits.INTERLANE_ALIGN_DONE) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
148
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
149
pr_config_1.bits.PANEL_REPLAY_CRC_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
150
pr_config_1.bits.IRQ_HPD_ASSDP_MISSING = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
151
pr_config_1.bits.IRQ_HPD_VSCSDP_UNCORRECTABLE_ERROR = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
152
pr_config_1.bits.IRQ_HPD_RFB_ERROR = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
153
pr_config_1.bits.IRQ_HPD_ACTIVE_FRAME_CRC_ERROR = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
154
pr_config_1.bits.PANEL_REPLAY_SELECTIVE_UPDATE_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
155
pr_config_1.bits.PANEL_REPLAY_EARLY_TRANSPORT_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
157
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
160
pr_config_2.bits.SINK_REFRESH_RATE_UNLOCK_GRANTED = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
162
if (link->dpcd_caps.vesa_replay_caps.bits.SU_Y_GRANULARITY_EXT_CAP_SUPPORTED)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
163
pr_config_2.bits.SU_Y_GRANULARITY_EXT_VALUE_ENABLED = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
165
pr_config_2.bits.SU_REGION_SCAN_LINE_CAPTURE_INDICATION = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
177
alpm_config.bits.ENABLE = link->replay_settings.config.alpm_mode != DC_ALPM_UNSUPPORTED ? 1 : 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
180
alpm_config.bits.ALPM_MODE_SEL = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
181
alpm_config.bits.ACDS_PERIOD_DURATION = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
337
cmd.pr_copy_settings.data.su_granularity_needed = link->dpcd_caps.vesa_replay_caps.bits.PR_SU_GRANULARITY_NEEDED;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1107
lane_count_set.bits.LANE_COUNT_SET =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1110
lane_count_set.bits.ENHANCED_FRAMING = lt_settings->enhanced_framing;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1111
lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1116
lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1117
link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1208
link_training_setting->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1209
link_training_setting->dpcd_lane_settings[0].bits.PRE_EMPHASIS_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1210
link_training_setting->dpcd_lane_settings[0].bits.MAX_SWING_REACHED,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1211
link_training_setting->dpcd_lane_settings[0].bits.MAX_PRE_EMPHASIS_REACHED);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1217
link_training_setting->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1218
link_training_setting->dpcd_lane_settings[0].bits.PRE_EMPHASIS_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1219
link_training_setting->dpcd_lane_settings[0].bits.MAX_SWING_REACHED,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1220
link_training_setting->dpcd_lane_settings[0].bits.MAX_PRE_EMPHASIS_REACHED);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1301
lt_settings->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1302
lt_settings->dpcd_lane_settings[0].bits.PRE_EMPHASIS_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1303
lt_settings->dpcd_lane_settings[0].bits.MAX_SWING_REACHED,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1304
lt_settings->dpcd_lane_settings[0].bits.MAX_PRE_EMPHASIS_REACHED);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1317
lt_settings->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1318
lt_settings->dpcd_lane_settings[0].bits.PRE_EMPHASIS_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1319
lt_settings->dpcd_lane_settings[0].bits.MAX_SWING_REACHED,
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1320
lt_settings->dpcd_lane_settings[0].bits.MAX_PRE_EMPHASIS_REACHED);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1456
if (dpcd_lane_status_updated.bits.
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1471
dpcd_lane_settings[lane].bits.VOLTAGE_SWING_SET !=
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1472
dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_LANE ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1473
lt_settings->dpcd_lane_settings[lane].bits.PRE_EMPHASIS_SET !=
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1474
dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_LANE) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1526
if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1543
lane_count_set.bits.LANE_COUNT_SET = lt_settings->link_settings.lane_count;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1544
lane_count_set.bits.ENHANCED_FRAMING = lt_settings->enhanced_framing;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
1545
lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
364
dpcd_lane_settings[lane].bits.VOLTAGE_SWING_SET =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
366
dpcd_lane_settings[lane].bits.PRE_EMPHASIS_SET =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
368
dpcd_lane_settings[lane].bits.MAX_SWING_REACHED =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
371
dpcd_lane_settings[lane].bits.MAX_PRE_EMPHASIS_REACHED =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
446
if (ln_count >= LANE_COUNT_ONE && !dpcd_lane_status[0].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
448
else if (ln_count >= LANE_COUNT_TWO && !dpcd_lane_status[1].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
450
else if (ln_count >= LANE_COUNT_FOUR && !dpcd_lane_status[2].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
452
else if (ln_count >= LANE_COUNT_FOUR && !dpcd_lane_status[3].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
469
if (lt_settings->dpcd_lane_settings[lane].bits.VOLTAGE_SWING_SET
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
484
if (!dpcd_lane_status[lane].bits.CR_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
497
if (!dpcd_lane_status[lane].bits.CHANNEL_EQ_DONE_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
508
if (!dpcd_lane_status[lane].bits.SYMBOL_LOCKED_0)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
515
return align_status.bits.INTERLANE_ALIGN_DONE == 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
578
if (!lane_status.bits.CHANNEL_EQ_DONE_0 ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
579
!lane_status.bits.CR_DONE_0 ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
580
!lane_status.bits.SYMBOL_LOCKED_0 ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
785
if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA && link->dc->debug.dpia_debug.bits.force_non_lttpr)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
821
if (enc_caps->flags.bits.IS_TPS4_CAPABLE &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
822
rx_caps->max_down_spread.bits.TPS4_SUPPORTED)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
824
else if (enc_caps->flags.bits.IS_TPS3_CAPABLE &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
825
rx_caps->max_ln_count.bits.TPS3_SUPPORTED)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
866
(enum dc_voltage_swing)(ln_adjust[lane].bits.
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
869
(enum dc_pre_emphasis)(ln_adjust[lane].bits.
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
124
} else if (dpcd_lane_status_updated.bits.LT_FAILED_128b_132b) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
137
} else if (dpcd_lane_status_updated.bits.EQ_INTERLANE_ALIGN_DONE_128b_132b) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
142
} else if (dpcd_lane_status_updated.bits.LT_FAILED_128b_132b) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
183
dpcd_lane_status_updated.bits.CDS_INTERLANE_ALIGN_DONE_128b_132b) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
186
} else if (dpcd_lane_status_updated.bits.LT_FAILED_128b_132b) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
64
interval_unit = dpcd_interval.bits.UNIT ? 1 : 2; /* 0b = 2 ms, 1b = 1 ms */
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
68
*interval_in_us = (dpcd_interval.bits.VALUE + 1) * interval_unit * 1000;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
101
switch (training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
174
if (link->dc->config.allow_lttpr_non_transparent_mode.bits.DP1_4A &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
313
lt_settings->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
314
dpcd_lane_adjust[0].bits.VOLTAGE_SWING_LANE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
404
return dpcd_lane_status[0].bits.CR_DONE_0 ?
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
70
if (training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
71
wait_in_micro_secs = training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL * 4000;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
421
if ((lt_settings->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
422
dpcd_lane_adjust[0].bits.VOLTAGE_SWING_LANE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
423
&& (lt_settings->dpcd_lane_settings[0].bits.PRE_EMPHASIS_SET ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
424
dpcd_lane_adjust[0].bits.PRE_EMPHASIS_LANE))
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
526
if ((lt_settings->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
527
dpcd_lane_adjust[0].bits.VOLTAGE_SWING_LANE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
528
&& (lt_settings->dpcd_lane_settings[0].bits.PRE_EMPHASIS_SET ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
529
dpcd_lane_adjust[0].bits.PRE_EMPHASIS_LANE))
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
930
if (link->dc->debug.dpia_debug.bits.extend_aux_rd_interval)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
253
lane_count_set.bits.LANE_COUNT_SET =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
256
lane_count_set.bits.ENHANCED_FRAMING = lt_settings->enhanced_framing;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
257
lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
261
lane_count_set.bits.POST_LT_ADJ_REQ_GRANTED =
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
262
link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
379
lt_settings->dpcd_lane_settings[lane].bits.VOLTAGE_SWING_SET << (2 * lane);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
381
lt_settings->dpcd_lane_settings[lane].bits.PRE_EMPHASIS_SET << (2 * lane);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
427
if (lt_settings->dpcd_lane_settings[0].bits.VOLTAGE_SWING_SET ==
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
428
dpcd_lane_adjust[0].bits.VOLTAGE_SWING_LANE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
485
lt_settings->dpcd_lane_settings[lane].bits.VOLTAGE_SWING_SET << (2 * lane);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
487
lt_settings->dpcd_lane_settings[lane].bits.PRE_EMPHASIS_SET << (2 * lane);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
66
dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET = (dprx_vs >> (2 * lane)) & 0x3;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
67
dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET = (dprx_pe >> (2 * lane)) & 0x3;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
84
dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET << (2 * lane);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
86
dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET << (2 * lane);
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1055
replay_config.bits.FREESYNC_PANEL_REPLAY_MODE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1056
replay_config.bits.TIMING_DESYNC_ERROR_VERIFICATION = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1057
replay_config.bits.STATE_TRANSITION_ERROR_DETECTION = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1058
replay_config.bits.FRAME_SKIPPING_ERROR_DETECTION = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1059
replay_config.bits.FRAME_SKIPPING_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1065
alpm_config.bits.ENABLE = link->replay_settings.config.alpm_mode != DC_ALPM_UNSUPPORTED ? 1 : 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1068
alpm_config.bits.ALPM_MODE_SEL = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
1069
alpm_config.bits.ACDS_PERIOD_DURATION = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
207
if (link->dpcd_sink_ext_caps.bits.oled == 1)
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
312
if (link && link->dpcd_sink_ext_caps.bits.oled == 1) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
385
lane_count_set.bits.LANE_COUNT_SET != link_setting.lane_count) {
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
519
alpm_config.bits.ENABLE = (enable ? true : false);
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
738
psr_configuration.bits.ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
739
psr_configuration.bits.CRC_VERIFICATION = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
740
psr_configuration.bits.FRAME_CAPTURE_INDICATION =
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
750
psr_configuration.bits.LINE_CAPTURE_INDICATION = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
754
psr_configuration.bits.IRQ_HPD_WITH_CRC_ERROR = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
758
psr_configuration.bits.ENABLE_PSR2 = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
762
psr_configuration.bits.EARLY_TRANSPORT_ENABLE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
785
vtotal_control.bits.ENABLE = true;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
80
edp_config_set.bits.PANEL_MODE_EDP
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
83
edp_config_set.bits.PANEL_MODE_EDP =
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
855
psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
858
psr_context->psr_level.bits.SKIP_CRTC_DISABLE = true;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
874
psr_context->psr_level.bits.DISABLE_PSR_ENTRY_ABORT = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
877
psr_context->psr_level.bits.DISABLE_ALPM = 0;
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
878
psr_context->psr_level.bits.ALPM_DEFAULT_PD_MODE = 1;
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
139
if (link->link_enc->features.flags.bits.IS_FRL_8G_CAPABLE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
142
if (link->link_enc->features.flags.bits.IS_FRL_10G_CAPABLE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
145
if (link->link_enc->features.flags.bits.IS_FRL_12G_CAPABLE)
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
81
*de_emphasis_only = (test_req->fields.TXFFE_DEEMPHASIS && link->hdmi_cable_id.bits.no_DeEmphasis_n) ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
82
!link->hdmi_cable_id.bits.no_PreShoot_n;
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
83
*pre_shoot_only = (test_req->fields.TXFFE_PRESHOOT && link->hdmi_cable_id.bits.no_PreShoot_n) ||
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
84
!link->hdmi_cable_id.bits.no_DeEmphasis_n;
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
86
(!link->hdmi_cable_id.bits.no_PreShoot_n &&
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
87
!link->hdmi_cable_id.bits.no_DeEmphasis_n);
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
1297
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
1458
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
384
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
833
if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
844
if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
877
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
272
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.cm)
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
52
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
695
if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
76
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.cm) {
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
987
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c
156
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c
227
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
178
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
230
if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
630
if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc)
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c
82
if (power_on && mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) {
drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
626
optc1, CTX->dc->debug.enable_fine_grain_clock_gating.bits.optc);
drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c
323
if (dc->caps.dmub_caps.fams_ver == dc->debug.fams_version.ver && dc->debug.fams2_config.bits.enable) {
drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c
390
if (dc->caps.dmub_caps.fams_ver == dc->debug.fams_version.ver && dc->debug.fams2_config.bits.enable) {
drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c
288
optc1, CTX->dc->debug.enable_fine_grain_clock_gating.bits.optc);
drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
627
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
628
.flags.bits.IS_TPS3_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
662
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
663
.flags.bits.IS_TPS3_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
621
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
622
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
623
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
624
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
705
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
706
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
707
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
708
.flags.bits.IS_TPS4_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
723
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
724
.flags.bits.IS_TPS3_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
729
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
730
.flags.bits.IS_TPS3_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
757
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
758
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
759
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
760
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
937
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
938
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
939
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
940
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
814
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
815
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
816
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
817
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1229
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1230
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1231
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1232
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1608
state->bits.rmu_idx_valid = 1;
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1609
state->bits.rmu_mux_num = i;
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1610
if (state->bits.rmu_mux_num == 0)
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1611
state->bits.mpc_rmu0_mux = mpcc_id;
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1612
else if (state->bits.rmu_mux_num == 1)
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1613
state->bits.mpc_rmu1_mux = mpcc_id;
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1614
else if (state->bits.rmu_mux_num == 2)
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1615
state->bits.mpc_rmu2_mux = mpcc_id;
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
987
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
988
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
989
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
990
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
902
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
903
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
904
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
905
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
955
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
956
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
957
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
958
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
910
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
911
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
912
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
913
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1154
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1155
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1156
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1157
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
2364
!dc->debug.dpia_debug.bits.disable_dpia) {
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
936
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1211
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1212
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1213
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1214
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
956
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
970
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
1153
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
1154
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
1155
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
1156
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
936
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
1146
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
1147
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
1148
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
1149
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
931
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1103
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1104
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1105
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1106
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
764
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
1091
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
1092
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
1093
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
1094
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
754
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1131
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1132
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1133
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1134
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1750
dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb);
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1788
ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub);
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1841
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc);
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
2332
if (dc->debug.dpia_debug.bits.disable_dpia)
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
788
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
801
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
881
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dpp);
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
911
dcn35_opp_set_fgcg(opp, ctx->dc->debug.enable_fine_grain_clock_gating.bits.opp);
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1111
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1112
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1113
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1114
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1730
dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb);
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1768
ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub);
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1821
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc);
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
2304
if (dc->debug.dpia_debug.bits.disable_dpia)
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
768
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
781
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
861
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dpp);
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
891
dcn35_opp_set_fgcg(opp, ctx->dc->debug.enable_fine_grain_clock_gating.bits.opp);
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1118
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1119
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1120
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1121
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1737
dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb);
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1775
ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub);
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1828
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc);
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
2302
if (dc->debug.dpia_debug.bits.disable_dpia)
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
775
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
788
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
868
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dpp);
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
898
dcn35_opp_set_fgcg(opp, ctx->dc->debug.enable_fine_grain_clock_gating.bits.opp);
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1092
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1093
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1094
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1095
.flags.bits.IS_TPS4_CAPABLE = true
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1741
ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc);
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
752
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
783
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1123
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1124
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1125
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1126
.flags.bits.IS_TPS4_CAPABLE = true};
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1752
ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub);
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
1805
dsc401_set_fgcg(dsc, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc);
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
2372
if (dc->debug.dpia_debug.bits.disable_dpia)
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
752
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
762
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1159
.flags.bits.IS_HBR2_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1160
.flags.bits.IS_HBR3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1161
.flags.bits.IS_TPS3_CAPABLE = true,
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1162
.flags.bits.IS_TPS4_CAPABLE = true};
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1717
ctx->dc->debug.enable_fine_grain_clock_gating.bits.mmhubbub);
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
1770
dsc401_set_fgcg(dsc, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dsc);
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
780
.bits = {
drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
790
.bits = {
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1061
} bits; /**< status bits */
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1086
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1194
} bits; /**< boot bits */
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1241
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1261
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1443
} bits; /**< GPINT bit access */
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1714
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
1742
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2373
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2616
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2650
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2702
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2734
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
2773
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
3462
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4120
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4129
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4136
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4143
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4156
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4180
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
4188
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
5192
} bits;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
972
} bits; /**< status bits */
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
103
cmd.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
104
cmd.bits.command_code = DMUB_GPINT__STOP_FW;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
105
cmd.bits.param = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
379
reg.bits.status = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
410
boot_options.bits.skip_phy_init_panel_sequence = skip;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
301
return is_enable != 0 && status.bits.dal_fw;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
329
reg.bits.status = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
375
boot_options.bits.z10_disable = params->disable_z10;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
376
boot_options.bits.dpia_supported = params->dpia_supported;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
377
boot_options.bits.enable_dpia = params->disable_dpia ? 0 : 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
378
boot_options.bits.usb4_cm_version = params->usb4_cm_version;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
379
boot_options.bits.dpia_hpd_int_enable_supported = params->dpia_hpd_int_enable_supported;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
380
boot_options.bits.power_optimization = params->power_optimization;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
381
boot_options.bits.lower_hbr3_phy_ssc = params->lower_hbr3_phy_ssc;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
382
boot_options.bits.override_hbr3_pll_vco = params->override_hbr3_pll_vco;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
384
boot_options.bits.sel_mux_phy_c_d_phy_f_g = (dmub->asic == DMUB_ASIC_DCN31B) ? 1 : 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
385
boot_options.bits.disable_dpia_bw_allocation = params->disable_dpia_bw_allocation;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
394
boot_options.bits.skip_phy_init_panel_sequence = skip;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
92
cmd.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
93
cmd.bits.command_code = DMUB_GPINT__STOP_FW;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
94
cmd.bits.param = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
103
cmd.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
104
cmd.bits.command_code = DMUB_GPINT__STOP_FW;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
105
cmd.bits.param = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
343
return is_hw_init != 0 && status.bits.dal_fw;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
366
reg.bits.status = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
404
boot_options.bits.z10_disable = params->disable_z10;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
413
boot_options.bits.skip_phy_init_panel_sequence = skip;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
100
cmd.bits.param = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
336
return is_enable != 0 && status.bits.dal_fw;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
359
reg.bits.status = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
406
dmub->dpia_supported = dmub_dcn35_get_fw_boot_option(dmub).bits.enable_dpia != 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
409
boot_options.bits.z10_disable = params->disable_z10;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
410
boot_options.bits.dpia_supported = params->dpia_supported;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
411
boot_options.bits.enable_dpia = dmub->dpia_supported && !params->disable_dpia;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
412
boot_options.bits.usb4_cm_version = params->usb4_cm_version;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
413
boot_options.bits.dpia_hpd_int_enable_supported = params->dpia_hpd_int_enable_supported;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
414
boot_options.bits.power_optimization = params->power_optimization;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
415
boot_options.bits.disable_clk_ds = params->disallow_dispclk_dppclk_ds;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
416
boot_options.bits.disable_clk_gate = params->disable_clock_gate;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
417
boot_options.bits.ips_disable = params->disable_ips;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
418
boot_options.bits.ips_sequential_ono = params->ips_sequential_ono;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
419
boot_options.bits.disable_sldo_opt = params->disable_sldo_opt;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
420
boot_options.bits.enable_non_transparent_setconfig = params->enable_non_transparent_setconfig;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
421
boot_options.bits.lower_hbr3_phy_ssc = params->lower_hbr3_phy_ssc;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
422
boot_options.bits.disable_dpia_bw_allocation = params->disable_dpia_bw_allocation;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
423
boot_options.bits.bootcrc_en_at_preos = dmub_dcn35_get_fw_boot_option(dmub).bits.bootcrc_en_at_preos;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
424
boot_options.bits.bootcrc_en_at_S0i3 = dmub_dcn35_get_fw_boot_option(dmub).bits.bootcrc_en_at_S0i3;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
425
boot_options.bits.bootcrc_boot_mode = dmub_dcn35_get_fw_boot_option(dmub).bits.bootcrc_boot_mode;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
434
boot_options.bits.skip_phy_init_panel_sequence = skip;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
618
return (status.bits.dal_fw && status.bits.hw_power_init_done && status.bits.mailbox_rdy) ||
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
619
(!status.bits.dal_fw && status.bits.mailbox_rdy);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
98
cmd.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
99
cmd.bits.command_code = DMUB_GPINT__STOP_FW;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
327
return is_hw_init != 0 && status.bits.dal_fw;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
350
reg.bits.status = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
388
boot_options.bits.z10_disable = params->disable_z10;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
390
boot_options.bits.skip_phy_access = params->disallow_phy_access;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
399
boot_options.bits.skip_phy_init_panel_sequence = skip;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
77
cmd.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
78
cmd.bits.command_code = DMUB_GPINT__STOP_FW;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c
79
cmd.bits.param = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
105
cmd.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
106
cmd.bits.command_code = DMUB_GPINT__STOP_FW;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
107
cmd.bits.param = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
374
return (status.bits.dal_fw && status.bits.hw_power_init_done && status.bits.mailbox_rdy) ||
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
375
(!status.bits.dal_fw && status.bits.mailbox_rdy);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
391
return is_hw_init != 0 && status.bits.dal_fw;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
406
boot_options.bits.skip_phy_init_panel_sequence = skip;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
44
dmub->dpia_supported = dmub_dcn42_get_fw_boot_option(dmub).bits.enable_dpia != 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
47
boot_options.bits.z10_disable = params->disable_z10;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
48
boot_options.bits.dpia_supported = params->dpia_supported;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
49
boot_options.bits.enable_dpia = dmub->dpia_supported && !params->disable_dpia;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
50
boot_options.bits.usb4_cm_version = params->usb4_cm_version;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
51
boot_options.bits.dpia_hpd_int_enable_supported = params->dpia_hpd_int_enable_supported;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
52
boot_options.bits.power_optimization = params->power_optimization;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
53
boot_options.bits.disable_clk_ds = params->disallow_dispclk_dppclk_ds;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
54
boot_options.bits.disable_clk_gate = params->disable_clock_gate;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
55
boot_options.bits.ips_disable = params->disable_ips;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
56
boot_options.bits.ips_sequential_ono = params->ips_sequential_ono;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
57
boot_options.bits.disable_sldo_opt = params->disable_sldo_opt;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
58
boot_options.bits.enable_non_transparent_setconfig = params->enable_non_transparent_setconfig;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
588
reg.bits.status = 0;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
59
boot_options.bits.lower_hbr3_phy_ssc = params->lower_hbr3_phy_ssc;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
60
boot_options.bits.skip_phy_access = params->disallow_phy_access;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.c
61
boot_options.bits.disable_dpia_bw_allocation = params->disable_dpia_bw_allocation;
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
1029
if (status.bits.dal_fw && status.bits.mailbox_rdy && hw_on)
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
1138
reg.bits.status = 1;
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
1139
reg.bits.command_code = command_code;
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
1140
reg.bits.param = param;
drivers/gpu/drm/amd/display/include/audio_types.h
98
} bits;
drivers/gpu/drm/amd/display/include/link_service_types.h
233
} bits;
drivers/gpu/drm/amd/display/include/set_mode_types.h
95
} bits;
drivers/gpu/drm/amd/display/modules/color/color_gamma.h
56
} bits;
drivers/gpu/drm/amd/display/modules/inc/mod_shared.h
69
} bits;
drivers/gpu/drm/amd/display/modules/power/power_abm.c
1174
if (link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 0)
drivers/gpu/drm/amd/display/modules/power/power_abm.c
719
if (link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 ||
drivers/gpu/drm/amd/display/modules/power/power_abm.c
720
link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1)
drivers/gpu/drm/amd/display/modules/power/power_abm.c
793
params.bits.gradual_change = (frame_ramp > 0);
drivers/gpu/drm/amd/display/modules/power/power_abm.c
794
params.bits.frame_ramp = frame_ramp;
drivers/gpu/drm/amd/display/modules/power/power_helpers.h
140
} bits;
drivers/gpu/drm/amd/display/modules/power/power_psr.c
610
(6 - dpcd_caps->psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME) * psr_setup_time_step_in_us;
drivers/gpu/drm/amd/display/modules/power/power_psr.c
626
psr_config->su_granularity_required = dpcd_caps->psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED;
drivers/gpu/drm/amd/display/modules/power/power_psr.c
629
!link->dpcd_caps.psr_info.psr_dpcd_caps.bits.LINK_TRAINING_ON_EXIT_NOT_REQUIRED;
drivers/gpu/drm/amd/display/modules/power/power_replay.c
612
if (!link->replay_settings.config.replay_optimization.bits.LIVE_CAPTURE_WITH_CVT)
drivers/gpu/drm/amd/include/discovery.h
425
} bits;
drivers/gpu/drm/amd/include/mes_v11_api_def.h
655
} bits;
drivers/gpu/drm/amd/include/mes_v12_api_def.h
760
} bits;
drivers/gpu/drm/amd/include/mes_v12_api_def.h
831
} bits;
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h
115
} bits;
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.h
138
} bits;
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
1841
features_supported.bits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2019
static inline bool smu_feature_bits_is_set(const struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2025
return test_bit(bit, bits->bits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2028
static inline void smu_feature_bits_set_bit(struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2032
__set_bit(bit, bits->bits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2035
static inline void smu_feature_bits_clear_bit(struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2039
__clear_bit(bit, bits->bits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2042
static inline void smu_feature_bits_clearall(struct smu_feature_bits *bits)
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2044
bitmap_zero(bits->bits, SMU_FEATURE_MAX);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2047
static inline void smu_feature_bits_fill(struct smu_feature_bits *bits)
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2049
bitmap_fill(bits->bits, SMU_FEATURE_MAX);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2053
smu_feature_bits_test_mask(const struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2056
return bitmap_intersects(bits->bits, mask, SMU_FEATURE_MAX);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2059
static inline void smu_feature_bits_from_arr32(struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2063
bitmap_from_arr32(bits->bits, arr, nbits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2067
smu_feature_bits_to_arr32(const struct smu_feature_bits *bits, uint32_t *arr,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2070
bitmap_to_arr32(arr, bits->bits, nbits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2073
static inline bool smu_feature_bits_empty(const struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2076
return bitmap_empty(bits->bits, nbits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2079
static inline bool smu_feature_bits_full(const struct smu_feature_bits *bits,
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2082
return bitmap_full(bits->bits, nbits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2089
bitmap_copy(dst->bits, src, nbits);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2097
return &smu->smu_feature.bits[SMU_FEATURE_LIST_SUPPORTED];
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
2100
return &smu->smu_feature.bits[list];
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
479
DECLARE_BITMAP(bits, SMU_FEATURE_MAX);
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
507
struct smu_feature_bits bits[SMU_FEATURE_LIST_MAX];
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
1538
arcturus_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
71
.bits = { SMU_FEATURE_BIT_INIT(FEATURE_DPM_PREFETCHER_BIT),
drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
382
cyan_skillfish_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
64
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
1633
navi10_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
62
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
1546
sienna_cichlid_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
64
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
525
vangogh_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
62
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
1408
aldebaran_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
65
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
67
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
704
smu_v13_0_0_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
394
smu_v13_0_12_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
63
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
224
smu_v13_0_4_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
60
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
243
smu_v13_0_5_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
55
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2399
smu_v13_0_6_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
80
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
67
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
723
smu_v13_0_7_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
270
yellow_carp_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
59
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
485
smu_v14_0_0_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
79
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
604
smu_v14_0_2_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
64
.bits = { SMU_FEATURE_BIT_INIT(FEATURE_DPM_GFXCLK_BIT),
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c
566
smu_v15_0_0_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_0_ppt.c
67
.bits = {
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c
1346
smu_v15_0_8_dpm_features.bits);
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c
76
.bits = { SMU_FEATURE_BIT_INIT(FEATURE_ID_DATA_CALCULATION),
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
989
feature_mask_u64 = *(uint64_t *)feature_mask.bits;
drivers/gpu/drm/arm/display/include/malidp_utils.h
14
#define has_bits(bits, mask) (((bits) & (mask)) == (bits))
drivers/gpu/drm/drm_format_helper.c
1175
unsigned int i, bits = min(pixels, 4U);
drivers/gpu/drm/drm_format_helper.c
1178
for (i = 0; i < bits; i++, pixels--) {
drivers/gpu/drm/drm_format_helper.c
1193
unsigned int i, bits = min(pixels, 8U);
drivers/gpu/drm/drm_format_helper.c
1196
for (i = 0; i < bits; i++, pixels--) {
drivers/gpu/drm/drm_print.c
296
const char * const bits[], unsigned int nbits)
drivers/gpu/drm/drm_print.c
305
if (WARN_ON_ONCE(!bits[i]))
drivers/gpu/drm/drm_print.c
308
bits[i]);
drivers/gpu/drm/drm_print.c
73
.bits = &__drm_debug,
drivers/gpu/drm/exynos/exynos7_drm_decon.c
120
u32 bits, val;
drivers/gpu/drm/exynos/exynos7_drm_decon.c
123
bits = SHADOWCON_WINx_PROTECT(shift, win);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
127
val |= bits;
drivers/gpu/drm/exynos/exynos7_drm_decon.c
129
val &= ~bits;
drivers/gpu/drm/exynos/exynos_drm_fimc.c
123
static void fimc_set_bits(struct fimc_context *ctx, u32 reg, u32 bits)
drivers/gpu/drm/exynos/exynos_drm_fimc.c
127
writel(readl(r) | bits, r);
drivers/gpu/drm/exynos/exynos_drm_fimc.c
130
static void fimc_clear_bits(struct fimc_context *ctx, u32 reg, u32 bits)
drivers/gpu/drm/exynos/exynos_drm_fimc.c
134
writel(readl(r) & ~bits, r);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
777
u32 reg, bits, val;
drivers/gpu/drm/exynos/exynos_drm_fimd.c
791
bits = SHADOWCON_WINx_PROTECT(win);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
794
bits = PRTCON_PROTECT;
drivers/gpu/drm/exynos/exynos_drm_fimd.c
799
val |= bits;
drivers/gpu/drm/exynos/exynos_drm_fimd.c
801
val &= ~bits;
drivers/gpu/drm/i915/display/intel_display.c
1976
bitmap_zero(mask->bits, POWER_DOMAIN_NUM);
drivers/gpu/drm/i915/display/intel_display.c
1981
set_bit(POWER_DOMAIN_PIPE(pipe), mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
1982
set_bit(POWER_DOMAIN_TRANSCODER(cpu_transcoder), mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
1985
set_bit(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe), mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
1991
set_bit(intel_encoder->power_domain, mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
1995
set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
1998
set_bit(POWER_DOMAIN_DISPLAY_CORE, mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
2001
set_bit(intel_dsc_power_domain(crtc, cpu_transcoder), mask->bits);
drivers/gpu/drm/i915/display/intel_display.c
2014
bitmap_andnot(new_domains.bits,
drivers/gpu/drm/i915/display/intel_display.c
2015
domains.bits,
drivers/gpu/drm/i915/display/intel_display.c
2016
crtc->enabled_power_domains.mask.bits,
drivers/gpu/drm/i915/display/intel_display.c
2018
bitmap_andnot(old_domains->bits,
drivers/gpu/drm/i915/display/intel_display.c
2019
crtc->enabled_power_domains.mask.bits,
drivers/gpu/drm/i915/display/intel_display.c
2020
domains.bits,
drivers/gpu/drm/i915/display/intel_display_irq.c
180
void ilk_enable_display_irq(struct intel_display *display, u32 bits)
drivers/gpu/drm/i915/display/intel_display_irq.c
182
ilk_update_display_irq(display, bits, bits);
drivers/gpu/drm/i915/display/intel_display_irq.c
185
void ilk_disable_display_irq(struct intel_display *display, u32 bits)
drivers/gpu/drm/i915/display/intel_display_irq.c
187
ilk_update_display_irq(display, bits, 0);
drivers/gpu/drm/i915/display/intel_display_irq.c
253
enum pipe pipe, u32 bits)
drivers/gpu/drm/i915/display/intel_display_irq.c
255
bdw_update_pipe_irq(display, pipe, bits, bits);
drivers/gpu/drm/i915/display/intel_display_irq.c
259
enum pipe pipe, u32 bits)
drivers/gpu/drm/i915/display/intel_display_irq.c
261
bdw_update_pipe_irq(display, pipe, bits, 0);
drivers/gpu/drm/i915/display/intel_display_irq.c
290
void ibx_enable_display_interrupt(struct intel_display *display, u32 bits)
drivers/gpu/drm/i915/display/intel_display_irq.c
292
ibx_display_interrupt_update(display, bits, bits);
drivers/gpu/drm/i915/display/intel_display_irq.c
295
void ibx_disable_display_interrupt(struct intel_display *display, u32 bits)
drivers/gpu/drm/i915/display/intel_display_irq.c
297
ibx_display_interrupt_update(display, bits, 0);
drivers/gpu/drm/i915/display/intel_display_irq.h
26
void ilk_enable_display_irq(struct intel_display *display, u32 bits);
drivers/gpu/drm/i915/display/intel_display_irq.h
27
void ilk_disable_display_irq(struct intel_display *display, u32 bits);
drivers/gpu/drm/i915/display/intel_display_irq.h
30
void bdw_enable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);
drivers/gpu/drm/i915/display/intel_display_irq.h
31
void bdw_disable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);
drivers/gpu/drm/i915/display/intel_display_irq.h
35
void ibx_enable_display_interrupt(struct intel_display *display, u32 bits);
drivers/gpu/drm/i915/display/intel_display_irq.h
36
void ibx_disable_display_interrupt(struct intel_display *display, u32 bits);
drivers/gpu/drm/i915/display/intel_display_power.c
364
bitmap_or(mask->bits,
drivers/gpu/drm/i915/display/intel_display_power.c
365
power_domains->async_put_domains[0].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
366
power_domains->async_put_domains[1].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
380
bitmap_intersects(power_domains->async_put_domains[0].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
381
power_domains->async_put_domains[1].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
399
!bitmap_empty(async_put_mask.bits, POWER_DOMAIN_NUM));
drivers/gpu/drm/i915/display/intel_display_power.c
40
for_each_if(test_bit((__domain), (__power_well)->domains.bits))
drivers/gpu/drm/i915/display/intel_display_power.c
416
drm_dbg_kms(display->drm, "%s (%d):\n", prefix, bitmap_weight(mask->bits, POWER_DOMAIN_NUM));
drivers/gpu/drm/i915/display/intel_display_power.c
44
for_each_if(test_bit((__domain), (__power_well)->domains.bits))
drivers/gpu/drm/i915/display/intel_display_power.c
475
clear_bit(domain, power_domains->async_put_domains[0].bits);
drivers/gpu/drm/i915/display/intel_display_power.c
476
clear_bit(domain, power_domains->async_put_domains[1].bits);
drivers/gpu/drm/i915/display/intel_display_power.c
499
if (!test_bit(domain, async_put_mask.bits))
drivers/gpu/drm/i915/display/intel_display_power.c
507
if (!bitmap_empty(async_put_mask.bits, POWER_DOMAIN_NUM))
drivers/gpu/drm/i915/display/intel_display_power.c
619
test_bit(domain, async_put_mask.bits),
drivers/gpu/drm/i915/display/intel_display_power.c
705
if (!bitmap_empty(power_domains->async_put_domains[1].bits, POWER_DOMAIN_NUM)) {
drivers/gpu/drm/i915/display/intel_display_power.c
706
bitmap_copy(power_domains->async_put_domains[0].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
707
power_domains->async_put_domains[1].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
709
bitmap_zero(power_domains->async_put_domains[1].bits,
drivers/gpu/drm/i915/display/intel_display_power.c
765
set_bit(domain, power_domains->async_put_domains[1].bits);
drivers/gpu/drm/i915/display/intel_display_power.c
769
set_bit(domain, power_domains->async_put_domains[0].bits);
drivers/gpu/drm/i915/display/intel_display_power.c
890
drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
drivers/gpu/drm/i915/display/intel_display_power.c
896
set_bit(domain, power_domain_set->mask.bits);
drivers/gpu/drm/i915/display/intel_display_power.c
906
drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
drivers/gpu/drm/i915/display/intel_display_power.c
915
set_bit(domain, power_domain_set->mask.bits);
drivers/gpu/drm/i915/display/intel_display_power.c
928
!bitmap_subset(mask->bits, power_domain_set->mask.bits, POWER_DOMAIN_NUM));
drivers/gpu/drm/i915/display/intel_display_power.c
937
clear_bit(domain, power_domain_set->mask.bits);
drivers/gpu/drm/i915/display/intel_display_power.h
131
DECLARE_BITMAP(bits, POWER_DOMAIN_NUM);
drivers/gpu/drm/i915/display/intel_display_power.h
170
for_each_if(test_bit((__domain), (__mask)->bits))
drivers/gpu/drm/i915/display/intel_display_power_map.c
1771
bitmap_fill(power_well->domains.bits, POWER_DOMAIN_NUM);
drivers/gpu/drm/i915/display/intel_display_power_map.c
1777
set_bit(inst->domain_list->list[j], power_well->domains.bits);
drivers/gpu/drm/i915/display/intel_display_power_well.c
1401
#define BITS_SET(val, bits) (((val) & (bits)) == (bits))
drivers/gpu/drm/i915/display/intel_display_power_well.c
199
u32 bits = 0;
drivers/gpu/drm/i915/display/intel_display_power_well.c
202
bits |= DSS_PIPE_A_GATING_DISABLED;
drivers/gpu/drm/i915/display/intel_display_power_well.c
204
bits |= DSS_PIPE_B_GATING_DISABLED;
drivers/gpu/drm/i915/display/intel_display_power_well.c
206
bits |= DSS_PIPE_C_GATING_DISABLED;
drivers/gpu/drm/i915/display/intel_display_power_well.c
208
bits |= DSS_PIPE_D_GATING_DISABLED;
drivers/gpu/drm/i915/display/intel_display_power_well.c
210
return bits;
drivers/gpu/drm/i915/display/intel_display_power_well.c
217
u32 bits = dss_pipe_gating_bits(irq_pipe_mask);
drivers/gpu/drm/i915/display/intel_display_power_well.c
220
if (!bits)
drivers/gpu/drm/i915/display/intel_display_power_well.c
228
set = disable ? bits : 0;
drivers/gpu/drm/i915/display/intel_display_power_well.c
229
clear = disable ? 0 : bits;
drivers/gpu/drm/i915/display/intel_fb.c
2169
if (!atomic_read(&front->bits))
drivers/gpu/drm/i915/display/intel_frontbuffer.c
196
atomic_set(&front->bits, 0);
drivers/gpu/drm/i915/display/intel_frontbuffer.c
202
drm_WARN_ON(front->display->drm, atomic_read(&front->bits));
drivers/gpu/drm/i915/display/intel_frontbuffer.c
232
!(atomic_read(&old->bits) & frontbuffer_bits));
drivers/gpu/drm/i915/display/intel_frontbuffer.c
233
atomic_andnot(frontbuffer_bits, &old->bits);
drivers/gpu/drm/i915/display/intel_frontbuffer.c
238
atomic_read(&new->bits) & frontbuffer_bits);
drivers/gpu/drm/i915/display/intel_frontbuffer.c
239
atomic_or(frontbuffer_bits, &new->bits);
drivers/gpu/drm/i915/display/intel_frontbuffer.h
120
frontbuffer_bits = atomic_read(&front->bits);
drivers/gpu/drm/i915/display/intel_frontbuffer.h
45
atomic_t bits;
drivers/gpu/drm/i915/display/intel_frontbuffer.h
92
frontbuffer_bits = atomic_read(&front->bits);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
186
u32 mask, u32 bits)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
189
drm_WARN_ON(display->drm, bits & ~mask);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
191
intel_de_rmw(display, PORT_HOTPLUG_EN(display), mask, bits);
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
208
u32 bits)
drivers/gpu/drm/i915/display/intel_hotplug_irq.c
211
i915_hotplug_interrupt_update_locked(display, mask, bits);
drivers/gpu/drm/i915/display/intel_hotplug_irq.h
26
u32 mask, u32 bits);
drivers/gpu/drm/i915/display/intel_hotplug_irq.h
28
u32 mask, u32 bits);
drivers/gpu/drm/i915/display/intel_initial_plane.c
175
atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
drivers/gpu/drm/i915/display/intel_modeset_setup.c
1008
if (drm_WARN_ON(display->drm, !bitmap_empty(put_domains.bits, POWER_DOMAIN_NUM)))
drivers/gpu/drm/i915/display/intel_pfit.c
394
u32 bits;
drivers/gpu/drm/i915/display/intel_pfit.c
407
bits = panel_fitter_scaling(pipe_src_h,
drivers/gpu/drm/i915/display/intel_pfit.c
410
*pfit_pgm_ratios |= (PFIT_HORIZ_SCALE(bits) |
drivers/gpu/drm/i915/display/intel_pfit.c
411
PFIT_VERT_SCALE(bits));
drivers/gpu/drm/i915/display/intel_pfit.c
422
bits = panel_fitter_scaling(pipe_src_w,
drivers/gpu/drm/i915/display/intel_pfit.c
425
*pfit_pgm_ratios |= (PFIT_HORIZ_SCALE(bits) |
drivers/gpu/drm/i915/display/intel_pfit.c
426
PFIT_VERT_SCALE(bits));
drivers/gpu/drm/i915/gt/intel_gtt.h
110
#define HSW_CACHEABILITY_CONTROL(bits) ((((bits) & 0x7) << 1) | \
drivers/gpu/drm/i915/gt/intel_gtt.h
111
(((bits) & 0x8) << (11 - 3)))
drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h
185
u32 bits[SLPC_OVERRIDE_BITFIELD_SIZE];
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
94
data->override_params.bits[id >> 5] |= (1 << (id % 32));
drivers/gpu/drm/i915/i915_cmd_parser.c
1309
if (desc->bits[i].mask == 0)
drivers/gpu/drm/i915/i915_cmd_parser.c
1312
if (desc->bits[i].condition_mask != 0) {
drivers/gpu/drm/i915/i915_cmd_parser.c
1314
desc->bits[i].condition_offset;
drivers/gpu/drm/i915/i915_cmd_parser.c
1316
desc->bits[i].condition_mask;
drivers/gpu/drm/i915/i915_cmd_parser.c
1322
if (desc->bits[i].offset >= length) {
drivers/gpu/drm/i915/i915_cmd_parser.c
1328
dword = cmd[desc->bits[i].offset] &
drivers/gpu/drm/i915/i915_cmd_parser.c
1329
desc->bits[i].mask;
drivers/gpu/drm/i915/i915_cmd_parser.c
1331
if (dword != desc->bits[i].expected) {
drivers/gpu/drm/i915/i915_cmd_parser.c
1334
desc->bits[i].mask,
drivers/gpu/drm/i915/i915_cmd_parser.c
1335
desc->bits[i].expected,
drivers/gpu/drm/i915/i915_cmd_parser.c
178
} bits[MAX_CMD_DESC_BITMASKS];
drivers/gpu/drm/i915/i915_cmd_parser.c
233
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
240
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
263
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
270
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
276
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
282
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
290
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
299
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
341
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
348
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
368
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
385
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
392
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
412
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
422
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
429
.bits = {{
drivers/gpu/drm/i915/i915_cmd_parser.c
504
.bits = {{
drivers/gpu/drm/i915/i915_ptr_util.h
16
#define ptr_unpack_bits(ptr, bits, n) ({ \
drivers/gpu/drm/i915/i915_ptr_util.h
18
*(bits) = __v & (BIT(n) - 1); \
drivers/gpu/drm/i915/i915_ptr_util.h
22
#define ptr_pack_bits(ptr, bits, n) ({ \
drivers/gpu/drm/i915/i915_ptr_util.h
23
unsigned long __bits = (bits); \
drivers/gpu/drm/i915/i915_ptr_util.h
40
#define page_pack_bits(ptr, bits) ptr_pack_bits(ptr, bits, PAGE_SHIFT)
drivers/gpu/drm/i915/i915_ptr_util.h
41
#define page_unpack_bits(ptr, bits) ptr_unpack_bits(ptr, bits, PAGE_SHIFT)
drivers/gpu/drm/imx/dc/dc-fl.c
60
u32 bits = 0, shifts = 0;
drivers/gpu/drm/imx/dc/dc-fl.c
68
dc_fu_get_pixel_format_bits(fu, format->format, &bits);
drivers/gpu/drm/imx/dc/dc-fl.c
71
regmap_write(fu->reg_cfg, COLORCOMPONENTBITS(frac), bits);
drivers/gpu/drm/imx/dc/dc-fu.c
59
u32 bits;
drivers/gpu/drm/imx/dc/dc-fu.c
71
void dc_fu_get_pixel_format_bits(struct dc_fu *fu, u32 format, u32 *bits)
drivers/gpu/drm/imx/dc/dc-fu.c
77
*bits = pixel_formats[i].bits;
drivers/gpu/drm/imx/dc/dc-fu.h
121
void dc_fu_get_pixel_format_bits(struct dc_fu *fu, u32 format, u32 *bits);
drivers/gpu/drm/imx/dc/dc-fw.c
83
u32 bits = 0, shifts = 0;
drivers/gpu/drm/imx/dc/dc-fw.c
96
dc_fu_get_pixel_format_bits(fu, format->format, &bits);
drivers/gpu/drm/imx/dc/dc-fw.c
99
regmap_write(fu->reg_cfg, COLORCOMPONENTBITS(frac), bits);
drivers/gpu/drm/mediatek/mtk_cec.c
61
unsigned int bits)
drivers/gpu/drm/mediatek/mtk_cec.c
67
tmp &= ~bits;
drivers/gpu/drm/mediatek/mtk_cec.c
72
unsigned int bits)
drivers/gpu/drm/mediatek/mtk_cec.c
78
tmp |= bits;
drivers/gpu/drm/meson/meson_registers.h
1852
#define VIU_OSD_BLEND_DIN_EN(bits) ((bits & 0xf) << 20)
drivers/gpu/drm/nouveau/dispnv50/atom.h
106
u8 bits:2;
drivers/gpu/drm/nouveau/dispnv50/head.c
121
asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS);
drivers/gpu/drm/nouveau/dispnv50/head507d.c
60
NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
drivers/gpu/drm/nouveau/dispnv50/head907d.c
89
NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
drivers/gpu/drm/nouveau/dispnv50/head917d.c
42
NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
drivers/gpu/drm/nouveau/dispnv50/headc37d.c
97
NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
drivers/gpu/drm/nouveau/dispnv50/headca7d.c
102
NVVAL(NVCA7D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) |
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
50
typedef int (*nvkm_event_func)(struct nvkm_event_ntfy *, u32 bits);
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
55
u32 bits;
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
65
void nvkm_event_ntfy(struct nvkm_event *, int id, u32 bits);
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
66
bool nvkm_event_ntfy_valid(struct nvkm_event *, int id, u32 bits);
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
67
void nvkm_event_ntfy_add(struct nvkm_event *, int id, u32 bits, bool wait, nvkm_event_func,
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
73
typedef int (*nvkm_uevent_func)(struct nvkm_object *, u64 token, u32 bits);
drivers/gpu/drm/nouveau/include/nvkm/core/event.h
76
int nvkm_uevent_add(struct nvkm_uevent *, struct nvkm_event *, int id, u32 bits, nvkm_uevent_func);
drivers/gpu/drm/nouveau/include/nvkm/core/ramht.h
18
int bits;
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/M0209.h
9
u8 bits;
drivers/gpu/drm/nouveau/nouveau_connector.c
1190
nouveau_connector_hpd(struct nouveau_connector *nv_connector, u64 bits)
drivers/gpu/drm/nouveau/nouveau_connector.c
1198
nv_connector->hpd_pending |= bits;
drivers/gpu/drm/nouveau/nouveau_connector.h
203
void nouveau_connector_hpd(struct nouveau_connector *, u64 bits);
drivers/gpu/drm/nouveau/nouveau_display.c
449
u64 bits, old_epoch_counter = connector->epoch_counter;
drivers/gpu/drm/nouveau/nouveau_display.c
455
bits = nv_connector->hpd_pending;
drivers/gpu/drm/nouveau/nouveau_display.c
461
!!(bits & NVIF_CONN_EVENT_V0_PLUG),
drivers/gpu/drm/nouveau/nouveau_display.c
462
!!(bits & NVIF_CONN_EVENT_V0_UNPLUG),
drivers/gpu/drm/nouveau/nouveau_display.c
463
!!(bits & NVIF_CONN_EVENT_V0_IRQ));
drivers/gpu/drm/nouveau/nouveau_display.c
465
if (bits & NVIF_CONN_EVENT_V0_IRQ) {
drivers/gpu/drm/nouveau/nvkm/core/event.c
102
nvkm_trace(subdev, "event: ntfy block %08x on %d wait:%d\n", ntfy->bits, ntfy->id, wait);
drivers/gpu/drm/nouveau/nvkm/core/event.c
121
nvkm_trace(ntfy->event->subdev, "event: ntfy allow %08x on %d\n", ntfy->bits, ntfy->id);
drivers/gpu/drm/nouveau/nvkm/core/event.c
138
nvkm_trace(event->subdev, "event: ntfy del %08x on %d\n", ntfy->bits, ntfy->id);
drivers/gpu/drm/nouveau/nvkm/core/event.c
146
nvkm_event_ntfy_add(struct nvkm_event *event, int id, u32 bits, bool wait, nvkm_event_func func,
drivers/gpu/drm/nouveau/nvkm/core/event.c
149
nvkm_trace(event->subdev, "event: ntfy add %08x on %d wait:%d\n", id, bits, wait);
drivers/gpu/drm/nouveau/nvkm/core/event.c
153
ntfy->bits = bits;
drivers/gpu/drm/nouveau/nvkm/core/event.c
164
nvkm_event_ntfy_valid(struct nvkm_event *event, int id, u32 bits)
drivers/gpu/drm/nouveau/nvkm/core/event.c
170
nvkm_event_ntfy(struct nvkm_event *event, int id, u32 bits)
drivers/gpu/drm/nouveau/nvkm/core/event.c
178
nvkm_trace(event->subdev, "event: ntfy %08x on %d\n", bits, id);
drivers/gpu/drm/nouveau/nvkm/core/event.c
182
if (ntfy->id == id && ntfy->bits & bits) {
drivers/gpu/drm/nouveau/nvkm/core/event.c
184
ntfy->func(ntfy, ntfy->bits & bits);
drivers/gpu/drm/nouveau/nvkm/core/event.c
70
nvkm_event_put(ntfy->event, ntfy->bits, ntfy->id);
drivers/gpu/drm/nouveau/nvkm/core/event.c
73
nvkm_event_get(ntfy->event, ntfy->bits, ntfy->id);
drivers/gpu/drm/nouveau/nvkm/core/ramht.c
153
ramht->bits = order_base_2(ramht->size);
drivers/gpu/drm/nouveau/nvkm/core/ramht.c
32
hash ^= (handle & ((1 << ramht->bits) - 1));
drivers/gpu/drm/nouveau/nvkm/core/ramht.c
33
handle >>= ramht->bits;
drivers/gpu/drm/nouveau/nvkm/core/ramht.c
36
hash ^= chid << (ramht->bits - 4);
drivers/gpu/drm/nouveau/nvkm/core/uevent.c
113
nvkm_uevent_ntfy(struct nvkm_event_ntfy *ntfy, u32 bits)
drivers/gpu/drm/nouveau/nvkm/core/uevent.c
119
return uevent->func(uevent->parent, uevent->object.object, bits);
drivers/gpu/drm/nouveau/nvkm/core/uevent.c
125
nvkm_uevent_add(struct nvkm_uevent *uevent, struct nvkm_event *event, int id, u32 bits,
drivers/gpu/drm/nouveau/nvkm/core/uevent.c
131
nvkm_event_ntfy_add(event, id, bits, uevent->wait, nvkm_uevent_ntfy, &uevent->ntfy);
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
1660
int ret, bits;
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
1713
bits = pdev->device.mmu->dma_bits;
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
1715
bits = 32;
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
1717
ret = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(bits));
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
1718
if (ret && bits != 32) {
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
102
u64 bits = 0;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
122
if (args->v0.types & NVIF_CONN_EVENT_V0_PLUG ) bits |= NVKM_DPYID_PLUG;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
123
if (args->v0.types & NVIF_CONN_EVENT_V0_UNPLUG) bits |= NVKM_DPYID_UNPLUG;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
124
if (args->v0.types & NVIF_CONN_EVENT_V0_IRQ ) bits |= NVKM_DPYID_IRQ;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
126
return nvkm_uevent_add(uevent, &disp->rm.event, outp->index, bits,
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
131
if (args->v0.types & NVIF_CONN_EVENT_V0_PLUG ) bits |= NVKM_I2C_PLUG;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
132
if (args->v0.types & NVIF_CONN_EVENT_V0_UNPLUG) bits |= NVKM_I2C_UNPLUG;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
133
if (args->v0.types & NVIF_CONN_EVENT_V0_IRQ ) bits |= NVKM_I2C_IRQ;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
135
return nvkm_uevent_add(uevent, &device->i2c->event, outp->dp.aux->id, bits,
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
139
if (args->v0.types & NVIF_CONN_EVENT_V0_PLUG ) bits |= NVKM_GPIO_HI;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
140
if (args->v0.types & NVIF_CONN_EVENT_V0_UNPLUG) bits |= NVKM_GPIO_LO;
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
147
return nvkm_uevent_add(uevent, &device->gpio->event, conn->info.hpd, bits,
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
34
nvkm_uconn_uevent_gsp(struct nvkm_object *object, u64 token, u32 bits)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
40
if (bits & NVKM_DPYID_PLUG)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
42
if (bits & NVKM_DPYID_UNPLUG)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
44
if (bits & NVKM_DPYID_IRQ)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
51
nvkm_uconn_uevent_aux(struct nvkm_object *object, u64 token, u32 bits)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
57
if (bits & NVKM_I2C_PLUG)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
59
if (bits & NVKM_I2C_UNPLUG)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
61
if (bits & NVKM_I2C_IRQ)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
68
nvkm_uconn_uevent_gpio(struct nvkm_object *object, u64 token, u32 bits)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
74
if (bits & NVKM_GPIO_HI)
drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c
76
if (bits & NVKM_GPIO_LO)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
35
unsigned bits:6;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
78
nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
111
} while ((++c)->bits);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
478
((ramht->bits - 9) << 16) |
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
65
u32 rm = ((1ULL << c->bits) - 1) << c->regs;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
66
u32 cm = ((1ULL << c->bits) - 1) << c->ctxs;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
70
} while ((++c)->bits);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
76
} while ((++c)->bits);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
105
((ramht->bits - 9) << 16) |
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
195
((ramht->bits - 9) << 16) |
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
111
nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c
39
gf100_sw_chan_vblsem_release(struct nvkm_event_ntfy *notify, u32 bits)
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c
39
nv50_sw_chan_vblsem_release(struct nvkm_event_ntfy *notify, u32 bits)
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
121
u32 bits = (i % M0209E.modulo) * M0209E.bits;
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
122
u32 mask = (1ULL << M0209E.bits) - 1;
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
123
u16 off = bits / 8;
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
124
u8 mod = bits % 8;
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
82
info->bits = nvbios_rd08(bios, data + 0x00) & 0x3f;
drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c
120
gv100_fault_ntfy_nrpfb(struct nvkm_event_ntfy *ntfy, u32 bits)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c
114
for (desc = page->desc; desc->bits; desc++) {
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c
116
page_shift += desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c
121
page_shift -= desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c
124
ctrl->levels[i].size = BIT_ULL(desc->bits) * desc->size;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c
142
ctrl->numEntries = 1 << vmm->func->page[0].desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c
159
u32 bits = (nvkm_rd32(device, 0x100c80) & 0x00001000) ? 16 : 17;
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c
171
if (ltc->num_tags > (1 << bits))
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c
172
ltc->num_tags = 1 << bits; /* we have 16/17 bits in PTE */
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1117
int levels, bits = 0, ret;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1139
for (levels = 0, desc = page->desc; desc->bits; desc++, levels++)
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1140
bits += desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1141
bits += page->shift;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1158
const u32 size = pd_header + desc->size * (1 << desc->bits);
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1175
vmm->limit = 1ULL << bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1207
vmm->limit = size ? (addr + size) : (1ULL << bits);
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
1208
if (vmm->start > vmm->limit || vmm->limit > (1ULL << bits))
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
202
const u32 sptb = desc->bits - pair->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
310
const u32 sptb = desc->bits - pair->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
43
const u32 pten = 1 << desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
444
u32 pten = 1 << desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
50
lpte = pten >> (desc->bits - pair->bits);
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
531
u64 bits = addr >> page->shift;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
540
for (it.lvl = 0; desc[it.lvl].bits; it.lvl++) {
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
541
it.pte[it.lvl] = bits & ((1 << desc[it.lvl].bits) - 1);
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
542
bits >>= desc[it.lvl].bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
556
const u32 pten = 1 << desc->bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
600
while (it.pte[it.lvl] == (1 << desc[it.lvl].bits)) {
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
616
addr = addr << desc[it.max].bits;
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h
104
u8 bits; /* VMA bits covered by PT. */
drivers/gpu/drm/omapdrm/dss/dispc.c
237
u32 bits;
drivers/gpu/drm/omapdrm/dss/dispc.c
257
.bits = 8,
drivers/gpu/drm/omapdrm/dss/dispc.c
280
.bits = 10,
drivers/gpu/drm/omapdrm/dss/dispc.c
303
.bits = 8,
drivers/gpu/drm/omapdrm/dss/dispc.c
326
.bits = 8,
drivers/gpu/drm/omapdrm/dss/dispc.c
3740
r >>= 16 - gdesc->bits;
drivers/gpu/drm/omapdrm/dss/dispc.c
3741
g >>= 16 - gdesc->bits;
drivers/gpu/drm/omapdrm/dss/dispc.c
3742
b >>= 16 - gdesc->bits;
drivers/gpu/drm/omapdrm/dss/dispc.c
3744
table[first + j] = (r << (gdesc->bits * 2)) |
drivers/gpu/drm/omapdrm/dss/dispc.c
3745
(g << gdesc->bits) | b;
drivers/gpu/drm/omapdrm/omap_dmm_tiler.h
65
#define MASK(bits) ((1 << (bits)) - 1)
drivers/gpu/drm/qxl/qxl_dev.h
264
uint32_t bits;
drivers/gpu/drm/radeon/cik_reg.h
235
} bitfields, bits;
drivers/gpu/drm/radeon/radeon_device.c
1183
unsigned bits = ilog2(radeon_vm_size) + 18;
drivers/gpu/drm/radeon/radeon_device.c
1188
radeon_vm_block_size = bits - 9;
drivers/gpu/drm/radeon/radeon_device.c
1190
radeon_vm_block_size = (bits + 3) / 2;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1820
alpha->src_color_ctrl.bits.blend_mode = ALPHA_GLOBAL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1822
alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1824
alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1826
alpha->src_color_ctrl.bits.alpha_en = 1;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1828
if (alpha->src_color_ctrl.bits.blend_mode == ALPHA_GLOBAL) {
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1829
alpha->src_color_ctrl.bits.color_mode = src_color_mode;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1830
alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_SRC_GLOBAL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1831
} else if (alpha->src_color_ctrl.bits.blend_mode == ALPHA_PER_PIX) {
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1832
alpha->src_color_ctrl.bits.color_mode = src_color_mode;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1833
alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_ONE;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1835
alpha->src_color_ctrl.bits.color_mode = ALPHA_SRC_PRE_MUL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1836
alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_SRC_GLOBAL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1838
alpha->src_color_ctrl.bits.glb_alpha = alpha_config->src_glb_alpha_value >> 8;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1839
alpha->src_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1840
alpha->src_color_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1842
alpha->dst_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1843
alpha->dst_color_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1844
alpha->dst_color_ctrl.bits.blend_mode = ALPHA_GLOBAL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1845
alpha->dst_color_ctrl.bits.glb_alpha = alpha_config->dst_glb_alpha_value >> 8;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1846
alpha->dst_color_ctrl.bits.color_mode = dst_color_mode;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1847
alpha->dst_color_ctrl.bits.factor_mode = ALPHA_SRC_INVERSE;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1849
alpha->src_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1850
alpha->src_alpha_ctrl.bits.blend_mode = alpha->src_color_ctrl.bits.blend_mode;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1851
alpha->src_alpha_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1852
alpha->src_alpha_ctrl.bits.factor_mode = ALPHA_ONE;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1854
alpha->dst_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1856
alpha->dst_alpha_ctrl.bits.blend_mode = ALPHA_PER_PIX;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1858
alpha->dst_alpha_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1859
alpha->dst_alpha_ctrl.bits.alpha_cal_mode = ALPHA_NO_SATURATION;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1860
alpha->dst_alpha_ctrl.bits.factor_mode = ALPHA_SRC_INVERSE;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
1921
alpha.src_color_ctrl.bits.src_dst_swap = swap;
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
38
} bits;
drivers/gpu/drm/sprd/sprd_dpu.h
77
u32 bits = readl_relaxed(ctx->base + offset);
drivers/gpu/drm/sprd/sprd_dpu.h
79
writel(bits | set_bits, ctx->base + offset);
drivers/gpu/drm/sprd/sprd_dpu.h
85
u32 bits = readl_relaxed(ctx->base + offset);
drivers/gpu/drm/sprd/sprd_dpu.h
87
writel(bits & ~clr_bits, ctx->base + offset);
drivers/gpu/drm/tegra/hda.c
14
unsigned int mul, div, bits, channels;
drivers/gpu/drm/tegra/hda.c
33
fmt->bits = 8;
drivers/gpu/drm/tegra/hda.c
37
fmt->bits = 16;
drivers/gpu/drm/tegra/hda.c
41
fmt->bits = 20;
drivers/gpu/drm/tegra/hda.c
45
fmt->bits = 24;
drivers/gpu/drm/tegra/hda.c
49
fmt->bits = 32;
drivers/gpu/drm/tegra/hda.c
53
bits = (format & AC_FMT_BITS_MASK) >> AC_FMT_BITS_SHIFT;
drivers/gpu/drm/tegra/hda.c
54
WARN(1, "invalid number of bits: %#x\n", bits);
drivers/gpu/drm/tegra/hda.c
55
fmt->bits = 8;
drivers/gpu/drm/tegra/hda.h
14
unsigned int bits;
drivers/gpu/drm/vc4/vc4_render_cl.c
145
rcl_u16(setup, args->color_read.bits);
drivers/gpu/drm/vc4/vc4_render_cl.c
167
rcl_u16(setup, args->zs_read.bits);
drivers/gpu/drm/vc4/vc4_render_cl.c
194
uint32_t bits = VC4_LOADSTORE_FULL_RES_DISABLE_ZS;
drivers/gpu/drm/vc4/vc4_render_cl.c
197
bits |= VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL;
drivers/gpu/drm/vc4/vc4_render_cl.c
199
bits |= VC4_LOADSTORE_FULL_RES_EOF;
drivers/gpu/drm/vc4/vc4_render_cl.c
204
bits);
drivers/gpu/drm/vc4/vc4_render_cl.c
210
uint32_t bits = VC4_LOADSTORE_FULL_RES_DISABLE_COLOR;
drivers/gpu/drm/vc4/vc4_render_cl.c
215
bits |= VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL;
drivers/gpu/drm/vc4/vc4_render_cl.c
217
bits |= VC4_LOADSTORE_FULL_RES_EOF;
drivers/gpu/drm/vc4/vc4_render_cl.c
222
bits);
drivers/gpu/drm/vc4/vc4_render_cl.c
232
rcl_u16(setup, args->zs_write.bits |
drivers/gpu/drm/vc4/vc4_render_cl.c
364
rcl_u16(setup, args->color_write.bits);
drivers/gpu/drm/vc4/vc4_render_cl.c
414
if (surf->flags != 0 || surf->bits != 0) {
drivers/gpu/drm/vc4/vc4_render_cl.c
441
uint8_t tiling = VC4_GET_FIELD(surf->bits,
drivers/gpu/drm/vc4/vc4_render_cl.c
443
uint8_t buffer = VC4_GET_FIELD(surf->bits,
drivers/gpu/drm/vc4/vc4_render_cl.c
445
uint8_t format = VC4_GET_FIELD(surf->bits,
drivers/gpu/drm/vc4/vc4_render_cl.c
471
if (surf->bits != 0) {
drivers/gpu/drm/vc4/vc4_render_cl.c
484
if (surf->bits & ~(VC4_LOADSTORE_TILE_BUFFER_TILING_MASK |
drivers/gpu/drm/vc4/vc4_render_cl.c
488
surf->bits);
drivers/gpu/drm/vc4/vc4_render_cl.c
540
uint8_t tiling = VC4_GET_FIELD(surf->bits,
drivers/gpu/drm/vc4/vc4_render_cl.c
542
uint8_t format = VC4_GET_FIELD(surf->bits,
drivers/gpu/drm/vc4/vc4_render_cl.c
551
if (surf->bits & ~(VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK |
drivers/gpu/drm/vc4/vc4_render_cl.c
556
surf->bits);
drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h
188
u32 bits[SLPC_OVERRIDE_BITFIELD_SIZE];
drivers/gpu/drm/xe/xe_irq.c
63
static void unmask_and_enable(struct xe_tile *tile, u32 irqregs, u32 bits)
drivers/gpu/drm/xe/xe_irq.c
73
xe_mmio_write32(mmio, IER(irqregs), bits);
drivers/gpu/drm/xe/xe_irq.c
74
xe_mmio_write32(mmio, IMR(irqregs), ~bits);
drivers/hid/hid-creative-sb0540.c
123
static inline u64 reverse(u64 data, int bits)
drivers/hid/hid-creative-sb0540.c
129
for (i = 0; i < bits; i++) {
drivers/hid/hid-creative-sb0540.c
131
<< (bits - 1 - i);
drivers/hid/hid-mcp2200.c
131
unsigned long *bits)
drivers/hid/hid-mcp2200.c
142
value |= (*mask & *bits);
drivers/hid/hid-mcp2200.c
170
unsigned long *bits)
drivers/hid/hid-mcp2200.c
181
*bits = (val & *mask);
drivers/hid/hid-mcp2200.c
187
unsigned long mask = 0, bits = 0;
drivers/hid/hid-mcp2200.c
190
mcp_get_multiple(gc, &mask, &bits);
drivers/hid/hid-mcp2200.c
191
return bits > 0;
drivers/hid/hid-mcp2200.c
210
unsigned long bits = mcp->gpio_val;
drivers/hid/hid-mcp2200.c
251
mcp_set_multiple(gc, &mask, &bits);
drivers/hwmon/ltc2992.c
235
unsigned long *bits)
drivers/hwmon/ltc2992.c
253
set_bit(gpio_nr, bits);
drivers/hwmon/ltc2992.c
284
unsigned long *bits)
drivers/hwmon/max31790.c
137
u8 bits;
drivers/hwmon/max31790.c
140
bits = 0x0;
drivers/hwmon/max31790.c
142
bits = 0x1;
drivers/hwmon/max31790.c
144
bits = 0x2;
drivers/hwmon/max31790.c
146
bits = 0x3;
drivers/hwmon/max31790.c
148
bits = 0x4;
drivers/hwmon/max31790.c
150
bits = 0x5;
drivers/hwmon/max31790.c
152
return bits;
drivers/hwmon/max31790.c
208
u8 bits, fan_config;
drivers/hwmon/max31790.c
214
bits = bits_for_tach_period(val);
drivers/hwmon/max31790.c
218
(bits << MAX31790_FAN_DYN_SR_SHIFT));
drivers/hwmon/pmbus/adm1266.c
194
unsigned long *bits)
drivers/hwmon/pmbus/adm1266.c
212
*bits = 0;
drivers/hwmon/pmbus/adm1266.c
215
set_bit(gpio_nr, bits);
drivers/hwmon/pmbus/adm1266.c
228
set_bit(gpio_nr, bits);
drivers/hwmon/pmbus/pmbus_core.c
2909
const struct pmbus_status_assoc *bits; /* zero-terminated */
drivers/hwmon/pmbus/pmbus_core.c
2916
.bits = (const struct pmbus_status_assoc[]) {
drivers/hwmon/pmbus/pmbus_core.c
2930
.bits = (const struct pmbus_status_assoc[]) {
drivers/hwmon/pmbus/pmbus_core.c
2942
.bits = (const struct pmbus_status_assoc[]) {
drivers/hwmon/pmbus/pmbus_core.c
3020
for (bit = cat->bits; bit->pflag; bit++)
drivers/hwmon/pmbus/pmbus_core.c
3484
for (bit = cat->bits; bit->pflag; bit++)
drivers/i2c/busses/i2c-i801.c
1461
i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits,
drivers/i2c/busses/i2c-i801.c
1489
status = acpi_os_read_port(address, (u32 *)value, bits);
drivers/i2c/busses/i2c-i801.c
1491
status = acpi_os_write_port(address, (u32)*value, bits);
drivers/i2c/busses/i2c-imx.c
379
static void i2c_imx_clear_irq(struct imx_i2c_struct *i2c_imx, unsigned int bits)
drivers/i2c/busses/i2c-imx.c
388
temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits;
drivers/i2c/busses/i2c-mlxbf.c
524
u32 bits;
drivers/i2c/busses/i2c-mlxbf.c
534
bits, !(bits & MLXBF_I2C_MASTER_BUSY_BIT),
drivers/i2c/busses/i2c-mlxbf.c
687
u32 bits;
drivers/i2c/busses/i2c-mlxbf.c
709
bits, !(bits & MLXBF_I2C_MASTER_LOCK_BIT),
drivers/i2c/busses/i2c-mlxbf.c
721
bits, !(bits & MLXBF_I2C_SMBUS_MASTER_FSM_STOP_MASK),
drivers/i2c/busses/i2c-omap.c
1054
u16 bits;
drivers/i2c/busses/i2c-omap.c
1059
bits = omap_i2c_read_reg(omap, OMAP_I2C_IE_REG);
drivers/i2c/busses/i2c-omap.c
1061
stat &= bits;
drivers/i2c/busses/i2c-pxa.c
299
decode_bits(const char *prefix, const struct bits *bits, int num, u32 val)
drivers/i2c/busses/i2c-pxa.c
303
const char *str = val & bits->mask ? bits->set : bits->unset;
drivers/i2c/busses/i2c-pxa.c
306
bits++;
drivers/i2c/busses/i2c-pxa.c
311
static const struct bits isr_bits[] = {
drivers/i2c/busses/i2c-pxa.c
331
static const struct bits icr_bits[] = {
drivers/i2c/i2c-core-acpi.c
671
u32 bits, u64 *value64,
drivers/i3c/master/mipi-i3c-hci/cmd.h
50
#define hci_get_tid(bits) \
drivers/iio/accel/adis16201.c
104
int bits;
drivers/iio/accel/adis16201.c
157
bits = 12;
drivers/iio/accel/adis16201.c
160
bits = 9;
drivers/iio/accel/adis16201.c
170
*val = sign_extend32(val16, bits - 1);
drivers/iio/accel/adis16209.c
136
int bits;
drivers/iio/accel/adis16209.c
196
bits = 14;
drivers/iio/accel/adis16209.c
206
*val = sign_extend32(val16, bits - 1);
drivers/iio/accel/adxl372.c
1083
if (mask == adxl372_axis_lookup_table[i].bits)
drivers/iio/accel/adxl372.c
1091
st->fifo_axis_mask = adxl372_axis_lookup_table[i].bits;
drivers/iio/accel/adxl372.c
290
unsigned int bits;
drivers/iio/accel/bmc150-accel-core.c
1055
#define BMC150_ACCEL_CHANNEL(_axis, bits) { \
drivers/iio/accel/bmc150-accel-core.c
1065
.realbits = (bits), \
drivers/iio/accel/bmc150-accel-core.c
1067
.shift = 16 - (bits), \
drivers/iio/accel/bmc150-accel-core.c
1075
#define BMC150_ACCEL_CHANNELS(bits) { \
drivers/iio/accel/bmc150-accel-core.c
1083
BMC150_ACCEL_CHANNEL(X, bits), \
drivers/iio/accel/bmc150-accel-core.c
1084
BMC150_ACCEL_CHANNEL(Y, bits), \
drivers/iio/accel/bmc150-accel-core.c
1085
BMC150_ACCEL_CHANNEL(Z, bits), \
drivers/iio/accel/mma8452.c
1226
#define MMA8452_CHANNEL(axis, idx, bits) { \
drivers/iio/accel/mma8452.c
1239
.realbits = (bits), \
drivers/iio/accel/mma8452.c
1241
.shift = 16 - (bits), \
drivers/iio/accel/mma8452.c
1249
#define MMA8652_CHANNEL(axis, idx, bits) { \
drivers/iio/accel/mma8452.c
1261
.realbits = (bits), \
drivers/iio/accel/mma8452.c
1263
.shift = 16 - (bits), \
drivers/iio/adc/88pm886-gpadc.c
147
unsigned int bits = BIT(gpadc_num + 4) | BIT(gpadc_num);
drivers/iio/adc/88pm886-gpadc.c
149
return regmap_assign_bits(gpadc->map, PM886_REG_GPADC_CONFIG(0x14), bits, on);
drivers/iio/adc/ad4062.c
231
#define AD4062_CHAN(bits) { \
drivers/iio/adc/ad4062.c
245
.ext_scan_type = ad4062_scan_type_##bits##_s, \
drivers/iio/adc/ad4062.c
246
.num_ext_scan_type = ARRAY_SIZE(ad4062_scan_type_##bits##_s), \
drivers/iio/adc/ad4080.c
480
#define AD4080_CHANNEL_DEFINE(bits, storage, idx) { \
drivers/iio/adc/ad4080.c
493
.realbits = (bits), \
drivers/iio/adc/ad4080.c
503
#define AD4880_CHANNEL_DEFINE(bits, storage, idx) { \
drivers/iio/adc/ad4080.c
516
.realbits = (bits), \
drivers/iio/adc/ad7091r-base.h
39
#define AD7091R_CHANNEL(idx, bits, ev, num_ev) { \
drivers/iio/adc/ad7091r-base.h
48
.scan_type.realbits = bits, \
drivers/iio/adc/ad7380.c
314
#define _AD7380_CHANNEL(index, bits, diff, sign, gain) { \
drivers/iio/adc/ad7380.c
329
.ext_scan_type = ad7380_scan_type_##bits##_##sign, \
drivers/iio/adc/ad7380.c
330
.num_ext_scan_type = ARRAY_SIZE(ad7380_scan_type_##bits##_##sign), \
drivers/iio/adc/ad7380.c
335
#define _AD7380_OFFLOAD_CHANNEL(index, bits, diff, sign, gain) { \
drivers/iio/adc/ad7380.c
352
.ext_scan_type = ad7380_scan_type_##bits##_##sign##_offload, \
drivers/iio/adc/ad7380.c
354
ARRAY_SIZE(ad7380_scan_type_##bits##_##sign##_offload), \
drivers/iio/adc/ad7380.c
370
#define AD7380_CHANNEL(index, bits, diff, sign) \
drivers/iio/adc/ad7380.c
371
_AD7380_CHANNEL(index, bits, diff, sign, false)
drivers/iio/adc/ad7380.c
373
#define ADAQ4380_CHANNEL(index, bits, diff, sign) \
drivers/iio/adc/ad7380.c
374
_AD7380_CHANNEL(index, bits, diff, sign, true)
drivers/iio/adc/ad7380.c
376
#define DEFINE_AD7380_2_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
378
AD7380_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
379
AD7380_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
383
#define DEFINE_AD7380_4_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
385
AD7380_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
386
AD7380_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
387
AD7380_CHANNEL(2, bits, diff, sign), \
drivers/iio/adc/ad7380.c
388
AD7380_CHANNEL(3, bits, diff, sign), \
drivers/iio/adc/ad7380.c
392
#define DEFINE_ADAQ4380_4_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
394
ADAQ4380_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
395
ADAQ4380_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
396
ADAQ4380_CHANNEL(2, bits, diff, sign), \
drivers/iio/adc/ad7380.c
397
ADAQ4380_CHANNEL(3, bits, diff, sign), \
drivers/iio/adc/ad7380.c
401
#define DEFINE_AD7380_8_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
403
AD7380_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
404
AD7380_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
405
AD7380_CHANNEL(2, bits, diff, sign), \
drivers/iio/adc/ad7380.c
406
AD7380_CHANNEL(3, bits, diff, sign), \
drivers/iio/adc/ad7380.c
407
AD7380_CHANNEL(4, bits, diff, sign), \
drivers/iio/adc/ad7380.c
408
AD7380_CHANNEL(5, bits, diff, sign), \
drivers/iio/adc/ad7380.c
409
AD7380_CHANNEL(6, bits, diff, sign), \
drivers/iio/adc/ad7380.c
410
AD7380_CHANNEL(7, bits, diff, sign), \
drivers/iio/adc/ad7380.c
414
#define AD7380_OFFLOAD_CHANNEL(index, bits, diff, sign) \
drivers/iio/adc/ad7380.c
415
_AD7380_OFFLOAD_CHANNEL(index, bits, diff, sign, false)
drivers/iio/adc/ad7380.c
417
#define ADAQ4380_OFFLOAD_CHANNEL(index, bits, diff, sign) \
drivers/iio/adc/ad7380.c
418
_AD7380_OFFLOAD_CHANNEL(index, bits, diff, sign, true)
drivers/iio/adc/ad7380.c
420
#define DEFINE_AD7380_2_OFFLOAD_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
422
AD7380_OFFLOAD_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
423
AD7380_OFFLOAD_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
426
#define DEFINE_AD7380_4_OFFLOAD_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
428
AD7380_OFFLOAD_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
429
AD7380_OFFLOAD_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
430
AD7380_OFFLOAD_CHANNEL(2, bits, diff, sign), \
drivers/iio/adc/ad7380.c
431
AD7380_OFFLOAD_CHANNEL(3, bits, diff, sign), \
drivers/iio/adc/ad7380.c
434
#define DEFINE_ADAQ4380_4_OFFLOAD_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
436
AD7380_OFFLOAD_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
437
AD7380_OFFLOAD_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
438
AD7380_OFFLOAD_CHANNEL(2, bits, diff, sign), \
drivers/iio/adc/ad7380.c
439
AD7380_OFFLOAD_CHANNEL(3, bits, diff, sign), \
drivers/iio/adc/ad7380.c
442
#define DEFINE_AD7380_8_OFFLOAD_CHANNEL(name, bits, diff, sign) \
drivers/iio/adc/ad7380.c
444
AD7380_OFFLOAD_CHANNEL(0, bits, diff, sign), \
drivers/iio/adc/ad7380.c
445
AD7380_OFFLOAD_CHANNEL(1, bits, diff, sign), \
drivers/iio/adc/ad7380.c
446
AD7380_OFFLOAD_CHANNEL(2, bits, diff, sign), \
drivers/iio/adc/ad7380.c
447
AD7380_OFFLOAD_CHANNEL(3, bits, diff, sign), \
drivers/iio/adc/ad7380.c
448
AD7380_OFFLOAD_CHANNEL(4, bits, diff, sign), \
drivers/iio/adc/ad7380.c
449
AD7380_OFFLOAD_CHANNEL(5, bits, diff, sign), \
drivers/iio/adc/ad7380.c
450
AD7380_OFFLOAD_CHANNEL(6, bits, diff, sign), \
drivers/iio/adc/ad7380.c
451
AD7380_OFFLOAD_CHANNEL(7, bits, diff, sign), \
drivers/iio/adc/ad7476.c
156
#define _AD7476_CHAN(bits, _shift, _info_mask_sep) \
drivers/iio/adc/ad7476.c
164
.realbits = (bits), \
drivers/iio/adc/ad7476.c
171
#define ADC081S_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
drivers/iio/adc/ad7476.c
173
#define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
drivers/iio/adc/ad7476.c
175
#define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
drivers/iio/adc/ad7476.c
177
#define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
drivers/iio/adc/ad7476.c
178
#define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
drivers/iio/adc/ad7606.c
136
.bits = 16,
drivers/iio/adc/ad7606.c
1416
chan->scan_type.realbits = st->chip_info->bits;
drivers/iio/adc/ad7606.c
1423
(st->chip_info->bits > 16 ? 32 : 16);
drivers/iio/adc/ad7606.c
145
.bits = 16,
drivers/iio/adc/ad7606.c
156
.bits = 16,
drivers/iio/adc/ad7606.c
168
.bits = 16,
drivers/iio/adc/ad7606.c
180
.bits = 16,
drivers/iio/adc/ad7606.c
196
.bits = 16,
drivers/iio/adc/ad7606.c
212
.bits = 14,
drivers/iio/adc/ad7606.c
224
.bits = 18,
drivers/iio/adc/ad7606.c
236
.bits = 18,
drivers/iio/adc/ad7606.c
248
.bits = 18,
drivers/iio/adc/ad7606.c
265
.bits = 16,
drivers/iio/adc/ad7606.h
76
unsigned int bits;
drivers/iio/adc/ad7791.c
115
#define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
drivers/iio/adc/ad7791.c
118
(bits), (storagebits), 0), \
drivers/iio/adc/ad7791.c
119
AD7991_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
drivers/iio/adc/ad7791.c
121
(bits), (storagebits), 0), \
drivers/iio/adc/ad7791.c
123
(bits), (storagebits), 0), \
drivers/iio/adc/ad7791.c
127
#define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
drivers/iio/adc/ad7791.c
130
(bits), (storagebits), 0), \
drivers/iio/adc/ad7791.c
132
(bits), (storagebits), 0), \
drivers/iio/adc/ad7791.c
134
(bits), (storagebits), 0), \
drivers/iio/adc/ad7923.c
102
#define DECLARE_AD7923_CHANNELS(name, bits) \
drivers/iio/adc/ad7923.c
104
AD7923_V_CHAN(0, bits), \
drivers/iio/adc/ad7923.c
105
AD7923_V_CHAN(1, bits), \
drivers/iio/adc/ad7923.c
106
AD7923_V_CHAN(2, bits), \
drivers/iio/adc/ad7923.c
107
AD7923_V_CHAN(3, bits), \
drivers/iio/adc/ad7923.c
111
#define DECLARE_AD7908_CHANNELS(name, bits) \
drivers/iio/adc/ad7923.c
113
AD7923_V_CHAN(0, bits), \
drivers/iio/adc/ad7923.c
114
AD7923_V_CHAN(1, bits), \
drivers/iio/adc/ad7923.c
115
AD7923_V_CHAN(2, bits), \
drivers/iio/adc/ad7923.c
116
AD7923_V_CHAN(3, bits), \
drivers/iio/adc/ad7923.c
117
AD7923_V_CHAN(4, bits), \
drivers/iio/adc/ad7923.c
118
AD7923_V_CHAN(5, bits), \
drivers/iio/adc/ad7923.c
119
AD7923_V_CHAN(6, bits), \
drivers/iio/adc/ad7923.c
120
AD7923_V_CHAN(7, bits), \
drivers/iio/adc/ad7923.c
47
#define EXTRACT(val, dec, bits) (((val) >> (dec)) & ((1 << (bits)) - 1))
drivers/iio/adc/ad7923.c
84
#define AD7923_V_CHAN(index, bits) \
drivers/iio/adc/ad7923.c
95
.realbits = (bits), \
drivers/iio/adc/ad7923.c
97
.shift = 12 - (bits), \
drivers/iio/adc/ina2xx-adc.c
299
int bits;
drivers/iio/adc/ina2xx-adc.c
304
bits = find_closest(val, ina226_avg_tab,
drivers/iio/adc/ina2xx-adc.c
307
chip->avg = ina226_avg_tab[bits];
drivers/iio/adc/ina2xx-adc.c
310
*config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
drivers/iio/adc/ina2xx-adc.c
322
int bits;
drivers/iio/adc/ina2xx-adc.c
327
bits = find_closest(val_us, ina226_conv_time_tab,
drivers/iio/adc/ina2xx-adc.c
330
chip->int_time_vbus = ina226_conv_time_tab[bits];
drivers/iio/adc/ina2xx-adc.c
333
*config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
drivers/iio/adc/ina2xx-adc.c
341
int bits;
drivers/iio/adc/ina2xx-adc.c
346
bits = find_closest(val_us, ina226_conv_time_tab,
drivers/iio/adc/ina2xx-adc.c
349
chip->int_time_vshunt = ina226_conv_time_tab[bits];
drivers/iio/adc/ina2xx-adc.c
352
*config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
drivers/iio/adc/ina2xx-adc.c
362
static int ina219_lookup_int_time(unsigned int *val_us, int *bits)
drivers/iio/adc/ina2xx-adc.c
368
*bits = find_closest(*val_us, ina219_conv_time_tab_subsample,
drivers/iio/adc/ina2xx-adc.c
370
*val_us = ina219_conv_time_tab_subsample[*bits];
drivers/iio/adc/ina2xx-adc.c
372
*bits = find_closest(*val_us, ina219_conv_time_tab_average,
drivers/iio/adc/ina2xx-adc.c
374
*val_us = ina219_conv_time_tab_average[*bits];
drivers/iio/adc/ina2xx-adc.c
375
*bits |= 0x8;
drivers/iio/adc/ina2xx-adc.c
384
int bits, ret;
drivers/iio/adc/ina2xx-adc.c
387
ret = ina219_lookup_int_time(&val_us_best, &bits);
drivers/iio/adc/ina2xx-adc.c
394
*config |= INA219_SHIFT_ITB(bits) & INA219_ITB_MASK;
drivers/iio/adc/ina2xx-adc.c
402
int bits, ret;
drivers/iio/adc/ina2xx-adc.c
405
ret = ina219_lookup_int_time(&val_us_best, &bits);
drivers/iio/adc/ina2xx-adc.c
412
*config |= INA219_SHIFT_ITS(bits) & INA219_ITS_MASK;
drivers/iio/adc/ina2xx-adc.c
443
int bits;
drivers/iio/adc/ina2xx-adc.c
448
bits = find_closest(gain, ina219_vshunt_gain_tab,
drivers/iio/adc/ina2xx-adc.c
451
chip->pga_gain_vshunt = ina219_vshunt_gain_tab[bits];
drivers/iio/adc/ina2xx-adc.c
452
bits = 3 - bits;
drivers/iio/adc/ina2xx-adc.c
455
*config |= INA219_SHIFT_PGA(bits) & INA219_PGA_MASK;
drivers/iio/adc/max1363.c
1052
.bits = 10,
drivers/iio/adc/max1363.c
1062
.bits = 10,
drivers/iio/adc/max1363.c
1072
.bits = 12,
drivers/iio/adc/max1363.c
1082
.bits = 12,
drivers/iio/adc/max1363.c
1092
.bits = 8,
drivers/iio/adc/max1363.c
1102
.bits = 8,
drivers/iio/adc/max1363.c
1112
.bits = 8,
drivers/iio/adc/max1363.c
1122
.bits = 8,
drivers/iio/adc/max1363.c
1132
.bits = 10,
drivers/iio/adc/max1363.c
1142
.bits = 10,
drivers/iio/adc/max1363.c
1152
.bits = 10,
drivers/iio/adc/max1363.c
1162
.bits = 10,
drivers/iio/adc/max1363.c
1172
.bits = 12,
drivers/iio/adc/max1363.c
1182
.bits = 12,
drivers/iio/adc/max1363.c
1192
.bits = 12,
drivers/iio/adc/max1363.c
1202
.bits = 12,
drivers/iio/adc/max1363.c
1212
.bits = 8,
drivers/iio/adc/max1363.c
1222
.bits = 8,
drivers/iio/adc/max1363.c
1232
.bits = 8,
drivers/iio/adc/max1363.c
1242
.bits = 8,
drivers/iio/adc/max1363.c
1252
.bits = 8,
drivers/iio/adc/max1363.c
1262
.bits = 8,
drivers/iio/adc/max1363.c
1272
.bits = 10,
drivers/iio/adc/max1363.c
1282
.bits = 10,
drivers/iio/adc/max1363.c
1292
.bits = 10,
drivers/iio/adc/max1363.c
1302
.bits = 10,
drivers/iio/adc/max1363.c
1312
.bits = 10,
drivers/iio/adc/max1363.c
1322
.bits = 10,
drivers/iio/adc/max1363.c
1332
.bits = 12,
drivers/iio/adc/max1363.c
1342
.bits = 12,
drivers/iio/adc/max1363.c
1352
.bits = 12,
drivers/iio/adc/max1363.c
1362
.bits = 12,
drivers/iio/adc/max1363.c
1372
.bits = 12,
drivers/iio/adc/max1363.c
1382
.bits = 12,
drivers/iio/adc/max1363.c
1392
.bits = 12,
drivers/iio/adc/max1363.c
1402
.bits = 12,
drivers/iio/adc/max1363.c
141
u8 bits;
drivers/iio/adc/max1363.c
1412
.bits = 10,
drivers/iio/adc/max1363.c
1422
.bits = 10,
drivers/iio/adc/max1363.c
1493
if (st->chip_info->bits != 8)
drivers/iio/adc/max1363.c
1590
&& st->chip_info->bits == 8) {
drivers/iio/adc/max1363.c
391
if (st->chip_info->bits != 8) {
drivers/iio/adc/max1363.c
398
((1 << st->chip_info->bits) - 1);
drivers/iio/adc/max1363.c
433
*val2 = st->chip_info->bits;
drivers/iio/adc/max1363.c
463
#define MAX1363_CHAN_U(num, addr, si, bits, ev_spec, num_ev_spec) \
drivers/iio/adc/max1363.c
474
.realbits = bits, \
drivers/iio/adc/max1363.c
475
.storagebits = (bits > 8) ? 16 : 8, \
drivers/iio/adc/max1363.c
484
#define MAX1363_CHAN_B(num, num2, addr, si, bits, ev_spec, num_ev_spec) \
drivers/iio/adc/max1363.c
497
.realbits = bits, \
drivers/iio/adc/max1363.c
498
.storagebits = (bits > 8) ? 16 : 8, \
drivers/iio/adc/max1363.c
506
#define MAX1363_4X_CHANS(bits, ev_spec, num_ev_spec) { \
drivers/iio/adc/max1363.c
507
MAX1363_CHAN_U(0, _s0, 0, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
508
MAX1363_CHAN_U(1, _s1, 1, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
509
MAX1363_CHAN_U(2, _s2, 2, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
510
MAX1363_CHAN_U(3, _s3, 3, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
511
MAX1363_CHAN_B(0, 1, d0m1, 12, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
512
MAX1363_CHAN_B(2, 3, d2m3, 13, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
513
MAX1363_CHAN_B(1, 0, d1m0, 18, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
514
MAX1363_CHAN_B(3, 2, d3m2, 19, bits, ev_spec, num_ev_spec), \
drivers/iio/adc/max1363.c
551
#define MAX1363_12X_CHANS(bits) { \
drivers/iio/adc/max1363.c
552
MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0), \
drivers/iio/adc/max1363.c
553
MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0), \
drivers/iio/adc/max1363.c
554
MAX1363_CHAN_U(2, _s2, 2, bits, NULL, 0), \
drivers/iio/adc/max1363.c
555
MAX1363_CHAN_U(3, _s3, 3, bits, NULL, 0), \
drivers/iio/adc/max1363.c
556
MAX1363_CHAN_U(4, _s4, 4, bits, NULL, 0), \
drivers/iio/adc/max1363.c
557
MAX1363_CHAN_U(5, _s5, 5, bits, NULL, 0), \
drivers/iio/adc/max1363.c
558
MAX1363_CHAN_U(6, _s6, 6, bits, NULL, 0), \
drivers/iio/adc/max1363.c
559
MAX1363_CHAN_U(7, _s7, 7, bits, NULL, 0), \
drivers/iio/adc/max1363.c
560
MAX1363_CHAN_U(8, _s8, 8, bits, NULL, 0), \
drivers/iio/adc/max1363.c
561
MAX1363_CHAN_U(9, _s9, 9, bits, NULL, 0), \
drivers/iio/adc/max1363.c
562
MAX1363_CHAN_U(10, _s10, 10, bits, NULL, 0), \
drivers/iio/adc/max1363.c
563
MAX1363_CHAN_U(11, _s11, 11, bits, NULL, 0), \
drivers/iio/adc/max1363.c
564
MAX1363_CHAN_B(0, 1, d0m1, 12, bits, NULL, 0), \
drivers/iio/adc/max1363.c
565
MAX1363_CHAN_B(2, 3, d2m3, 13, bits, NULL, 0), \
drivers/iio/adc/max1363.c
566
MAX1363_CHAN_B(4, 5, d4m5, 14, bits, NULL, 0), \
drivers/iio/adc/max1363.c
567
MAX1363_CHAN_B(6, 7, d6m7, 15, bits, NULL, 0), \
drivers/iio/adc/max1363.c
568
MAX1363_CHAN_B(8, 9, d8m9, 16, bits, NULL, 0), \
drivers/iio/adc/max1363.c
569
MAX1363_CHAN_B(10, 11, d10m11, 17, bits, NULL, 0), \
drivers/iio/adc/max1363.c
570
MAX1363_CHAN_B(1, 0, d1m0, 18, bits, NULL, 0), \
drivers/iio/adc/max1363.c
571
MAX1363_CHAN_B(3, 2, d3m2, 19, bits, NULL, 0), \
drivers/iio/adc/max1363.c
572
MAX1363_CHAN_B(5, 4, d5m4, 20, bits, NULL, 0), \
drivers/iio/adc/max1363.c
573
MAX1363_CHAN_B(7, 6, d7m6, 21, bits, NULL, 0), \
drivers/iio/adc/max1363.c
574
MAX1363_CHAN_B(9, 8, d9m8, 22, bits, NULL, 0), \
drivers/iio/adc/max1363.c
575
MAX1363_CHAN_B(11, 10, d11m10, 23, bits, NULL, 0), \
drivers/iio/adc/max1363.c
599
#define MAX1363_8X_CHANS(bits) { \
drivers/iio/adc/max1363.c
600
MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0), \
drivers/iio/adc/max1363.c
601
MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0), \
drivers/iio/adc/max1363.c
602
MAX1363_CHAN_U(2, _s2, 2, bits, NULL, 0), \
drivers/iio/adc/max1363.c
603
MAX1363_CHAN_U(3, _s3, 3, bits, NULL, 0), \
drivers/iio/adc/max1363.c
604
MAX1363_CHAN_U(4, _s4, 4, bits, NULL, 0), \
drivers/iio/adc/max1363.c
605
MAX1363_CHAN_U(5, _s5, 5, bits, NULL, 0), \
drivers/iio/adc/max1363.c
606
MAX1363_CHAN_U(6, _s6, 6, bits, NULL, 0), \
drivers/iio/adc/max1363.c
607
MAX1363_CHAN_U(7, _s7, 7, bits, NULL, 0), \
drivers/iio/adc/max1363.c
608
MAX1363_CHAN_B(0, 1, d0m1, 12, bits, NULL, 0), \
drivers/iio/adc/max1363.c
609
MAX1363_CHAN_B(2, 3, d2m3, 13, bits, NULL, 0), \
drivers/iio/adc/max1363.c
610
MAX1363_CHAN_B(4, 5, d4m5, 14, bits, NULL, 0), \
drivers/iio/adc/max1363.c
611
MAX1363_CHAN_B(6, 7, d6m7, 15, bits, NULL, 0), \
drivers/iio/adc/max1363.c
612
MAX1363_CHAN_B(1, 0, d1m0, 18, bits, NULL, 0), \
drivers/iio/adc/max1363.c
613
MAX1363_CHAN_B(3, 2, d3m2, 19, bits, NULL, 0), \
drivers/iio/adc/max1363.c
614
MAX1363_CHAN_B(5, 4, d5m4, 20, bits, NULL, 0), \
drivers/iio/adc/max1363.c
615
MAX1363_CHAN_B(7, 6, d7m6, 21, bits, NULL, 0), \
drivers/iio/adc/max1363.c
626
#define MAX1363_2X_CHANS(bits) { \
drivers/iio/adc/max1363.c
627
MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0), \
drivers/iio/adc/max1363.c
628
MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0), \
drivers/iio/adc/max1363.c
629
MAX1363_CHAN_B(0, 1, d0m1, 2, bits, NULL, 0), \
drivers/iio/adc/max1363.c
630
MAX1363_CHAN_B(1, 0, d1m0, 3, bits, NULL, 0), \
drivers/iio/adc/max1363.c
746
switch (st->chip_info->bits) {
drivers/iio/adc/rohm-bd79112.c
306
unsigned long *bits)
drivers/iio/adc/rohm-bd79112.c
316
bank_bits = bitmap_get_value8(bits, i);
drivers/iio/adc/rohm-bd79124.c
186
unsigned long *bits)
drivers/iio/adc/rohm-bd79124.c
209
return regmap_update_bits(data->map, BD79124_REG_GPO_VAL, *mask, *bits);
drivers/iio/adc/stm32-adc.c
621
static void stm32_adc_set_bits(struct stm32_adc *adc, u32 reg, u32 bits)
drivers/iio/adc/stm32-adc.c
626
stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) | bits);
drivers/iio/adc/stm32-adc.c
630
static void stm32_adc_set_bits_common(struct stm32_adc *adc, u32 reg, u32 bits)
drivers/iio/adc/stm32-adc.c
633
writel_relaxed(readl_relaxed(adc->common->base + reg) | bits,
drivers/iio/adc/stm32-adc.c
638
static void stm32_adc_clr_bits(struct stm32_adc *adc, u32 reg, u32 bits)
drivers/iio/adc/stm32-adc.c
643
stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) & ~bits);
drivers/iio/adc/stm32-adc.c
647
static void stm32_adc_clr_bits_common(struct stm32_adc *adc, u32 reg, u32 bits)
drivers/iio/adc/stm32-adc.c
650
writel_relaxed(readl_relaxed(adc->common->base + reg) & ~bits,
drivers/iio/adc/stm32-adc.c
917
u32 ovsr_bits, bits, msk;
drivers/iio/adc/stm32-adc.c
934
bits = STM32H7_ROVSE | STM32H7_OVSS(ovs_idx) | STM32H7_OVSR(ovsr_bits);
drivers/iio/adc/stm32-adc.c
936
stm32_adc_set_bits(adc, STM32H7_ADC_CFGR2, bits & msk);
drivers/iio/adc/stm32-adc.c
942
u32 bits, msk;
drivers/iio/adc/stm32-adc.c
957
bits = STM32H7_ROVSE | STM32MP13_OVSS(ovs_idx);
drivers/iio/adc/stm32-adc.c
959
bits |= STM32MP13_OVSR(ovs_idx - 1);
drivers/iio/adc/stm32-adc.c
961
stm32_adc_set_bits(adc, STM32H7_ADC_CFGR2, bits & msk);
drivers/iio/adc/stm32-dfsdm-adc.c
200
int bits, shift;
drivers/iio/adc/stm32-dfsdm-adc.c
263
bits = fls(flo->res);
drivers/iio/adc/stm32-dfsdm-adc.c
268
if (flo->res > BIT(bits - 1))
drivers/iio/adc/stm32-dfsdm-adc.c
269
bits++;
drivers/iio/adc/stm32-dfsdm-adc.c
273
shift = DFSDM_DATA_RES - bits;
drivers/iio/adc/stm32-dfsdm-adc.c
300
flo->bits = bits;
drivers/iio/adc/stm32-dfsdm-adc.c
304
flo->res, bits, flo->rshift,
drivers/iio/adc/stm32-dfsdm-adc.c
484
min(flo->bits, (u32)DFSDM_DATA_RES - 1));
drivers/iio/adc/stm32-dfsdm.h
283
u32 bits;
drivers/iio/adc/stmpe-adc.c
259
unsigned long bits;
drivers/iio/adc/stmpe-adc.c
311
bits = norequest_mask;
drivers/iio/adc/stmpe-adc.c
312
for_each_clear_bit(i, &bits, (STMPE_ADC_LAST_NR + 1)) {
drivers/iio/adc/ti-adc081c.c
101
int bits;
drivers/iio/adc/ti-adc081c.c
110
.bits = 8,
drivers/iio/adc/ti-adc081c.c
115
.bits = 10,
drivers/iio/adc/ti-adc081c.c
120
.bits = 12,
drivers/iio/adc/ti-adc081c.c
168
adc->bits = model->bits;
drivers/iio/adc/ti-adc081c.c
34
int bits;
drivers/iio/adc/ti-adc081c.c
58
*value = (err & 0xFFF) >> (12 - adc->bits);
drivers/iio/adc/ti-adc081c.c
67
*shift = adc->bits;
drivers/iio/adc/ti-ads7138.c
146
static int ads7138_i2c_set_bit(const struct i2c_client *client, u8 reg, u8 bits)
drivers/iio/adc/ti-ads7138.c
148
return ads7138_i2c_write_with_opcode(client, reg, bits,
drivers/iio/adc/ti-ads7138.c
152
static int ads7138_i2c_clear_bit(const struct i2c_client *client, u8 reg, u8 bits)
drivers/iio/adc/ti-ads7138.c
154
return ads7138_i2c_write_with_opcode(client, reg, bits,
drivers/iio/adc/ti-ads7138.c
208
static int ads7138_bits_to_freq(int bits)
drivers/iio/adc/ti-ads7138.c
213
if (bits == ads7138_samp_freqs_bits[1][i])
drivers/iio/adc/ti-ads7138.c
235
int ret, vref, bits;
drivers/iio/adc/ti-ads7138.c
271
bits = FIELD_GET(ADS7138_OPMODE_CFG_FREQ_MASK, ret);
drivers/iio/adc/ti-ads7138.c
272
*val = ads7138_bits_to_freq(bits);
drivers/iio/adc/ti-ads7138.c
286
bits = FIELD_GET(ADS7138_OSR_CFG_MASK, ret);
drivers/iio/adc/ti-ads7138.c
287
*val = ads7138_oversampling_ratios[bits];
drivers/iio/adc/ti-ads7138.c
299
int bits, ret;
drivers/iio/adc/ti-ads7138.c
304
bits = ads7138_freq_to_bits(val);
drivers/iio/adc/ti-ads7138.c
305
if (bits < 0)
drivers/iio/adc/ti-ads7138.c
306
return bits;
drivers/iio/adc/ti-ads7138.c
314
value |= FIELD_PREP(ADS7138_OPMODE_CFG_FREQ_MASK, bits);
drivers/iio/adc/ti-ads7138.c
319
bits = ads7138_osr_to_bits(val);
drivers/iio/adc/ti-ads7138.c
320
if (bits < 0)
drivers/iio/adc/ti-ads7138.c
321
return bits;
drivers/iio/adc/ti-ads7138.c
324
bits);
drivers/iio/adc/ti-ads7950.c
118
#define TI_ADS7950_V_CHAN(index, bits) \
drivers/iio/adc/ti-ads7950.c
130
.realbits = bits, \
drivers/iio/adc/ti-ads7950.c
132
.shift = 12 - (bits), \
drivers/iio/adc/ti-ads7950.c
137
#define DECLARE_TI_ADS7950_4_CHANNELS(name, bits) \
drivers/iio/adc/ti-ads7950.c
139
TI_ADS7950_V_CHAN(0, bits), \
drivers/iio/adc/ti-ads7950.c
140
TI_ADS7950_V_CHAN(1, bits), \
drivers/iio/adc/ti-ads7950.c
141
TI_ADS7950_V_CHAN(2, bits), \
drivers/iio/adc/ti-ads7950.c
142
TI_ADS7950_V_CHAN(3, bits), \
drivers/iio/adc/ti-ads7950.c
146
#define DECLARE_TI_ADS7950_8_CHANNELS(name, bits) \
drivers/iio/adc/ti-ads7950.c
148
TI_ADS7950_V_CHAN(0, bits), \
drivers/iio/adc/ti-ads7950.c
149
TI_ADS7950_V_CHAN(1, bits), \
drivers/iio/adc/ti-ads7950.c
150
TI_ADS7950_V_CHAN(2, bits), \
drivers/iio/adc/ti-ads7950.c
151
TI_ADS7950_V_CHAN(3, bits), \
drivers/iio/adc/ti-ads7950.c
152
TI_ADS7950_V_CHAN(4, bits), \
drivers/iio/adc/ti-ads7950.c
153
TI_ADS7950_V_CHAN(5, bits), \
drivers/iio/adc/ti-ads7950.c
154
TI_ADS7950_V_CHAN(6, bits), \
drivers/iio/adc/ti-ads7950.c
155
TI_ADS7950_V_CHAN(7, bits), \
drivers/iio/adc/ti-ads7950.c
159
#define DECLARE_TI_ADS7950_12_CHANNELS(name, bits) \
drivers/iio/adc/ti-ads7950.c
161
TI_ADS7950_V_CHAN(0, bits), \
drivers/iio/adc/ti-ads7950.c
162
TI_ADS7950_V_CHAN(1, bits), \
drivers/iio/adc/ti-ads7950.c
163
TI_ADS7950_V_CHAN(2, bits), \
drivers/iio/adc/ti-ads7950.c
164
TI_ADS7950_V_CHAN(3, bits), \
drivers/iio/adc/ti-ads7950.c
165
TI_ADS7950_V_CHAN(4, bits), \
drivers/iio/adc/ti-ads7950.c
166
TI_ADS7950_V_CHAN(5, bits), \
drivers/iio/adc/ti-ads7950.c
167
TI_ADS7950_V_CHAN(6, bits), \
drivers/iio/adc/ti-ads7950.c
168
TI_ADS7950_V_CHAN(7, bits), \
drivers/iio/adc/ti-ads7950.c
169
TI_ADS7950_V_CHAN(8, bits), \
drivers/iio/adc/ti-ads7950.c
170
TI_ADS7950_V_CHAN(9, bits), \
drivers/iio/adc/ti-ads7950.c
171
TI_ADS7950_V_CHAN(10, bits), \
drivers/iio/adc/ti-ads7950.c
172
TI_ADS7950_V_CHAN(11, bits), \
drivers/iio/adc/ti-ads7950.c
176
#define DECLARE_TI_ADS7950_16_CHANNELS(name, bits) \
drivers/iio/adc/ti-ads7950.c
178
TI_ADS7950_V_CHAN(0, bits), \
drivers/iio/adc/ti-ads7950.c
179
TI_ADS7950_V_CHAN(1, bits), \
drivers/iio/adc/ti-ads7950.c
180
TI_ADS7950_V_CHAN(2, bits), \
drivers/iio/adc/ti-ads7950.c
181
TI_ADS7950_V_CHAN(3, bits), \
drivers/iio/adc/ti-ads7950.c
182
TI_ADS7950_V_CHAN(4, bits), \
drivers/iio/adc/ti-ads7950.c
183
TI_ADS7950_V_CHAN(5, bits), \
drivers/iio/adc/ti-ads7950.c
184
TI_ADS7950_V_CHAN(6, bits), \
drivers/iio/adc/ti-ads7950.c
185
TI_ADS7950_V_CHAN(7, bits), \
drivers/iio/adc/ti-ads7950.c
186
TI_ADS7950_V_CHAN(8, bits), \
drivers/iio/adc/ti-ads7950.c
187
TI_ADS7950_V_CHAN(9, bits), \
drivers/iio/adc/ti-ads7950.c
188
TI_ADS7950_V_CHAN(10, bits), \
drivers/iio/adc/ti-ads7950.c
189
TI_ADS7950_V_CHAN(11, bits), \
drivers/iio/adc/ti-ads7950.c
190
TI_ADS7950_V_CHAN(12, bits), \
drivers/iio/adc/ti-ads7950.c
191
TI_ADS7950_V_CHAN(13, bits), \
drivers/iio/adc/ti-ads7950.c
192
TI_ADS7950_V_CHAN(14, bits), \
drivers/iio/adc/ti-ads7950.c
193
TI_ADS7950_V_CHAN(15, bits), \
drivers/iio/adc/ti-ads7950.c
51
#define TI_ADS7950_EXTRACT(val, dec, bits) \
drivers/iio/adc/ti-ads7950.c
52
(((val) >> (dec)) & ((1 << (bits)) - 1))
drivers/iio/adc/ti-tlc4541.c
57
#define TLC4541_V_CHAN(bits, bitshift) { \
drivers/iio/adc/ti-tlc4541.c
63
.realbits = (bits), \
drivers/iio/adc/ti-tlc4541.c
70
#define DECLARE_TLC4541_CHANNELS(name, bits, bitshift) \
drivers/iio/adc/ti-tlc4541.c
72
TLC4541_V_CHAN(bits, bitshift), \
drivers/iio/adc/ti-tsc2046.c
185
#define TI_TSC2046_V_CHAN(index, bits, name) \
drivers/iio/adc/ti-tsc2046.c
196
.realbits = bits, \
drivers/iio/adc/ti-tsc2046.c
202
#define DECLARE_TI_TSC2046_8_CHANNELS(name, bits) \
drivers/iio/adc/ti-tsc2046.c
204
TI_TSC2046_V_CHAN(0, bits, TEMP0), \
drivers/iio/adc/ti-tsc2046.c
205
TI_TSC2046_V_CHAN(1, bits, Y), \
drivers/iio/adc/ti-tsc2046.c
206
TI_TSC2046_V_CHAN(2, bits, VBAT), \
drivers/iio/adc/ti-tsc2046.c
207
TI_TSC2046_V_CHAN(3, bits, Z1), \
drivers/iio/adc/ti-tsc2046.c
208
TI_TSC2046_V_CHAN(4, bits, Z2), \
drivers/iio/adc/ti-tsc2046.c
209
TI_TSC2046_V_CHAN(5, bits, X), \
drivers/iio/adc/ti-tsc2046.c
210
TI_TSC2046_V_CHAN(6, bits, AUX), \
drivers/iio/adc/ti-tsc2046.c
211
TI_TSC2046_V_CHAN(7, bits, TEMP1), \
drivers/iio/adc/xilinx-xadc-core.c
924
unsigned int bits = chan->scan_type.realbits;
drivers/iio/adc/xilinx-xadc-core.c
940
*val = sign_extend32(val16, bits - 1);
drivers/iio/adc/xilinx-xadc-core.c
962
*val2 = bits;
drivers/iio/adc/xilinx-xadc-core.c
966
*val2 = bits;
drivers/iio/adc/xilinx-xadc-core.c
973
*val = -((xadc->ops->temp_offset << bits) / xadc->ops->temp_scale);
drivers/iio/addac/ad74413r.c
298
unsigned long *mask, unsigned long *bits)
drivers/iio/addac/ad74413r.c
315
if (*bits & offset)
drivers/iio/addac/ad74413r.c
341
unsigned long *bits)
drivers/iio/addac/ad74413r.c
355
__assign_bit(offset, bits, val & BIT(real_offset));
drivers/iio/dac/ad5064.c
396
#define AD5064_CHANNEL(chan, addr, bits, _shift, _ext_info) { \
drivers/iio/dac/ad5064.c
406
.realbits = (bits), \
drivers/iio/dac/ad5064.c
413
#define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \
drivers/iio/dac/ad5064.c
415
AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
416
AD5064_CHANNEL(1, 1, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
417
AD5064_CHANNEL(2, 2, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
418
AD5064_CHANNEL(3, 3, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
419
AD5064_CHANNEL(4, 4, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
420
AD5064_CHANNEL(5, 5, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
421
AD5064_CHANNEL(6, 6, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
422
AD5064_CHANNEL(7, 7, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
425
#define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \
drivers/iio/dac/ad5064.c
427
AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
drivers/iio/dac/ad5064.c
428
AD5064_CHANNEL(1, 3, bits, shift, ext_info), \
drivers/iio/dac/ad5360.c
102
#define AD5360_CHANNEL(bits) { \
drivers/iio/dac/ad5360.c
113
.realbits = (bits), \
drivers/iio/dac/ad5360.c
115
.shift = 16 - (bits), \
drivers/iio/dac/ad5446.h
15
#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
drivers/iio/dac/ad5446.h
24
.realbits = (bits), \
drivers/iio/dac/ad5446.h
31
#define AD5446_CHANNEL(bits, storage, shift) \
drivers/iio/dac/ad5446.h
32
_AD5446_CHANNEL(bits, storage, shift, NULL)
drivers/iio/dac/ad5446.h
34
#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
drivers/iio/dac/ad5446.h
35
_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
drivers/iio/dac/ad5449.c
197
#define AD5449_CHANNEL(chan, bits) { \
drivers/iio/dac/ad5449.c
207
.realbits = (bits), \
drivers/iio/dac/ad5449.c
209
.shift = 12 - (bits), \
drivers/iio/dac/ad5449.c
213
#define DECLARE_AD5449_CHANNELS(name, bits) \
drivers/iio/dac/ad5449.c
215
AD5449_CHANNEL(0, bits), \
drivers/iio/dac/ad5449.c
216
AD5449_CHANNEL(1, bits), \
drivers/iio/dac/ad5686.c
237
#define AD5868_CHANNEL(chan, addr, bits, _shift) { \
drivers/iio/dac/ad5686.c
247
.realbits = (bits), \
drivers/iio/dac/ad5686.c
254
#define DECLARE_AD5683_CHANNELS(name, bits, _shift) \
drivers/iio/dac/ad5686.c
256
AD5868_CHANNEL(0, 0, bits, _shift), \
drivers/iio/dac/ad5686.c
259
#define DECLARE_AD5338_CHANNELS(name, bits, _shift) \
drivers/iio/dac/ad5686.c
261
AD5868_CHANNEL(0, 1, bits, _shift), \
drivers/iio/dac/ad5686.c
262
AD5868_CHANNEL(1, 8, bits, _shift), \
drivers/iio/dac/ad5686.c
265
#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
drivers/iio/dac/ad5686.c
267
AD5868_CHANNEL(0, 1, bits, _shift), \
drivers/iio/dac/ad5686.c
268
AD5868_CHANNEL(1, 2, bits, _shift), \
drivers/iio/dac/ad5686.c
269
AD5868_CHANNEL(2, 4, bits, _shift), \
drivers/iio/dac/ad5686.c
270
AD5868_CHANNEL(3, 8, bits, _shift), \
drivers/iio/dac/ad5686.c
273
#define DECLARE_AD5676_CHANNELS(name, bits, _shift) \
drivers/iio/dac/ad5686.c
275
AD5868_CHANNEL(0, 0, bits, _shift), \
drivers/iio/dac/ad5686.c
276
AD5868_CHANNEL(1, 1, bits, _shift), \
drivers/iio/dac/ad5686.c
277
AD5868_CHANNEL(2, 2, bits, _shift), \
drivers/iio/dac/ad5686.c
278
AD5868_CHANNEL(3, 3, bits, _shift), \
drivers/iio/dac/ad5686.c
279
AD5868_CHANNEL(4, 4, bits, _shift), \
drivers/iio/dac/ad5686.c
280
AD5868_CHANNEL(5, 5, bits, _shift), \
drivers/iio/dac/ad5686.c
281
AD5868_CHANNEL(6, 6, bits, _shift), \
drivers/iio/dac/ad5686.c
282
AD5868_CHANNEL(7, 7, bits, _shift), \
drivers/iio/dac/ad5686.c
285
#define DECLARE_AD5679_CHANNELS(name, bits, _shift) \
drivers/iio/dac/ad5686.c
287
AD5868_CHANNEL(0, 0, bits, _shift), \
drivers/iio/dac/ad5686.c
288
AD5868_CHANNEL(1, 1, bits, _shift), \
drivers/iio/dac/ad5686.c
289
AD5868_CHANNEL(2, 2, bits, _shift), \
drivers/iio/dac/ad5686.c
290
AD5868_CHANNEL(3, 3, bits, _shift), \
drivers/iio/dac/ad5686.c
291
AD5868_CHANNEL(4, 4, bits, _shift), \
drivers/iio/dac/ad5686.c
292
AD5868_CHANNEL(5, 5, bits, _shift), \
drivers/iio/dac/ad5686.c
293
AD5868_CHANNEL(6, 6, bits, _shift), \
drivers/iio/dac/ad5686.c
294
AD5868_CHANNEL(7, 7, bits, _shift), \
drivers/iio/dac/ad5686.c
295
AD5868_CHANNEL(8, 8, bits, _shift), \
drivers/iio/dac/ad5686.c
296
AD5868_CHANNEL(9, 9, bits, _shift), \
drivers/iio/dac/ad5686.c
297
AD5868_CHANNEL(10, 10, bits, _shift), \
drivers/iio/dac/ad5686.c
298
AD5868_CHANNEL(11, 11, bits, _shift), \
drivers/iio/dac/ad5686.c
299
AD5868_CHANNEL(12, 12, bits, _shift), \
drivers/iio/dac/ad5686.c
300
AD5868_CHANNEL(13, 13, bits, _shift), \
drivers/iio/dac/ad5686.c
301
AD5868_CHANNEL(14, 14, bits, _shift), \
drivers/iio/dac/ad5686.c
302
AD5868_CHANNEL(15, 15, bits, _shift), \
drivers/iio/dac/ad5791.c
312
#define AD5791_DEFINE_CHIP_INFO(_name, bits, _shift, _lin_comp) \
drivers/iio/dac/ad5791.c
327
.realbits = (bits), \
drivers/iio/dac/ad5791.c
345
.realbits = (bits), \
drivers/iio/dac/ltc1660.c
104
#define LTC1660_CHAN(chan, bits) { \
drivers/iio/dac/ltc1660.c
113
.realbits = (bits), \
drivers/iio/dac/ltc1660.c
115
.shift = 12 - (bits), \
drivers/iio/dac/ltc1660.c
119
#define LTC1660_OCTAL_CHANNELS(bits) { \
drivers/iio/dac/ltc1660.c
120
LTC1660_CHAN(LTC1660_REG_DAC_A, bits), \
drivers/iio/dac/ltc1660.c
121
LTC1660_CHAN(LTC1660_REG_DAC_B, bits), \
drivers/iio/dac/ltc1660.c
122
LTC1660_CHAN(LTC1660_REG_DAC_C, bits), \
drivers/iio/dac/ltc1660.c
123
LTC1660_CHAN(LTC1660_REG_DAC_D, bits), \
drivers/iio/dac/ltc1660.c
124
LTC1660_CHAN(LTC1660_REG_DAC_E, bits), \
drivers/iio/dac/ltc1660.c
125
LTC1660_CHAN(LTC1660_REG_DAC_F, bits), \
drivers/iio/dac/ltc1660.c
126
LTC1660_CHAN(LTC1660_REG_DAC_G, bits), \
drivers/iio/dac/ltc1660.c
127
LTC1660_CHAN(LTC1660_REG_DAC_H, bits), \
drivers/iio/dac/mcp4922.c
36
#define MCP4922_CHAN(chan, bits) { \
drivers/iio/dac/mcp4922.c
45
.realbits = (bits), \
drivers/iio/dac/mcp4922.c
47
.shift = 12 - (bits), \
drivers/iio/gyro/fxas21002c_core.c
338
enum fxas21002c_fields field, int bits)
drivers/iio/gyro/fxas21002c_core.c
355
ret = regmap_field_write(data->regmap_fields[field], bits);
drivers/iio/humidity/dht11.c
105
static unsigned char dht11_decode_byte(char *bits)
drivers/iio/humidity/dht11.c
112
if (bits[i])
drivers/iio/humidity/dht11.c
122
char bits[DHT11_BITS_PER_READ];
drivers/iio/humidity/dht11.c
134
bits[i] = t > DHT11_THRESHOLD;
drivers/iio/humidity/dht11.c
137
hum_int = dht11_decode_byte(bits);
drivers/iio/humidity/dht11.c
138
hum_dec = dht11_decode_byte(&bits[8]);
drivers/iio/humidity/dht11.c
139
temp_int = dht11_decode_byte(&bits[16]);
drivers/iio/humidity/dht11.c
140
temp_dec = dht11_decode_byte(&bits[24]);
drivers/iio/humidity/dht11.c
141
checksum = dht11_decode_byte(&bits[32]);
drivers/iio/imu/adis16400.c
645
#define ADIS16400_VOLTAGE_CHAN(addr, bits, name, si, chn) { \
drivers/iio/imu/adis16400.c
657
.realbits = (bits), \
drivers/iio/imu/adis16400.c
664
#define ADIS16400_SUPPLY_CHAN(addr, bits) \
drivers/iio/imu/adis16400.c
665
ADIS16400_VOLTAGE_CHAN(addr, bits, "supply", ADIS16400_SCAN_SUPPLY, 0)
drivers/iio/imu/adis16400.c
667
#define ADIS16400_AUX_ADC_CHAN(addr, bits) \
drivers/iio/imu/adis16400.c
668
ADIS16400_VOLTAGE_CHAN(addr, bits, NULL, ADIS16400_SCAN_ADC, 1)
drivers/iio/imu/adis16400.c
670
#define ADIS16400_GYRO_CHAN(mod, addr, bits) { \
drivers/iio/imu/adis16400.c
683
.realbits = (bits), \
drivers/iio/imu/adis16400.c
690
#define ADIS16400_ACCEL_CHAN(mod, addr, bits) { \
drivers/iio/imu/adis16400.c
703
.realbits = (bits), \
drivers/iio/imu/adis16400.c
710
#define ADIS16400_MAGN_CHAN(mod, addr, bits) { \
drivers/iio/imu/adis16400.c
722
.realbits = (bits), \
drivers/iio/imu/adis16400.c
733
#define ADIS16400_MOD_TEMP_CHAN(mod, addr, bits) { \
drivers/iio/imu/adis16400.c
748
.realbits = (bits), \
drivers/iio/imu/adis16400.c
755
#define ADIS16400_TEMP_CHAN(addr, bits) { \
drivers/iio/imu/adis16400.c
767
.realbits = (bits), \
drivers/iio/imu/adis16400.c
774
#define ADIS16400_INCLI_CHAN(mod, addr, bits) { \
drivers/iio/imu/adis16400.c
785
.realbits = (bits), \
drivers/iio/imu/adis16550.c
134
const int bits = 28;
drivers/iio/imu/adis16550.c
140
for (i = bits - 4; i >= 0; i -= 4)
drivers/iio/imu/bmi160/bmi160_core.c
191
u8 bits;
drivers/iio/imu/bmi160/bmi160_core.c
196
u8 bits;
drivers/iio/imu/bmi160/bmi160_core.c
345
bmi160_scale_table[t].tbl[i].bits);
drivers/iio/imu/bmi160/bmi160_core.c
359
if (bmi160_scale_table[t].tbl[i].bits == val) {
drivers/iio/imu/bmi160/bmi160_core.c
403
bmi160_odr_table[t].tbl[i].bits);
drivers/iio/imu/bmi160/bmi160_core.c
418
if (val == bmi160_odr_table[t].tbl[i].bits)
drivers/iio/imu/bmi160/bmi160_core.c
533
unsigned int mask, unsigned int bits,
drivers/iio/imu/bmi160/bmi160_core.c
543
val = (val & ~mask) | bits;
drivers/iio/imu/fxos8700_core.c
275
u8 bits;
drivers/iio/imu/fxos8700_core.c
280
u8 bits;
drivers/iio/imu/fxos8700_core.c
384
fxos8700_accel_scale[i].bits);
drivers/iio/imu/fxos8700_core.c
407
if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
drivers/iio/imu/fxos8700_core.c
511
val |= FIELD_PREP(FXOS8700_CTRL_ODR_MSK, fxos8700_odr[i].bits) | FXOS8700_ACTIVE;
drivers/iio/imu/fxos8700_core.c
528
if (val == fxos8700_odr[i].bits)
drivers/iio/light/cm3323.c
143
int bits;
drivers/iio/light/cm3323.c
145
bits = (data->reg_conf & CM3323_CONF_IT_MASK) >>
drivers/iio/light/cm3323.c
148
if (bits >= ARRAY_SIZE(cm3323_int_time))
drivers/iio/light/cm3323.c
151
return bits;
drivers/iio/light/opt4060.c
659
u32 th_val, th_exp, bits;
drivers/iio/light/opt4060.c
664
bits = fls(adc_val);
drivers/iio/light/opt4060.c
666
if (bits > 31)
drivers/iio/light/opt4060.c
668
else if (bits > 20)
drivers/iio/light/opt4060.c
669
th_exp = bits - 20;
drivers/iio/light/zopt2201.c
105
unsigned int bits; /* sensor resolution in bits */
drivers/iio/light/zopt2201.c
267
(1 << (20 - zopt2201_resolution[data->res].bits)) /
drivers/iio/light/zopt2201.c
283
*val2 *= (1 << (zopt2201_resolution[data->res].bits - 13));
drivers/iio/magnetometer/ak8974.c
707
#define AK8974_AXIS_CHANNEL(axis, index, bits) \
drivers/iio/magnetometer/ak8974.c
719
.realbits = bits, \
drivers/infiniband/core/umem.c
117
bits = bits_per(virt ^ last_va);
drivers/infiniband/core/umem.c
118
if (bits < BITS_PER_LONG)
drivers/infiniband/core/umem.c
119
mask = pgsz_bitmap & GENMASK(BITS_PER_LONG - 1, bits);
drivers/infiniband/core/umem.c
94
unsigned int bits;
drivers/infiniband/hw/erdma/erdma_cm.c
1208
if (qp->attrs.cc != __mpa_ext_cc(cep->mpa.ext_data.bits)) {
drivers/infiniband/hw/erdma/erdma_cm.c
1221
cep->mpa.ext_data.bits = 0;
drivers/infiniband/hw/erdma/erdma_cm.c
1222
__mpa_ext_set_cc(&cep->mpa.ext_data.bits, qp->attrs.cc);
drivers/infiniband/hw/erdma/erdma_cm.c
1279
if (__mpa_rr_revision(cep->mpa.hdr.params.bits) == MPA_REVISION_EXT_1) {
drivers/infiniband/hw/erdma/erdma_cm.c
1280
cep->mpa.hdr.params.bits |= MPA_RR_FLAG_REJECT; /* reject */
drivers/infiniband/hw/erdma/erdma_cm.c
404
static void __mpa_rr_set_revision(__be16 *bits, u8 rev)
drivers/infiniband/hw/erdma/erdma_cm.c
406
*bits = (*bits & ~MPA_RR_MASK_REVISION) |
drivers/infiniband/hw/erdma/erdma_cm.c
417
static void __mpa_ext_set_cc(__be32 *bits, u32 cc)
drivers/infiniband/hw/erdma/erdma_cm.c
419
*bits = (*bits & ~MPA_EXT_FLAG_CC) |
drivers/infiniband/hw/erdma/erdma_cm.c
456
__mpa_rr_revision(hdr->params.bits) != MPA_REVISION_EXT_1)
drivers/infiniband/hw/erdma/erdma_cm.c
542
if (req->params.bits & MPA_RR_FLAG_MARKERS ||
drivers/infiniband/hw/erdma/erdma_cm.c
543
req->params.bits & MPA_RR_FLAG_CRC)
drivers/infiniband/hw/erdma/erdma_cm.c
557
req->params.bits &= ~MPA_RR_FLAG_MARKERS;
drivers/infiniband/hw/erdma/erdma_cm.c
558
req->params.bits |= MPA_RR_FLAG_REJECT;
drivers/infiniband/hw/erdma/erdma_cm.c
559
req->params.bits &= ~MPA_RR_FLAG_CRC;
drivers/infiniband/hw/erdma/erdma_cm.c
589
if (rep->params.bits & MPA_RR_FLAG_REJECT) {
drivers/infiniband/hw/erdma/erdma_cm.c
595
if ((rep->params.bits & MPA_RR_FLAG_MARKERS) ||
drivers/infiniband/hw/erdma/erdma_cm.c
596
(rep->params.bits & MPA_RR_FLAG_CRC)) {
drivers/infiniband/hw/erdma/erdma_cm.c
618
if (__mpa_ext_cc(cep->mpa.ext_data.bits) != qp->attrs.cc) {
drivers/infiniband/hw/erdma/erdma_cm.c
724
cep->mpa.hdr.params.bits = 0;
drivers/infiniband/hw/erdma/erdma_cm.c
725
__mpa_rr_set_revision(&cep->mpa.hdr.params.bits, MPA_REVISION_EXT_1);
drivers/infiniband/hw/erdma/erdma_cm.c
729
__mpa_ext_set_cc(&cep->mpa.ext_data.bits, cep->qp->attrs.cc);
drivers/infiniband/hw/erdma/erdma_cm.h
28
__be16 bits;
drivers/infiniband/hw/erdma/erdma_cm.h
53
__be32 bits;
drivers/infiniband/hw/hfi1/chip.c
13156
static void read_mod_write(struct hfi1_devdata *dd, u16 src, u64 bits,
drivers/infiniband/hw/hfi1/chip.c
13166
reg |= bits;
drivers/infiniband/hw/hfi1/chip.c
13168
reg &= ~bits;
drivers/infiniband/hw/hfi1/chip.c
13184
u64 bits = 0;
drivers/infiniband/hw/hfi1/chip.c
13197
if (!bit && bits) {
drivers/infiniband/hw/hfi1/chip.c
13198
read_mod_write(dd, src - 1, bits, set);
drivers/infiniband/hw/hfi1/chip.c
13199
bits = 0;
drivers/infiniband/hw/hfi1/chip.c
13201
bits |= BIT_ULL(bit);
drivers/infiniband/hw/hfi1/chip.c
13203
read_mod_write(dd, last, bits, set);
drivers/infiniband/hw/hfi1/sdma.h
852
u8 bits)
drivers/infiniband/hw/hfi1/sdma.h
857
((bits & SDMA_AHG_FIELD_LEN_MASK) <<
drivers/infiniband/hw/hns/hns_roce_db.c
100
i = find_first_bit(pgdir->bits[o], HNS_ROCE_DB_PER_PAGE >> o);
drivers/infiniband/hw/hns/hns_roce_db.c
108
clear_bit(i, pgdir->bits[o]);
drivers/infiniband/hw/hns/hns_roce_db.c
113
set_bit(i ^ 1, pgdir->bits[order]);
drivers/infiniband/hw/hns/hns_roce_db.c
169
set_bit(i, db->u.pgdir->bits[o]);
drivers/infiniband/hw/hns/hns_roce_db.c
81
pgdir->bits[0] = pgdir->order0;
drivers/infiniband/hw/hns/hns_roce_db.c
82
pgdir->bits[1] = pgdir->order1;
drivers/infiniband/hw/hns/hns_roce_device.h
400
unsigned long *bits[HNS_ROCE_DB_TYPE_COUNT];
drivers/infiniband/hw/mthca/mthca_dev.h
204
unsigned long **bits;
drivers/infiniband/hw/mthca/mthca_mr.c
104
__clear_bit(seg, buddy->bits[o]);
drivers/infiniband/hw/mthca/mthca_mr.c
110
__set_bit(seg ^ 1, buddy->bits[o]);
drivers/infiniband/hw/mthca/mthca_mr.c
127
while (test_bit(seg ^ 1, buddy->bits[order])) {
drivers/infiniband/hw/mthca/mthca_mr.c
128
__clear_bit(seg ^ 1, buddy->bits[order]);
drivers/infiniband/hw/mthca/mthca_mr.c
134
__set_bit(seg, buddy->bits[order]);
drivers/infiniband/hw/mthca/mthca_mr.c
147
buddy->bits = kcalloc(buddy->max_order + 1, sizeof(*buddy->bits),
drivers/infiniband/hw/mthca/mthca_mr.c
150
if (!buddy->bits || !buddy->num_free)
drivers/infiniband/hw/mthca/mthca_mr.c
154
buddy->bits[i] = bitmap_zalloc(1 << (buddy->max_order - i),
drivers/infiniband/hw/mthca/mthca_mr.c
156
if (!buddy->bits[i])
drivers/infiniband/hw/mthca/mthca_mr.c
160
__set_bit(0, buddy->bits[buddy->max_order]);
drivers/infiniband/hw/mthca/mthca_mr.c
167
bitmap_free(buddy->bits[i]);
drivers/infiniband/hw/mthca/mthca_mr.c
170
kfree(buddy->bits);
drivers/infiniband/hw/mthca/mthca_mr.c
181
bitmap_free(buddy->bits[i]);
drivers/infiniband/hw/mthca/mthca_mr.c
183
kfree(buddy->bits);
drivers/infiniband/hw/mthca/mthca_mr.c
95
seg = find_first_bit(buddy->bits[o], m);
drivers/infiniband/hw/qedr/verbs.c
3258
u8 *bits, u8 bit)
drivers/infiniband/hw/qedr/verbs.c
3273
*bits |= bit;
drivers/infiniband/sw/rdmavt/qp.c
203
unsigned long bits;
drivers/infiniband/sw/rdmavt/qp.c
232
bits = xchg(&wss->entries[entry], 0);
drivers/infiniband/sw/rdmavt/qp.c
233
weight = hweight64((u64)bits);
drivers/infiniband/sw/rxe/rxe_hdr.h
615
__be32 bits;
drivers/infiniband/sw/rxe/rxe_hdr.h
626
return be32_to_cpu(feth->bits) & FETH_PLT_MASK;
drivers/infiniband/sw/rxe/rxe_hdr.h
633
return (be32_to_cpu(feth->bits) & FETH_SEL_MASK) >> FETH_SEL_SHIFT;
drivers/infiniband/sw/rxe/rxe_hdr.h
650
u32 bits = ((level << FETH_SEL_SHIFT) & FETH_SEL_MASK) |
drivers/infiniband/sw/rxe/rxe_hdr.h
653
feth->bits = cpu_to_be32(bits);
drivers/infiniband/sw/siw/iwarp.h
23
__be16 bits;
drivers/infiniband/sw/siw/iwarp.h
47
static inline void __mpa_rr_set_revision(__be16 *bits, u8 rev)
drivers/infiniband/sw/siw/iwarp.h
49
*bits = (*bits & ~MPA_RR_MASK_REVISION) |
drivers/infiniband/sw/siw/siw_cm.c
1508
cep->mpa.hdr.params.bits = 0;
drivers/infiniband/sw/siw/siw_cm.c
1515
__mpa_rr_set_revision(&cep->mpa.hdr.params.bits, version);
drivers/infiniband/sw/siw/siw_cm.c
1518
cep->mpa.hdr.params.bits |= MPA_RR_FLAG_GSO_EXP;
drivers/infiniband/sw/siw/siw_cm.c
1521
cep->mpa.hdr.params.bits |= MPA_RR_FLAG_CRC;
drivers/infiniband/sw/siw/siw_cm.c
1531
cep->mpa.hdr.params.bits |= MPA_RR_FLAG_ENHANCED;
drivers/infiniband/sw/siw/siw_cm.c
1637
if (try_gso && cep->mpa.hdr.params.bits & MPA_RR_FLAG_GSO_EXP) {
drivers/infiniband/sw/siw/siw_cm.c
1702
if (cep->mpa.hdr.params.bits & MPA_RR_FLAG_CRC)
drivers/infiniband/sw/siw/siw_cm.c
1790
if (__mpa_rr_revision(cep->mpa.hdr.params.bits) >= MPA_REVISION_1) {
drivers/infiniband/sw/siw/siw_cm.c
1791
cep->mpa.hdr.params.bits |= MPA_RR_FLAG_REJECT; /* reject */
drivers/infiniband/sw/siw/siw_cm.c
665
version = __mpa_rr_revision(req->params.bits);
drivers/infiniband/sw/siw/siw_cm.c
679
(req->params.bits & MPA_RR_FLAG_ENHANCED)) {
drivers/infiniband/sw/siw/siw_cm.c
692
if (req->params.bits & MPA_RR_FLAG_MARKERS)
drivers/infiniband/sw/siw/siw_cm.c
695
if (req->params.bits & MPA_RR_FLAG_CRC) {
drivers/infiniband/sw/siw/siw_cm.c
707
req->params.bits |= MPA_RR_FLAG_CRC;
drivers/infiniband/sw/siw/siw_cm.c
758
req->params.bits & MPA_RR_FLAG_CRC ? 1 : 0,
drivers/infiniband/sw/siw/siw_cm.c
760
req->params.bits & MPA_RR_FLAG_MARKERS ? 1 : 0, 0);
drivers/infiniband/sw/siw/siw_cm.c
762
req->params.bits &= ~MPA_RR_FLAG_MARKERS;
drivers/infiniband/sw/siw/siw_cm.c
763
req->params.bits |= MPA_RR_FLAG_REJECT;
drivers/infiniband/sw/siw/siw_cm.c
766
req->params.bits &= ~MPA_RR_FLAG_CRC;
drivers/infiniband/sw/siw/siw_cm.c
798
if (__mpa_rr_revision(rep->params.bits) > MPA_REVISION_2) {
drivers/infiniband/sw/siw/siw_cm.c
810
if (rep->params.bits & MPA_RR_FLAG_REJECT) {
drivers/infiniband/sw/siw/siw_cm.c
816
if (try_gso && rep->params.bits & MPA_RR_FLAG_GSO_EXP) {
drivers/infiniband/sw/siw/siw_cm.c
820
if ((rep->params.bits & MPA_RR_FLAG_MARKERS) ||
drivers/infiniband/sw/siw/siw_cm.c
821
(mpa_crc_required && !(rep->params.bits & MPA_RR_FLAG_CRC)) ||
drivers/infiniband/sw/siw/siw_cm.c
823
(rep->params.bits & MPA_RR_FLAG_CRC))) {
drivers/infiniband/sw/siw/siw_cm.c
825
rep->params.bits & MPA_RR_FLAG_CRC ? 1 : 0,
drivers/infiniband/sw/siw/siw_cm.c
827
rep->params.bits & MPA_RR_FLAG_MARKERS ? 1 : 0, 0);
drivers/infiniband/sw/siw/siw_cm.c
836
if (__mpa_rr_revision(rep->params.bits) < MPA_REVISION_2 ||
drivers/infiniband/sw/siw/siw_cm.c
837
!(rep->params.bits & MPA_RR_FLAG_ENHANCED)) {
drivers/infiniband/sw/siw/siw_cm.c
843
__mpa_rr_revision(rep->params.bits),
drivers/infiniband/sw/siw/siw_cm.c
844
rep->params.bits & MPA_RR_FLAG_ENHANCED ?
drivers/infiniband/sw/siw/siw_cm.c
922
if (rep->params.bits & MPA_RR_FLAG_CRC)
drivers/input/evdev.c
633
static int bits_to_user(unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
645
(compat_long_t *) bits +
drivers/input/evdev.c
654
if (copy_to_user(p, bits, len))
drivers/input/evdev.c
661
static int bits_from_user(unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
675
if (copy_from_user((compat_long_t *) bits +
drivers/input/evdev.c
681
*((compat_long_t *) bits + i - 1) = 0;
drivers/input/evdev.c
691
if (copy_from_user(bits, p, len))
drivers/input/evdev.c
700
static int bits_to_user(unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
710
return copy_to_user(p, bits, len) ? -EFAULT : len;
drivers/input/evdev.c
713
static int bits_from_user(unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
727
return copy_from_user(bits, p, len) ? -EFAULT : len;
drivers/input/evdev.c
734
static int bits_to_user(unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
742
return copy_to_user(p, bits, len) ? -EFAULT : len;
drivers/input/evdev.c
745
static int bits_from_user(unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
757
return copy_from_user(bits, p, len) ? -EFAULT : len;
drivers/input/evdev.c
780
unsigned long *bits;
drivers/input/evdev.c
785
case 0: bits = dev->evbit; len = EV_MAX; break;
drivers/input/evdev.c
786
case EV_KEY: bits = dev->keybit; len = KEY_MAX; break;
drivers/input/evdev.c
787
case EV_REL: bits = dev->relbit; len = REL_MAX; break;
drivers/input/evdev.c
788
case EV_ABS: bits = dev->absbit; len = ABS_MAX; break;
drivers/input/evdev.c
789
case EV_MSC: bits = dev->mscbit; len = MSC_MAX; break;
drivers/input/evdev.c
790
case EV_LED: bits = dev->ledbit; len = LED_MAX; break;
drivers/input/evdev.c
791
case EV_SND: bits = dev->sndbit; len = SND_MAX; break;
drivers/input/evdev.c
792
case EV_FF: bits = dev->ffbit; len = FF_MAX; break;
drivers/input/evdev.c
793
case EV_SW: bits = dev->swbit; len = SW_MAX; break;
drivers/input/evdev.c
797
return bits_to_user(bits, len, size, p, compat_mode);
drivers/input/evdev.c
886
unsigned long *bits, unsigned int maxbit,
drivers/input/evdev.c
900
bitmap_copy(mem, bits, maxbit);
drivers/input/input-compat.c
104
u32 dword = bits >> 32;
drivers/input/input-compat.c
108
dword = bits & 0xffffffffUL;
drivers/input/input-compat.c
113
if (bits || !skip_empty)
drivers/input/input-compat.c
114
len += snprintf(buf, buf_size, "%lx", bits);
drivers/input/input-compat.c
152
int input_bits_to_string(char *buf, int buf_size, unsigned long bits,
drivers/input/input-compat.c
155
return bits || !skip_empty ?
drivers/input/input-compat.c
156
snprintf(buf, buf_size, "%lx", bits) : 0;
drivers/input/input-compat.c
98
int input_bits_to_string(char *buf, int buf_size, unsigned long bits,
drivers/input/input-compat.h
78
int input_bits_to_string(char *buf, int buf_size, unsigned long bits,
drivers/input/input.c
1705
#define INPUT_DO_TOGGLE(dev, type, bits, on) \
drivers/input/input.c
1713
for_each_set_bit(i, dev->bits##bit, type##_CNT) { \
drivers/input/input.c
1714
active = test_bit(i, dev->bits); \
drivers/input/input.c
2179
#define INPUT_CLEANSE_BITMASK(dev, type, bits) \
drivers/input/input.c
2182
memset(dev->bits##bit, 0, \
drivers/input/input.c
2183
sizeof(dev->bits##bit)); \
drivers/input/joystick/adc-joystick.c
202
int bits;
drivers/input/joystick/adc-joystick.c
212
bits = chans[i].channel->scan_type.storagebits;
drivers/input/joystick/adc-joystick.c
213
if (!bits || bits > 16) {
drivers/input/joystick/adc-joystick.c
217
if (bits != chans[0].channel->scan_type.storagebits) {
drivers/input/joystick/adi.c
185
int bits = 0;
drivers/input/joystick/adi.c
189
bits |= ((adi->data[adi->idx - i] >> 5) & 1) << i;
drivers/input/joystick/adi.c
190
return bits;
drivers/input/joystick/sidewinder.c
103
int bits;
drivers/input/joystick/sidewinder.c
197
#define GB(pos,num) sw_get_bits(buf, pos, num, sw->bits)
drivers/input/joystick/sidewinder.c
199
static __u64 sw_get_bits(unsigned char *buf, int pos, int num, char bits)
drivers/input/joystick/sidewinder.c
202
int tri = pos % bits; /* Start position */
drivers/input/joystick/sidewinder.c
203
int i = pos / bits;
drivers/input/joystick/sidewinder.c
208
if (tri == bits) {
drivers/input/joystick/sidewinder.c
510
static void sw_print_packet(char *name, int length, unsigned char *buf, char bits)
drivers/input/joystick/sidewinder.c
516
printk("%x", (int)sw_get_bits(buf, i << 2, 4, bits));
drivers/input/joystick/sidewinder.c
651
sw->bits = m;
drivers/input/joystick/sidewinder.c
686
sw->bits = 3;
drivers/input/joystick/sidewinder.c
722
int bits, code;
drivers/input/joystick/sidewinder.c
750
for (j = 0; (bits = sw_bit[sw->type][j]); j++) {
drivers/input/joystick/sidewinder.c
754
min = bits == 1 ? -1 : 0;
drivers/input/joystick/sidewinder.c
755
max = (1 << bits) - 1;
drivers/input/joystick/sidewinder.c
756
fuzz = (bits >> 1) >= 2 ? 1 << ((bits >> 1) - 2) : 0;
drivers/input/joystick/sidewinder.c
757
flat = code == ABS_THROTTLE || bits < 5 ?
drivers/input/joystick/sidewinder.c
758
0 : 1 << (bits - 5);
drivers/input/keyboard/goldfish_events.c
51
unsigned long bits[], unsigned int type, size_t count)
drivers/input/keyboard/goldfish_events.c
69
set_bit(i + j, bits);
drivers/input/keyboard/gpio_keys.c
204
unsigned long *bits;
drivers/input/keyboard/gpio_keys.c
208
bits = bitmap_zalloc(n_events, GFP_KERNEL);
drivers/input/keyboard/gpio_keys.c
209
if (!bits)
drivers/input/keyboard/gpio_keys.c
221
__set_bit(*bdata->code, bits);
drivers/input/keyboard/gpio_keys.c
224
ret = scnprintf(buf, PAGE_SIZE - 1, "%*pbl", n_events, bits);
drivers/input/keyboard/gpio_keys.c
228
bitmap_free(bits);
drivers/input/keyboard/gpio_keys.c
251
unsigned long *bits __free(bitmap) = bitmap_alloc(n_events, GFP_KERNEL);
drivers/input/keyboard/gpio_keys.c
252
if (!bits)
drivers/input/keyboard/gpio_keys.c
255
error = bitmap_parselist(buf, bits, n_events);
drivers/input/keyboard/gpio_keys.c
260
if (!bitmap_subset(bits, bitmap, n_events))
drivers/input/keyboard/gpio_keys.c
269
if (test_bit(*bdata->code, bits) &&
drivers/input/keyboard/gpio_keys.c
283
if (test_bit(*bdata->code, bits))
drivers/input/keyboard/nspire-keypad.c
59
u16 bits, changed;
drivers/input/keyboard/nspire-keypad.c
68
bits = state[row];
drivers/input/keyboard/nspire-keypad.c
70
bits = ~bits;
drivers/input/keyboard/nspire-keypad.c
72
changed = bits ^ keypad->state[row];
drivers/input/keyboard/nspire-keypad.c
76
keypad->state[row] = bits;
drivers/input/keyboard/nspire-keypad.c
85
bits & (1U << col));
drivers/input/keyboard/pmic8xxx-keypad.c
373
int bits, rc, cycles;
drivers/input/keyboard/pmic8xxx-keypad.c
381
bits = 0;
drivers/input/keyboard/pmic8xxx-keypad.c
383
bits = kp->num_cols - KEYP_CTRL_SCAN_COLS_MIN;
drivers/input/keyboard/pmic8xxx-keypad.c
384
ctrl_val = (bits & KEYP_CTRL_SCAN_COLS_BITS) <<
drivers/input/keyboard/pmic8xxx-keypad.c
389
bits = 0;
drivers/input/keyboard/pmic8xxx-keypad.c
391
bits = row_bits[kp->num_rows - KEYP_CTRL_SCAN_ROWS_MIN];
drivers/input/keyboard/pmic8xxx-keypad.c
393
ctrl_val |= (bits << KEYP_CTRL_SCAN_ROWS_SHIFT);
drivers/input/keyboard/pmic8xxx-keypad.c
430
bits = (debounce_ms / 5) - 1;
drivers/input/keyboard/pmic8xxx-keypad.c
432
scan_val |= (bits << KEYP_SCAN_DBOUNCE_SHIFT);
drivers/input/keyboard/pmic8xxx-keypad.c
434
bits = fls(scan_delay_ms) - 1;
drivers/input/keyboard/pmic8xxx-keypad.c
435
scan_val |= (bits << KEYP_SCAN_PAUSE_SHIFT);
drivers/input/touchscreen/cyttsp5.c
110
#define SET_CMD_LOW(byte, bits) \
drivers/input/touchscreen/cyttsp5.c
111
((byte) = (((byte) & 0xF0) | ((bits) & 0x0F)))
drivers/input/touchscreen/cyttsp5.c
112
#define SET_CMD_HIGH(byte, bits)\
drivers/input/touchscreen/cyttsp5.c
113
((byte) = (((byte) & 0x0F) | ((bits) & 0xF0)))
drivers/iommu/intel/pasid.h
112
static inline void pasid_set_bits(u64 *ptr, u64 mask, u64 bits)
drivers/iommu/intel/pasid.h
117
WRITE_ONCE(*ptr, (old & ~mask) | bits);
drivers/iommu/iommu.c
440
u32 max_pasids = 0, bits = 0;
drivers/iommu/iommu.c
448
ret = device_property_read_u32(dev, "pasid-num-bits", &bits);
drivers/iommu/iommu.c
450
max_pasids = 1UL << bits;
drivers/irqchip/irq-ingenic-tcu.c
31
unsigned long bits;
drivers/irqchip/irq-ingenic-tcu.c
40
bits = irq_reg;
drivers/irqchip/irq-ingenic-tcu.c
42
for_each_set_bit(i, &bits, 32)
drivers/leds/leds-pca955x.c
102
.bits = 16,
drivers/leds/leds-pca955x.c
108
.bits = 4,
drivers/leds/leds-pca955x.c
145
static inline u8 pca955x_num_input_regs(u8 bits)
drivers/leds/leds-pca955x.c
147
return (bits + 7) / 8;
drivers/leds/leds-pca955x.c
151
static inline u8 pca955x_num_led_regs(u8 bits)
drivers/leds/leds-pca955x.c
153
return (bits + 3) / 4;
drivers/leds/leds-pca955x.c
178
u8 cmd = pca955x_num_input_regs(pca955x->chipdef->bits) + (2 * n);
drivers/leds/leds-pca955x.c
197
u8 cmd = pca955x_num_input_regs(pca955x->chipdef->bits) + 1 + (2 * n);
drivers/leds/leds-pca955x.c
213
u8 cmd = pca955x_num_input_regs(pca955x->chipdef->bits) + 4 + n;
drivers/leds/leds-pca955x.c
229
u8 cmd = pca955x_num_input_regs(pca955x->chipdef->bits) + 4 + n;
drivers/leds/leds-pca955x.c
243
u8 cmd = pca955x_num_input_regs(pca955x->chipdef->bits) + 1 + (2 * n);
drivers/leds/leds-pca955x.c
260
cmd = pca955x_num_input_regs(pca955x->chipdef->bits) + (2 * n);
drivers/leds/leds-pca955x.c
542
if (count > chip->bits)
drivers/leds/leds-pca955x.c
550
chip->bits, sizeof(struct pca955x_led),
drivers/leds/leds-pca955x.c
560
if ((res != 0) || (reg >= chip->bits))
drivers/leds/leds-pca955x.c
571
pdata->num_leds = chip->bits;
drivers/leds/leds-pca955x.c
614
client->name, chip->bits, client->addr);
drivers/leds/leds-pca955x.c
619
if (pdata->num_leds != chip->bits) {
drivers/leds/leds-pca955x.c
622
pdata->num_leds, chip->bits);
drivers/leds/leds-pca955x.c
630
pca955x->leds = devm_kcalloc(&client->dev, chip->bits,
drivers/leds/leds-pca955x.c
645
nls = pca955x_num_led_regs(chip->bits);
drivers/leds/leds-pca955x.c
648
0x10 | (pca955x_num_input_regs(chip->bits) + 4), nls,
drivers/leds/leds-pca955x.c
656
for (i = 0; i < chip->bits; i++) {
drivers/leds/leds-pca955x.c
746
pca955x->gpio.ngpio = chip->bits;
drivers/leds/leds-pca955x.c
76
u8 bits;
drivers/leds/leds-pca955x.c
84
.bits = 2,
drivers/leds/leds-pca955x.c
90
.bits = 8,
drivers/leds/leds-pca955x.c
96
.bits = 16,
drivers/leds/rgb/leds-lp5812.c
163
chip->drive_mode.bits.mix_sel_led_0 = false;
drivers/leds/rgb/leds-lp5812.c
164
chip->drive_mode.bits.mix_sel_led_1 = false;
drivers/leds/rgb/leds-lp5812.c
165
chip->drive_mode.bits.mix_sel_led_2 = false;
drivers/leds/rgb/leds-lp5812.c
166
chip->drive_mode.bits.mix_sel_led_3 = false;
drivers/leds/rgb/leds-lp5812.c
169
chip->drive_mode.bits.led_mode = LP5812_MODE_DIRECT_VALUE;
drivers/leds/rgb/leds-lp5812.c
177
chip->drive_mode.bits.led_mode = chip_mode_map[i].mode;
drivers/leds/rgb/leds-lp5812.c
178
chip->scan_order.bits.order0 = chip_mode_map[i].scan_order_0;
drivers/leds/rgb/leds-lp5812.c
179
chip->scan_order.bits.order1 = chip_mode_map[i].scan_order_1;
drivers/leds/rgb/leds-lp5812.c
180
chip->scan_order.bits.order2 = chip_mode_map[i].scan_order_2;
drivers/leds/rgb/leds-lp5812.c
181
chip->scan_order.bits.order3 = chip_mode_map[i].scan_order_3;
drivers/leds/rgb/leds-lp5812.c
185
chip->drive_mode.bits.mix_sel_led_0 = true;
drivers/leds/rgb/leds-lp5812.c
188
chip->drive_mode.bits.mix_sel_led_1 = true;
drivers/leds/rgb/leds-lp5812.c
191
chip->drive_mode.bits.mix_sel_led_2 = true;
drivers/leds/rgb/leds-lp5812.c
194
chip->drive_mode.bits.mix_sel_led_3 = true;
drivers/leds/rgb/leds-lp5812.h
108
} bits;
drivers/leds/rgb/leds-lp5812.h
120
} bits;
drivers/mailbox/arm_mhu_db.c
102
bits = readl_relaxed(base + INTR_STAT_OFS);
drivers/mailbox/arm_mhu_db.c
103
if (!bits)
drivers/mailbox/arm_mhu_db.c
108
for (doorbell = 0; bits; doorbell++) {
drivers/mailbox/arm_mhu_db.c
109
if (!test_and_clear_bit(doorbell, &bits))
drivers/mailbox/arm_mhu_db.c
96
unsigned long bits;
drivers/mailbox/mailbox-sti.c
164
unsigned long bits;
drivers/mailbox/mailbox-sti.c
167
bits = readl_relaxed(base + STI_IRQ_VAL_OFFSET);
drivers/mailbox/mailbox-sti.c
168
if (!bits)
drivers/mailbox/mailbox-sti.c
173
for (channel = 0; bits; channel++) {
drivers/mailbox/mailbox-sti.c
174
if (!test_and_clear_bit(channel, &bits))
drivers/md/dm-cache-metadata.c
1548
static int __set_dirty_bits_v1(struct dm_cache_metadata *cmd, unsigned int nr_bits, unsigned long *bits)
drivers/md/dm-cache-metadata.c
1554
r = __dirty(cmd, to_cblock(i), test_bit(i, bits));
drivers/md/dm-cache-metadata.c
1564
unsigned long *bits = context;
drivers/md/dm-cache-metadata.c
1565
*value = test_bit(index, bits);
drivers/md/dm-cache-metadata.c
1569
static int __set_dirty_bits_v2(struct dm_cache_metadata *cmd, unsigned int nr_bits, unsigned long *bits)
drivers/md/dm-cache-metadata.c
1584
return dm_bitset_new(&cmd->dirty_info, &cmd->dirty_root, nr_bits, is_dirty_callback, bits);
drivers/md/dm-cache-metadata.c
1589
unsigned long *bits)
drivers/md/dm-cache-metadata.c
1595
r = __set_dirty_bits_v2(cmd, nr_bits, bits);
drivers/md/dm-cache-metadata.c
1597
r = __set_dirty_bits_v1(cmd, nr_bits, bits);
drivers/md/dm-cache-metadata.h
99
unsigned int nr_bits, unsigned long *bits);
drivers/md/dm-cache-policy-internal.h
136
static inline void free_bitset(unsigned long *bits)
drivers/md/dm-cache-policy-internal.h
138
vfree(bits);
drivers/md/dm-era-target.c
108
return test_bit(block, ws->bits);
drivers/md/dm-era-target.c
1316
set_bit(get_block(era, bio), ws->bits);
drivers/md/dm-era-target.c
141
if (!test_bit(block, ws->bits)) {
drivers/md/dm-era-target.c
42
unsigned long *bits;
drivers/md/dm-era-target.c
51
vfree(ws->bits);
drivers/md/dm-era-target.c
52
ws->bits = NULL;
drivers/md/dm-era-target.c
77
ws->bits = vzalloc(bitset_size(nr_blocks));
drivers/md/dm-era-target.c
78
if (!ws->bits) {
drivers/md/dm-era-target.c
94
memset(ws->bits, 0, bitset_size(nr_blocks));
drivers/md/dm-vdo/indexer/delta-index.c
715
int bits;
drivers/md/dm-vdo/indexer/delta-index.c
739
bits = IMMUTABLE_HEADER_SIZE + delta_lists[n_lists].size;
drivers/md/dm-vdo/indexer/delta-index.c
740
if (bits > free_bits)
drivers/md/dm-vdo/indexer/delta-index.c
744
free_bits -= bits;
drivers/md/dm-vdo/indexer/volume-index.c
126
u64 bits = uds_extract_volume_index_bytes(name);
drivers/md/dm-vdo/indexer/volume-index.c
128
return (bits >> sub_index->address_bits) % sub_index->list_count;
drivers/md/md-llbitmap.c
1595
int bits[BitStateCount] = {0};
drivers/md/md-llbitmap.c
1617
bits[c]++;
drivers/md/md-llbitmap.c
1627
bits[BitUnwritten], bits[BitClean], bits[BitDirty],
drivers/md/md-llbitmap.c
1628
bits[BitNeedSync], bits[BitSyncing],
drivers/md/md-llbitmap.c
1629
bits[BitNeedSyncUnwritten], bits[BitSyncingUnwritten],
drivers/md/md-llbitmap.c
1630
bits[BitCleanUnwritten]);
drivers/md/md-llbitmap.c
1633
static struct md_sysfs_entry llbitmap_bits = __ATTR_RO(bits);
drivers/md/persistent-data/dm-space-map-common.c
135
uint64_t bits = le64_to_cpu(*w_le);
drivers/md/persistent-data/dm-space-map-common.c
136
uint64_t mask = (bits + WORD_MASK_HIGH + 1) & WORD_MASK_HIGH;
drivers/md/persistent-data/dm-space-map-common.c
138
return !(~bits & mask);
drivers/media/common/saa7146/saa7146_fops.c
34
void saa7146_res_free(struct saa7146_dev *dev, unsigned int bits)
drivers/media/common/saa7146/saa7146_fops.c
38
WARN_ON((vv->resources & bits) != bits);
drivers/media/common/saa7146/saa7146_fops.c
40
vv->resources &= ~bits;
drivers/media/common/saa7146/saa7146_fops.c
41
DEB_D("res: put 0x%02x, cur:0x%02x\n", bits, vv->resources);
drivers/media/i2c/max2175.c
1261
u32 *bits)
drivers/media/i2c/max2175.c
1264
*bits = load / 10;
drivers/media/i2c/max2175.c
1266
*bits = load / 10 - 1;
drivers/media/i2c/ov5648.c
1026
u8 mask, u8 bits)
drivers/media/i2c/ov5648.c
1036
value |= bits;
drivers/media/i2c/ov5648.c
1162
u8 bits;
drivers/media/i2c/ov5648.c
1166
bits = OV5648_ISP_CTRL0_BLACK_CORRECT_EN |
drivers/media/i2c/ov5648.c
1169
ret = ov5648_update_bits(sensor, OV5648_ISP_CTRL0_REG, bits, bits);
drivers/media/i2c/ov5648.c
1660
u8 bits = OV5648_TC20_FLIP_VERT_ISP_EN |
drivers/media/i2c/ov5648.c
1663
return ov5648_update_bits(sensor, OV5648_TC20_REG, bits,
drivers/media/i2c/ov5648.c
1664
enable ? bits : 0);
drivers/media/i2c/ov5648.c
1669
u8 bits = OV5648_TC21_FLIP_HORZ_ISP_EN |
drivers/media/i2c/ov5648.c
1672
return ov5648_update_bits(sensor, OV5648_TC21_REG, bits,
drivers/media/i2c/ov5648.c
1673
enable ? bits : 0);
drivers/media/i2c/ov5693.c
359
u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN |
drivers/media/i2c/ov5693.c
363
ret = cci_update_bits(ov5693->regmap, OV5693_FORMAT1_REG, bits,
drivers/media/i2c/ov5693.c
364
enable ? bits : 0, NULL);
drivers/media/i2c/ov5693.c
374
u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN |
drivers/media/i2c/ov5693.c
378
ret = cci_update_bits(ov5693->regmap, OV5693_FORMAT2_REG, bits,
drivers/media/i2c/ov5693.c
379
enable ? bits : 0, NULL);
drivers/media/i2c/ov8865.c
1407
u8 mask, u8 bits)
drivers/media/i2c/ov8865.c
1417
value |= bits;
drivers/media/i2c/ov8865.c
2194
u8 bits = OV8865_FORMAT1_FLIP_VERT_ISP_EN |
drivers/media/i2c/ov8865.c
2197
return ov8865_update_bits(sensor, OV8865_FORMAT1_REG, bits,
drivers/media/i2c/ov8865.c
2198
enable ? bits : 0);
drivers/media/i2c/ov8865.c
2203
u8 bits = OV8865_FORMAT2_FLIP_HORZ_ISP_EN |
drivers/media/i2c/ov8865.c
2206
return ov8865_update_bits(sensor, OV8865_FORMAT2_REG, bits,
drivers/media/i2c/ov8865.c
2207
enable ? bits : 0);
drivers/media/i2c/tc358746.c
381
static int tc358746_set_bits(struct tc358746 *tc358746, u32 reg, u32 bits)
drivers/media/i2c/tc358746.c
383
return tc358746_update_bits(tc358746, reg, bits, bits);
drivers/media/i2c/tc358746.c
386
static int tc358746_clear_bits(struct tc358746 *tc358746, u32 reg, u32 bits)
drivers/media/i2c/tc358746.c
388
return tc358746_update_bits(tc358746, reg, bits, 0);
drivers/media/pci/bt8xx/bttv-cards.c
3865
u8 bits;
drivers/media/pci/bt8xx/bttv-cards.c
3876
bits = micro[n];
drivers/media/pci/bt8xx/bttv-cards.c
3879
if (bits & 0x01)
drivers/media/pci/bt8xx/bttv-cards.c
3884
bits >>= 1;
drivers/media/pci/bt8xx/bttv-driver.c
2541
static char *bits[] = {
drivers/media/pci/bt8xx/bttv-driver.c
2551
for (i = ARRAY_SIZE(bits)-1; i >= 0; i--)
drivers/media/pci/bt8xx/bttv-driver.c
2553
pr_cont(" %s", bits[i]);
drivers/media/pci/bt8xx/bttv-driver.c
728
void free_btres_lock(struct bttv *btv, int bits)
drivers/media/pci/bt8xx/bttv-driver.c
730
if ((btv->resources & bits) != bits) {
drivers/media/pci/bt8xx/bttv-driver.c
734
btv->resources &= ~bits;
drivers/media/pci/bt8xx/bttv-driver.c
736
bits = btv->resources;
drivers/media/pci/bt8xx/bttv-driver.c
738
if (0 == (bits & VIDEO_RESOURCES))
drivers/media/pci/bt8xx/bttv-driver.c
741
if (0 == (bits & VBI_RESOURCES))
drivers/media/pci/bt8xx/bttv-gpio.c
158
void bttv_gpio_bits(struct bttv_core *core, u32 mask, u32 bits)
drivers/media/pci/bt8xx/bttv-gpio.c
167
data = data | (mask & bits);
drivers/media/pci/bt8xx/bttv.h
353
void bttv_gpio_bits(struct bttv_core *core, u32 mask, u32 bits);
drivers/media/pci/bt8xx/bttv.h
355
#define gpio_inout(mask,bits) bttv_gpio_inout(&btv->c, mask, bits)
drivers/media/pci/bt8xx/bttv.h
358
#define gpio_bits(mask,bits) bttv_gpio_bits(&btv->c, mask, bits)
drivers/media/pci/bt8xx/bttvp.h
259
void free_btres_lock(struct bttv *btv, int bits);
drivers/media/pci/bt8xx/dst.c
49
union dst_gpio_packet bits;
drivers/media/pci/bt8xx/dst.c
51
bits.psize = psize;
drivers/media/pci/bt8xx/dst.c
52
bt878_device_control(state->bt, DST_IG_TS, &bits);
drivers/media/pci/bt8xx/dst.c
59
union dst_gpio_packet bits;
drivers/media/pci/bt8xx/dst.c
78
bits.outp.mask = enbb;
drivers/media/pci/bt8xx/dst.c
79
bits.outp.highvals = outhigh;
drivers/media/pci/bt8xx/dst.c
80
if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
drivers/media/pci/cx23885/cx23885-core.c
412
static char *bits[] = {
drivers/media/pci/cx23885/cx23885-core.c
422
for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--)
drivers/media/pci/cx23885/cx23885-core.c
424
pr_cont(" %s", bits[i]);
drivers/media/pci/cx25821/cx25821-core.c
1235
int len, u32 bits, u32 mask)
drivers/media/pci/cx25821/cx25821-core.c
1239
printk(KERN_DEBUG pr_fmt("%s: %s [0x%x]"), name, tag, bits);
drivers/media/pci/cx25821/cx25821-core.c
1242
if (!(bits & (1 << i)))
drivers/media/pci/cx25821/cx25821-core.c
322
static const char * const bits[] = {
drivers/media/pci/cx25821/cx25821-core.c
332
for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--) {
drivers/media/pci/cx25821/cx25821-core.c
334
pr_cont(" %s", bits[i]);
drivers/media/pci/cx25821/cx25821.h
417
int len, u32 bits, u32 mask);
drivers/media/pci/cx88/cx88-core.c
404
static const char * const bits[] = {
drivers/media/pci/cx88/cx88-core.c
414
for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--)
drivers/media/pci/cx88/cx88-core.c
416
pr_cont(" %s", bits[i]);
drivers/media/pci/cx88/cx88-core.c
482
int len, u32 bits, u32 mask)
drivers/media/pci/cx88/cx88-core.c
486
dprintk0("%s [0x%x]", tag, bits);
drivers/media/pci/cx88/cx88-core.c
488
if (!(bits & (1 << i)))
drivers/media/pci/cx88/cx88-input.c
528
unsigned int todo, bits;
drivers/media/pci/cx88/cx88-input.c
544
for (todo = 32; todo > 0; todo -= bits) {
drivers/media/pci/cx88/cx88-input.c
546
bits = min(todo, 32U - fls(ev.pulse ? samples : ~samples));
drivers/media/pci/cx88/cx88-input.c
547
ev.duration = (bits * (USEC_PER_SEC / 1000)) / ir_samplerate;
drivers/media/pci/cx88/cx88-input.c
549
samples <<= bits;
drivers/media/pci/cx88/cx88.h
613
int len, u32 bits, u32 mask);
drivers/media/pci/intel/ipu6/ipu6-isys.c
498
fc.bits.ltr_val = ltr_val;
drivers/media/pci/intel/ipu6/ipu6-isys.c
499
fc.bits.ltr_scale = ltr_scale;
drivers/media/pci/intel/ipu6/ipu6-isys.c
500
fc.bits.did_val = did_val;
drivers/media/pci/intel/ipu6/ipu6-isys.c
501
fc.bits.did_scale = did_scale;
drivers/media/pci/intel/ipu6/ipu6-isys.c
589
if (calc_fill_time_us <= ltrdid.lut_fill_time.bits.th0)
drivers/media/pci/intel/ipu6/ipu6-isys.c
591
else if (calc_fill_time_us <= ltrdid.lut_fill_time.bits.th1)
drivers/media/pci/intel/ipu6/ipu6-isys.c
592
ltr = ltrdid.lut_ltr.bits.val0;
drivers/media/pci/intel/ipu6/ipu6-isys.c
593
else if (calc_fill_time_us <= ltrdid.lut_fill_time.bits.th2)
drivers/media/pci/intel/ipu6/ipu6-isys.c
594
ltr = ltrdid.lut_ltr.bits.val1;
drivers/media/pci/intel/ipu6/ipu6-isys.c
595
else if (calc_fill_time_us <= ltrdid.lut_fill_time.bits.th3)
drivers/media/pci/intel/ipu6/ipu6-isys.c
596
ltr = ltrdid.lut_ltr.bits.val2;
drivers/media/pci/intel/ipu6/ipu6-isys.c
598
ltr = ltrdid.lut_ltr.bits.val3;
drivers/media/pci/intel/ipu6/ipu6-isys.c
88
} bits;
drivers/media/pci/intel/ipu6/ipu6-isys.h
71
} bits;
drivers/media/pci/intel/ipu6/ipu6-isys.h
80
} bits;
drivers/media/pci/pluto2/pluto2.c
135
static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
drivers/media/pci/pluto2/pluto2.c
139
val |= bits;
drivers/media/pci/pt1/pt1.c
736
int bits;
drivers/media/pci/pt1/pt1.c
746
bits = pt1->power | !pt1->reset << 3;
drivers/media/pci/pt1/pt1.c
752
bits |= 1 << 2;
drivers/media/pci/pt1/pt1.c
755
bits |= 1 << 1 | 1 << 2;
drivers/media/pci/pt1/pt1.c
762
bits |= sleep_bits[i];
drivers/media/pci/pt1/pt1.c
764
pt1_write_reg(pt1, 1, bits);
drivers/media/pci/tw5864/tw5864-h264.c
44
static void bs_write(struct bs *s, int count, u32 bits)
drivers/media/pci/tw5864/tw5864-h264.c
50
bits &= (1 << count) - 1;
drivers/media/pci/tw5864/tw5864-h264.c
52
*s->ptr = (*s->ptr << count) | bits;
drivers/media/pci/tw5864/tw5864-h264.c
57
(bits >> (count - s->bits_left));
drivers/media/platform/aspeed/aspeed-video.c
572
u32 bits)
drivers/media/platform/aspeed/aspeed-video.c
578
t |= bits;
drivers/media/platform/chips-media/coda/coda-jpeg.c
410
static inline void coda9_jpeg_write_huff_values(struct coda_dev *dev, u8 *bits,
drivers/media/platform/chips-media/coda/coda-jpeg.c
413
s8 *values = (s8 *)(bits + 16);
drivers/media/platform/chips-media/coda/coda-jpeg.c
417
huff_length += bits[i];
drivers/media/platform/chips-media/coda/coda-jpeg.c
586
const u8 *bits, *huffval;
drivers/media/platform/chips-media/coda/coda-jpeg.c
600
bits = huff_tabs[tab_num];
drivers/media/platform/chips-media/coda/coda-jpeg.c
608
j = bits[i - 1];
drivers/media/platform/imagination/e5010-jpeg-enc.c
794
unsigned int no_bytes, unsigned long bits)
drivers/media/platform/imagination/e5010-jpeg-enc.c
806
*(w_addr++) = ((u8 *)&bits)[i];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c
1249
cdef->cdef_bits = ctrl_cdef->bits;
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
127
u32 bits[10][2];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1276
for (i = 0; i < ARRAY_SIZE(counts_map->bits); i++)
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1277
for (j = 0; j < ARRAY_SIZE(counts_map->bits[0]); j++)
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1278
memcpy(counts_map->bits[i][j], counts->mvcomp[i].bits[j],
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1279
sizeof(counts_map->bits[0][0]));
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1280
counts_helper->bits = &counts_map->bits;
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1420
for (i = 0; i < ARRAY_SIZE(mv->bits); i++)
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1421
memcpy(mv->bits[i], frame_ctx->class0_bits[i].bits, sizeof(mv->bits[0]));
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1509
for (i = 0; i < ARRAY_SIZE(mv->bits); i++)
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
1510
memcpy(frame_ctx->class0_bits[i].bits, mv->bits[i], sizeof(mv->bits[0]));
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
160
u32 bits[2][10][2];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c
59
u8 bits[10];
drivers/media/platform/qcom/camss/camss-vfe-17x.c
179
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-17x.c
181
writel_relaxed(bits | set_bits, vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
224
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
226
writel_relaxed(bits & ~clr_bits, vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
231
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-1.c
233
writel_relaxed(bits | set_bits, vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
267
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
269
writel_relaxed(bits & ~clr_bits, vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
274
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-7.c
276
writel_relaxed(bits | set_bits, vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
250
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
252
writel_relaxed(bits & ~clr_bits, vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
257
u32 bits = readl_relaxed(vfe->base + reg);
drivers/media/platform/qcom/camss/camss-vfe-4-8.c
259
writel_relaxed(bits | set_bits, vfe->base + reg);
drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
121
u32 bits[2][10][2];
drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
299
memcpy(rkprobs->mv.bits, probs->mv.bits,
drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
300
sizeof(rkprobs->mv.bits));
drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
64
u8 bits[2][10];
drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c
934
vp9_ctx->inter_cnts.bits = &inter_cnts->bits;
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
722
unsigned int bits;
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.c
37
unsigned int bits = dev->mem_size >> PAGE_SHIFT;
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.c
45
start = bitmap_find_next_zero_area(dev->mem_bitmap, bits, 0, count, align);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.c
46
if (start > bits)
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
854
writel(ctx->slice_size.bits, mfc_regs->e_mslice_size_bits);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
900
ctx->slice_size.bits = p->slice_bit;
drivers/media/platform/sunxi/sun8i-di/sun8i-di.c
44
u32 reg, u32 bits)
drivers/media/platform/sunxi/sun8i-di/sun8i-di.c
46
writel(readl(dev->base + reg) | bits, dev->base + reg);
drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c
35
static inline void rotate_set_bits(struct rotate_dev *dev, u32 reg, u32 bits)
drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c
37
writel(readl(dev->base + reg) | bits, dev->base + reg);
drivers/media/platform/ti/davinci/vpif.h
144
#define GENERATE_MASK(bits, pos) \
drivers/media/platform/ti/davinci/vpif.h
145
((((0xFFFFFFFF) << (32 - bits)) >> (32 - bits)) << pos)
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c
725
memcpy(mv->bits, probs->mv.bits, sizeof(mv->bits));
drivers/media/platform/verisilicon/hantro_vp9.c
145
vp9_ctx->cnts.bits = &cnts->mv_counts.bits;
drivers/media/platform/verisilicon/hantro_vp9.h
17
u8 bits[2][10];
drivers/media/platform/verisilicon/hantro_vp9.h
72
u32 bits[2][10][2];
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1410
enable_cdef = !(cdef->bits == 0 &&
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1417
hantro_reg_write(vpu, &av1_cdef_bits, cdef->bits);
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
1420
for (i = 0; i < BIT(cdef->bits); i++) {
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
648
int bits = ctrls->sequence->order_hint_bits - 1;
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
655
m = 1 << bits;
drivers/media/radio/radio-aimslab.c
100
bits |= AIMS_BIT_TUN_CE;
drivers/media/radio/radio-aimslab.c
102
outb_p(bits, rt->isa.io);
drivers/media/radio/radio-aimslab.c
90
u8 bits = AIMS_BIT_VOL_DN | AIMS_BIT_VOL_UP | AIMS_BIT_TUN_STRQ;
drivers/media/radio/radio-aimslab.c
93
bits |= AIMS_BIT_VOL_CE;
drivers/media/radio/radio-aimslab.c
96
bits |= AIMS_BIT_TUN_DATA;
drivers/media/radio/radio-aimslab.c
98
bits |= AIMS_BIT_TUN_CLK;
drivers/media/radio/radio-aztech.c
71
u8 bits = az->curvol;
drivers/media/radio/radio-aztech.c
74
bits |= AZTECH_BIT_TUN_DATA;
drivers/media/radio/radio-aztech.c
76
bits |= AZTECH_BIT_TUN_CLK;
drivers/media/radio/radio-aztech.c
78
bits |= AZTECH_BIT_TUN_CE;
drivers/media/radio/radio-aztech.c
80
outb_p(bits, az->isa.io);
drivers/media/radio/radio-maxiradio.c
102
u8 bits = inb(dev->io);
drivers/media/radio/radio-maxiradio.c
104
return ((bits & data) ? TEA575X_DATA : 0) |
drivers/media/radio/radio-maxiradio.c
105
((bits & mo_st) ? TEA575X_MOST : 0);
drivers/media/radio/radio-maxiradio.c
87
u8 bits = 0;
drivers/media/radio/radio-maxiradio.c
89
bits |= (pins & TEA575X_DATA) ? data : 0;
drivers/media/radio/radio-maxiradio.c
90
bits |= (pins & TEA575X_CLK) ? clk : 0;
drivers/media/radio/radio-maxiradio.c
91
bits |= (pins & TEA575X_WREN) ? wren : 0;
drivers/media/radio/radio-maxiradio.c
92
bits |= power;
drivers/media/radio/radio-maxiradio.c
94
outb(bits, dev->io);
drivers/media/radio/radio-sf16fmi.c
74
u8 bits = FMI_BIT_TUN_STRQ;
drivers/media/radio/radio-sf16fmi.c
77
bits |= FMI_BIT_VOL_SW;
drivers/media/radio/radio-sf16fmi.c
80
bits |= FMI_BIT_TUN_DATA;
drivers/media/radio/radio-sf16fmi.c
82
bits |= FMI_BIT_TUN_CLK;
drivers/media/radio/radio-sf16fmi.c
84
bits |= FMI_BIT_TUN_CE;
drivers/media/radio/radio-sf16fmi.c
87
outb_p(bits, fmi->io);
drivers/media/radio/radio-sf16fmr2.c
63
u8 bits = 0;
drivers/media/radio/radio-sf16fmr2.c
65
bits |= (pins & TEA575X_DATA) ? STR_DATA : 0;
drivers/media/radio/radio-sf16fmr2.c
66
bits |= (pins & TEA575X_CLK) ? STR_CLK : 0;
drivers/media/radio/radio-sf16fmr2.c
68
bits |= (pins & TEA575X_WREN) ? 0 : STR_WREN | STR_DATA;
drivers/media/radio/radio-sf16fmr2.c
70
outb(bits, fmr2->io);
drivers/media/radio/radio-sf16fmr2.c
76
u8 bits = inb(fmr2->io);
drivers/media/radio/radio-sf16fmr2.c
78
return ((bits & STR_DATA) ? TEA575X_DATA : 0) |
drivers/media/radio/radio-sf16fmr2.c
79
((bits & STR_MOST) ? TEA575X_MOST : 0);
drivers/media/rc/ir-imon-decoder.c
133
data->bits = 0;
drivers/media/rc/ir-imon-decoder.c
145
data->bits <<= 1;
drivers/media/rc/ir-imon-decoder.c
147
data->bits |= 1;
drivers/media/rc/ir-imon-decoder.c
150
if (data->last_chk != !(data->bits & 3))
drivers/media/rc/ir-imon-decoder.c
43
if (imon->bits == 0x299115b7)
drivers/media/rc/ir-imon-decoder.c
46
if ((imon->bits & 0xfc0000ff) == 0x680000b7) {
drivers/media/rc/ir-imon-decoder.c
50
buf = imon->bits >> 16;
drivers/media/rc/ir-imon-decoder.c
53
if (imon->bits & 0x02000000)
drivers/media/rc/ir-imon-decoder.c
55
buf = imon->bits >> 8;
drivers/media/rc/ir-imon-decoder.c
58
if (imon->bits & 0x01000000)
drivers/media/rc/ir-imon-decoder.c
63
imon->bits = rel_y > 0 ?
drivers/media/rc/ir-imon-decoder.c
67
imon->bits = rel_x > 0 ?
drivers/media/rc/ir-imon-decoder.c
77
(imon->bits & 0x00010000) != 0);
drivers/media/rc/ir-imon-decoder.c
79
(imon->bits & 0x00040000) != 0);
drivers/media/rc/ir-imon-decoder.c
83
rc_keydown(dev, RC_PROTO_IMON, imon->bits, 0);
drivers/media/rc/ir-jvc-decoder.c
129
scancode = (bitrev8((data->bits >> 8) & 0xff) << 8) |
drivers/media/rc/ir-jvc-decoder.c
130
(bitrev8((data->bits >> 0) & 0xff) << 0);
drivers/media/rc/ir-jvc-decoder.c
134
data->old_bits = data->bits;
drivers/media/rc/ir-jvc-decoder.c
135
} else if (data->bits == data->old_bits) {
drivers/media/rc/ir-jvc-decoder.c
94
data->bits <<= 1;
drivers/media/rc/ir-jvc-decoder.c
96
data->bits |= 1;
drivers/media/rc/ir-nec-decoder.c
110
data->bits <<= 1;
drivers/media/rc/ir-nec-decoder.c
112
data->bits |= 1;
drivers/media/rc/ir-nec-decoder.c
142
address = bitrev8((data->bits >> 24) & 0xff);
drivers/media/rc/ir-nec-decoder.c
143
not_address = bitrev8((data->bits >> 16) & 0xff);
drivers/media/rc/ir-nec-decoder.c
144
command = bitrev8((data->bits >> 8) & 0xff);
drivers/media/rc/ir-nec-decoder.c
145
not_command = bitrev8((data->bits >> 0) & 0xff);
drivers/media/rc/ir-rc5-decoder.c
119
xdata = (data->bits & 0x0003F) >> 0;
drivers/media/rc/ir-rc5-decoder.c
120
command = (data->bits & 0x00FC0) >> 6;
drivers/media/rc/ir-rc5-decoder.c
121
system = (data->bits & 0x1F000) >> 12;
drivers/media/rc/ir-rc5-decoder.c
122
toggle = (data->bits & 0x20000) ? 1 : 0;
drivers/media/rc/ir-rc5-decoder.c
123
command += (data->bits & 0x40000) ? 0 : 0x40;
drivers/media/rc/ir-rc5-decoder.c
134
command = (data->bits & 0x0003F) >> 0;
drivers/media/rc/ir-rc5-decoder.c
135
system = (data->bits & 0x007C0) >> 6;
drivers/media/rc/ir-rc5-decoder.c
136
toggle = (data->bits & 0x00800) ? 1 : 0;
drivers/media/rc/ir-rc5-decoder.c
137
command += (data->bits & 0x01000) ? 0 : 0x40;
drivers/media/rc/ir-rc5-decoder.c
148
command = (data->bits & 0x0003F) >> 0;
drivers/media/rc/ir-rc5-decoder.c
149
system = (data->bits & 0x02FC0) >> 6;
drivers/media/rc/ir-rc5-decoder.c
150
toggle = (data->bits & 0x01000) ? 1 : 0;
drivers/media/rc/ir-rc5-decoder.c
83
data->bits <<= 1;
drivers/media/rc/ir-rc5-decoder.c
85
data->bits |= 1;
drivers/media/rc/ir-rc6-decoder.c
337
int bits;
drivers/media/rc/ir-rc6-decoder.c
342
bits = 32;
drivers/media/rc/ir-rc6-decoder.c
345
bits = 24;
drivers/media/rc/ir-rc6-decoder.c
348
bits = 20;
drivers/media/rc/ir-rc6-decoder.c
370
bits,
drivers/media/rc/ir-rcmm-decoder.c
131
data->bits <<= 2;
drivers/media/rc/ir-rcmm-decoder.c
132
data->bits |= value;
drivers/media/rc/ir-rcmm-decoder.c
151
toggle = !!(0x8000 & data->bits);
drivers/media/rc/ir-rcmm-decoder.c
152
scancode = data->bits & ~0x8000;
drivers/media/rc/ir-rcmm-decoder.c
155
scancode = data->bits;
drivers/media/rc/ir-rcmm-decoder.c
26
return !((0x000c0000 & data->bits) == 0x000c0000);
drivers/media/rc/ir-rcmm-decoder.c
34
rc_keydown(dev, RC_PROTO_RCMM24, data->bits, 0);
drivers/media/rc/ir-rcmm-decoder.c
42
rc_keydown(dev, RC_PROTO_RCMM12, data->bits, 0);
drivers/media/rc/ir-rcmm-decoder.c
87
data->bits = 0;
drivers/media/rc/ir-sanyo-decoder.c
110
data->bits <<= 1;
drivers/media/rc/ir-sanyo-decoder.c
112
data->bits |= 1;
drivers/media/rc/ir-sanyo-decoder.c
141
address = bitrev16((data->bits >> 29) & 0x1fff) >> 3;
drivers/media/rc/ir-sanyo-decoder.c
143
command = bitrev8((data->bits >> 8) & 0xff);
drivers/media/rc/ir-sanyo-decoder.c
144
not_command = bitrev8((data->bits >> 0) & 0xff);
drivers/media/rc/ir-sanyo-decoder.c
148
data->bits);
drivers/media/rc/ir-sharp-decoder.c
112
if ((data->bits & 0x3) != 0x2 &&
drivers/media/rc/ir-sharp-decoder.c
114
(data->bits & 0x3) != 0x0)
drivers/media/rc/ir-sharp-decoder.c
143
msg = (data->bits >> 15) & 0x7fff;
drivers/media/rc/ir-sharp-decoder.c
144
echo = data->bits & 0x7fff;
drivers/media/rc/ir-sharp-decoder.c
85
data->bits <<= 1;
drivers/media/rc/ir-sharp-decoder.c
88
data->bits |= 1;
drivers/media/rc/ir-sony-decoder.c
119
device = bitrev8((data->bits << 3) & 0xF8);
drivers/media/rc/ir-sony-decoder.c
121
function = bitrev8((data->bits >> 4) & 0xFE);
drivers/media/rc/ir-sony-decoder.c
128
device = bitrev8((data->bits >> 0) & 0xFF);
drivers/media/rc/ir-sony-decoder.c
130
function = bitrev8((data->bits >> 7) & 0xFE);
drivers/media/rc/ir-sony-decoder.c
137
device = bitrev8((data->bits >> 5) & 0xF8);
drivers/media/rc/ir-sony-decoder.c
138
subdevice = bitrev8((data->bits >> 0) & 0xFF);
drivers/media/rc/ir-sony-decoder.c
139
function = bitrev8((data->bits >> 12) & 0xFE);
drivers/media/rc/ir-sony-decoder.c
80
data->bits <<= 1;
drivers/media/rc/ir-sony-decoder.c
82
data->bits |= 1;
drivers/media/rc/ir-spi.c
113
int bits = (duty_cycle * 15) / 100;
drivers/media/rc/ir-spi.c
115
idata->pulse = GENMASK(bits, 0);
drivers/media/rc/ite-cir.h
126
#define ITE_BITS_TO_US(bits, sample_period) \
drivers/media/rc/ite-cir.h
127
((u32)((bits) * ITE_BAUDRATE_DIVISOR * (sample_period) / 1000))
drivers/media/rc/rc-core-priv.h
104
u16 bits;
drivers/media/rc/rc-core-priv.h
115
u64 bits;
drivers/media/rc/rc-core-priv.h
122
u32 bits;
drivers/media/rc/rc-core-priv.h
150
unsigned int bits;
drivers/media/rc/rc-core-priv.h
158
u32 bits;
drivers/media/rc/rc-core-priv.h
71
u32 bits;
drivers/media/rc/rc-core-priv.h
79
u32 bits;
drivers/media/rc/rc-core-priv.h
97
u32 bits;
drivers/media/rc/winbond-cir.c
231
wbcir_set_bits(unsigned long addr, u8 bits, u8 mask)
drivers/media/rc/winbond-cir.c
236
val = ((val & ~mask) | (bits & mask));
drivers/media/test-drivers/visl/visl-trace-av1.h
149
__entry->f.cdef.bits,
drivers/media/test-drivers/visl/visl-trace-vp9.h
245
__entry->p.bits,
drivers/media/test-drivers/visl/visl-trace-vp9.h
246
sizeof(__entry->p.bits),
drivers/media/usb/dvb-usb/af9005-fe.c
229
u32 super_frame_count, x, bits;
drivers/media/usb/dvb-usb/af9005-fe.c
302
bits = 2;
drivers/media/usb/dvb-usb/af9005-fe.c
305
bits = 4;
drivers/media/usb/dvb-usb/af9005-fe.c
308
bits = 6;
drivers/media/usb/dvb-usb/af9005-fe.c
314
*pre_bit_count = super_frame_count * 68 * 4 * x * bits;
drivers/media/usb/em28xx/em28xx-i2c.c
605
static inline unsigned long em28xx_hash_mem(char *buf, int length, int bits)
drivers/media/usb/em28xx/em28xx-i2c.c
625
return (hash >> (32 - bits)) & 0xffffffffUL;
drivers/media/usb/gspca/se401.c
475
int i, plen, bits, pixels, info, count;
drivers/media/usb/gspca/se401.c
499
bits = sd->packet[3] + (sd->packet[2] << 8);
drivers/media/usb/gspca/se401.c
502
plen = ((bits + 47) >> 4) << 1;
drivers/media/usb/uvc/uvc_ctrl.c
1237
int bits = mapping->size;
drivers/media/usb/uvc/uvc_ctrl.c
1248
mask = ((1LL << bits) - 1) << offset;
drivers/media/usb/uvc/uvc_ctrl.c
1253
bits -= 8 - max(offset, 0);
drivers/media/usb/uvc/uvc_ctrl.c
1254
if (bits <= 0)
drivers/media/usb/uvc/uvc_ctrl.c
1258
mask = (1 << bits) - 1;
drivers/media/usb/uvc/uvc_ctrl.c
1292
int bits = mapping->size;
drivers/media/usb/uvc/uvc_ctrl.c
1322
for (; bits > 0; data++) {
drivers/media/usb/uvc/uvc_ctrl.c
1323
mask = ((1LL << bits) - 1) << offset;
drivers/media/usb/uvc/uvc_ctrl.c
1326
bits -= 8 - offset;
drivers/media/v4l2-core/v4l2-ctrls-core.c
736
cdef->bits > GENMASK(1, 0))
drivers/media/v4l2-core/v4l2-ctrls-core.c
739
for (i = 0; i < 1 << cdef->bits; i++) {
drivers/media/v4l2-core/v4l2-vp9.c
1083
.bits = {
drivers/media/v4l2-core/v4l2-vp9.c
1383
p = probs->mv.bits[i];
drivers/media/v4l2-core/v4l2-vp9.c
1384
d = deltas->mv.bits[i];
drivers/media/v4l2-core/v4l2-vp9.c
1385
for (j = 0; j < ARRAY_SIZE(probs->mv.bits[0]); j++)
drivers/media/v4l2-core/v4l2-vp9.c
1816
for (j = 0; j < ARRAY_SIZE(probs->mv.bits[0]); j++)
drivers/media/v4l2-core/v4l2-vp9.c
1817
probs->mv.bits[i][j] = adapt_prob(probs->mv.bits[i][j],
drivers/media/v4l2-core/v4l2-vp9.c
1818
(*counts->bits)[i][j]);
drivers/message/fusion/mptctl.c
1297
karg->pciInfo.u.bits.busNumber = pdev->bus->number;
drivers/message/fusion/mptctl.c
1298
karg->pciInfo.u.bits.deviceNumber = PCI_SLOT( pdev->devfn );
drivers/message/fusion/mptctl.c
1299
karg->pciInfo.u.bits.functionNumber = PCI_FUNC( pdev->devfn );
drivers/message/fusion/mptctl.c
1303
karg->pciInfo.u.bits.busNumber = pdev->bus->number;
drivers/message/fusion/mptctl.c
1304
karg->pciInfo.u.bits.deviceNumber = PCI_SLOT( pdev->devfn );
drivers/message/fusion/mptctl.c
1305
karg->pciInfo.u.bits.functionNumber = PCI_FUNC( pdev->devfn );
drivers/message/fusion/mptctl.h
150
} bits;
drivers/message/fusion/mptctl.h
161
} bits;
drivers/mfd/db8500-prcmu.c
2470
u32 bits;
drivers/mfd/db8500-prcmu.c
2474
bits = (readl(PRCM_ARM_IT1_VAL) & ALL_MBOX_BITS);
drivers/mfd/db8500-prcmu.c
2475
if (unlikely(!bits))
drivers/mfd/db8500-prcmu.c
2479
for (n = 0; bits; n++) {
drivers/mfd/db8500-prcmu.c
2480
if (bits & MBOX_BIT(n)) {
drivers/mfd/db8500-prcmu.c
2481
bits -= MBOX_BIT(n);
drivers/mfd/db8500-prcmu.c
643
u32 bits;
drivers/mfd/db8500-prcmu.c
657
bits = ((source << PRCM_CLKOCR_CLKOSEL0_SHIFT) |
drivers/mfd/db8500-prcmu.c
663
bits = ((source << PRCM_CLKOCR_CLKOSEL1_SHIFT) |
drivers/mfd/db8500-prcmu.c
666
bits &= mask;
drivers/mfd/db8500-prcmu.c
673
if ((val & mask) != bits) {
drivers/mfd/db8500-prcmu.c
678
if ((val & mask & ~div_mask) != bits) {
drivers/mfd/db8500-prcmu.c
684
writel((bits | (val & ~mask)), PRCM_CLKOCR);
drivers/mfd/db8500-prcmu.c
758
u32 bits;
drivers/mfd/db8500-prcmu.c
763
for (i = 0, bits = 0; i < NUM_PRCMU_WAKEUP_INDICES; i++) {
drivers/mfd/db8500-prcmu.c
765
bits |= prcmu_wakeup_bit[i];
drivers/mfd/db8500-prcmu.c
770
mb0_transfer.req.dbb_wakeups = bits;
drivers/mfd/qcom-pm8xxx.c
127
unsigned int bits;
drivers/mfd/qcom-pm8xxx.c
129
ret = pm8xxx_read_block_irq(chip, block, &bits);
drivers/mfd/qcom-pm8xxx.c
134
if (!bits) {
drivers/mfd/qcom-pm8xxx.c
141
if (bits & (1 << i)) {
drivers/mfd/qcom-pm8xxx.c
200
unsigned int bits;
drivers/mfd/qcom-pm8xxx.c
203
PM8821_SSBI_ADDR_IRQ_ROOT(master, block), &bits);
drivers/mfd/qcom-pm8xxx.c
214
if (bits & BIT(i)) {
drivers/mfd/qcom-pm8xxx.c
324
unsigned int bits;
drivers/mfd/qcom-pm8xxx.c
343
rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits);
drivers/mfd/qcom-pm8xxx.c
349
*state = !!(bits & BIT(irq_bit));
drivers/mfd/qcom-pm8xxx.c
453
unsigned int bits;
drivers/mfd/qcom-pm8xxx.c
461
PM8821_SSBI_ADDR_IRQ_RT_STATUS(master, block), &bits);
drivers/mfd/qcom-pm8xxx.c
467
*state = !!(bits & BIT(irq_bit));
drivers/mfd/stmfx.c
207
unsigned long bits;
drivers/mfd/stmfx.c
226
bits = pending;
drivers/mfd/stmfx.c
227
for_each_set_bit(n, &bits, STMFX_REG_IRQ_SRC_MAX)
drivers/mfd/twl4030-irq.c
115
.bits = TWL4030_GPIO_MAX,
drivers/mfd/twl4030-irq.c
139
.bits = 12,
drivers/mfd/twl4030-irq.c
175
.bits = TWL4030_GPIO_MAX,
drivers/mfd/twl4030-irq.c
198
.bits = 7,
drivers/mfd/twl4030-irq.c
233
.bits = 9,
drivers/mfd/twl4030-irq.c
247
.bits = 2,
drivers/mfd/twl4030-irq.c
602
if (irq < sih->bits)
drivers/mfd/twl4030-irq.c
62
u8 bits; /* valid in isr/imr */
drivers/mfd/twl4030-irq.c
643
for (i = 0; i < sih->bits; i++) {
drivers/mfd/twl4030-irq.c
84
.bits = nbits, \
drivers/misc/altera-stapl/altera-comp.c
39
static u32 altera_read_packed(u8 *buffer, u32 bits, u32 *bits_avail,
drivers/misc/altera-stapl/altera-comp.c
46
while (bits > 0) {
drivers/misc/altera-stapl/altera-comp.c
51
if (bits <= *bits_avail) {
drivers/misc/altera-stapl/altera-comp.c
52
result &= (0xffff >> (SHORT_BITS - (bits + shift)));
drivers/misc/altera-stapl/altera-comp.c
53
*bits_avail -= bits;
drivers/misc/altera-stapl/altera-comp.c
54
bits = 0;
drivers/misc/altera-stapl/altera-comp.c
58
bits -= *bits_avail;
drivers/misc/cb710/debug.c
22
static inline int allow_reg_read(unsigned block, unsigned offset, unsigned bits)
drivers/misc/cb710/debug.c
24
unsigned mask = (1 << bits/8) - 1;
drivers/misc/cb710/debug.c
25
offset *= bits/8;
drivers/misc/eeprom/at24.c
326
unsigned int bits;
drivers/misc/eeprom/at24.c
335
bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
drivers/misc/eeprom/at24.c
336
remainder = BIT(bits) - offset;
drivers/misc/eeprom/eeprom_93xx46.c
111
int bits;
drivers/misc/eeprom/eeprom_93xx46.c
125
bits = edev->addrlen + 3;
drivers/misc/eeprom/eeprom_93xx46.c
148
bits += 1;
drivers/misc/eeprom/eeprom_93xx46.c
153
t[0].bits_per_word = bits;
drivers/misc/eeprom/eeprom_93xx46.c
187
int bits, ret;
drivers/misc/eeprom/eeprom_93xx46.c
191
bits = edev->addrlen + 3;
drivers/misc/eeprom/eeprom_93xx46.c
198
bits += 2;
drivers/misc/eeprom/eeprom_93xx46.c
202
str_enable_disable(is_on), cmd_addr, bits);
drivers/misc/eeprom/eeprom_93xx46.c
206
t.bits_per_word = bits;
drivers/misc/eeprom/eeprom_93xx46.c
233
int bits, data_len, ret;
drivers/misc/eeprom/eeprom_93xx46.c
240
bits = edev->addrlen + 3;
drivers/misc/eeprom/eeprom_93xx46.c
256
t[0].bits_per_word = bits;
drivers/misc/eeprom/eeprom_93xx46.c
321
int bits, ret;
drivers/misc/eeprom/eeprom_93xx46.c
325
bits = edev->addrlen + 3;
drivers/misc/eeprom/eeprom_93xx46.c
332
bits += 2;
drivers/misc/eeprom/eeprom_93xx46.c
335
dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
drivers/misc/eeprom/eeprom_93xx46.c
339
t.bits_per_word = bits;
drivers/misc/sgi-gru/grumain.c
153
unsigned long bits = 0;
drivers/misc/sgi-gru/grumain.c
161
__set_bit(i, &bits);
drivers/misc/sgi-gru/grumain.c
165
return bits;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
1003
shift = (cs % 5) * bits;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
1005
brcmnand_rmw_reg(ctrl, reg, (bits - 1) << shift, shift, val);
drivers/mtd/nand/raw/brcmnand/brcmnand.c
980
unsigned int shift = 0, bits;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
988
bits = 7;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
990
bits = 6;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
992
bits = 5;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
994
bits = 4;
drivers/mtd/nand/raw/brcmnand/brcmnand.c
999
shift = (cs % 4) * bits;
drivers/mtd/nand/raw/mpc5121_nfc.c
140
static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
drivers/mtd/nand/raw/mpc5121_nfc.c
142
nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
drivers/mtd/nand/raw/mpc5121_nfc.c
146
static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
drivers/mtd/nand/raw/mpc5121_nfc.c
148
nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
drivers/mtd/nand/raw/nand_base.c
4869
int bits;
drivers/mtd/nand/raw/nand_base.c
4871
bits = cellinfo & NAND_CI_CELLTYPE_MSK;
drivers/mtd/nand/raw/nand_base.c
4872
bits >>= NAND_CI_CELLTYPE_SHIFT;
drivers/mtd/nand/raw/nand_base.c
4873
return bits + 1;
drivers/mtd/nand/raw/nand_bbt.c
1195
u32 bits;
drivers/mtd/nand/raw/nand_bbt.c
1202
bits = bd->options & NAND_BBT_NRBITS_MSK;
drivers/mtd/nand/raw/nand_bbt.c
1206
BUG_ON(!bits);
drivers/mtd/nand/raw/nand_bbt.c
1225
table_size *= bits;
drivers/mtd/nand/raw/nand_bbt.c
173
int bits = td->options & NAND_BBT_NRBITS_MSK;
drivers/mtd/nand/raw/nand_bbt.c
174
uint8_t msk = (uint8_t)((1 << bits) - 1);
drivers/mtd/nand/raw/nand_bbt.c
178
totlen = (num * bits) >> 3;
drivers/mtd/nand/raw/nand_bbt.c
212
for (j = 0; j < 8; j += bits, act++) {
drivers/mtd/nand/raw/nand_bbt.c
752
int bits, page, offs, numblocks, sft, sftmsk;
drivers/mtd/nand/raw/nand_bbt.c
800
bits = td->options & NAND_BBT_NRBITS_MSK;
drivers/mtd/nand/raw/nand_bbt.c
802
switch (bits) {
drivers/mtd/nand/raw/sharpsl.c
63
unsigned char bits = ctrl & 0x07;
drivers/mtd/nand/raw/sharpsl.c
65
bits |= (ctrl & 0x01) << 4;
drivers/mtd/nand/raw/sharpsl.c
67
bits ^= 0x11;
drivers/mtd/nand/raw/sharpsl.c
69
writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
drivers/mtd/nand/raw/technologic-nand-controller.c
63
unsigned char bits = ioread8(data->ctrl) & ~GENMASK(2, 0);
drivers/mtd/nand/raw/technologic-nand-controller.c
65
iowrite8(bits | value, data->ctrl);
drivers/mtd/nand/raw/vf610_nfc.c
184
static inline void vf610_nfc_set(struct vf610_nfc *nfc, uint reg, u32 bits)
drivers/mtd/nand/raw/vf610_nfc.c
186
vf610_nfc_write(nfc, reg, vf610_nfc_read(nfc, reg) | bits);
drivers/mtd/nand/raw/vf610_nfc.c
189
static inline void vf610_nfc_clear(struct vf610_nfc *nfc, uint reg, u32 bits)
drivers/mtd/nand/raw/vf610_nfc.c
191
vf610_nfc_write(nfc, reg, vf610_nfc_read(nfc, reg) & ~bits);
drivers/mtd/tests/torturetest.c
374
int bytes, bits, pages, first;
drivers/mtd/tests/torturetest.c
381
bytes = bits = pages = 0;
drivers/mtd/tests/torturetest.c
384
&bits) >= 0)
drivers/mtd/tests/torturetest.c
388
pages, bytes, bits);
drivers/mtd/tests/torturetest.c
394
bytes = bits = 0;
drivers/mtd/tests/torturetest.c
396
&bits);
drivers/mtd/tests/torturetest.c
406
bytes, bits, first);
drivers/mux/mmio.c
119
int bits;
drivers/mux/mmio.c
150
bits = 1 + field.msb - field.lsb;
drivers/mux/mmio.c
151
mux->states = 1 << bits;
drivers/net/can/c_can/c_can.h
175
struct raminit_bits bits;
drivers/net/can/c_can/c_can_platform.c
105
mask = 1 << raminit->bits.start | 1 << raminit->bits.done;
drivers/net/can/c_can/c_can_platform.c
121
c_can_hw_raminit_wait_syscon(priv, 1 << raminit->bits.start, ctrl);
drivers/net/can/c_can/c_can_platform.c
125
ctrl |= 1 << raminit->bits.start;
drivers/net/can/c_can/c_can_platform.c
127
ctrl |= 1 << raminit->bits.done;
drivers/net/can/c_can/c_can_platform.c
130
ctrl &= ~(1 << raminit->bits.done);
drivers/net/can/c_can/c_can_platform.c
133
ctrl &= ~(1 << raminit->bits.start);
drivers/net/can/c_can/c_can_platform.c
138
ctrl |= 1 << raminit->bits.done;
drivers/net/can/c_can/c_can_platform.c
342
raminit->bits = drvdata->raminit_bits[id];
drivers/net/can/spi/mcp251x.c
516
unsigned long bits = 0;
drivers/net/can/spi/mcp251x.c
523
bits |= FIELD_PREP(MCP251X_GPIO_INPUT_MASK, val);
drivers/net/can/spi/mcp251x.c
528
bits |= FIELD_PREP(MCP251X_GPIO_OUTPUT_MASK, val);
drivers/net/can/spi/mcp251x.c
532
bitsp[0] = bits;
drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
1951
unsigned long *bits)
drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
1956
val = FIELD_PREP(MCP251XFD_REG_IOCON_LAT_MASK, *bits);
drivers/net/dsa/microchip/ksz8.c
39
static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
drivers/net/dsa/microchip/ksz8.c
41
ksz_rmw8(dev, addr, bits, set ? bits : 0);
drivers/net/dsa/microchip/ksz8.c
44
static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
drivers/net/dsa/microchip/ksz8.c
47
ksz_rmw8(dev, dev->dev_ops->get_port_addr(port, offset), bits,
drivers/net/dsa/microchip/ksz8.c
48
set ? bits : 0);
drivers/net/dsa/microchip/ksz9477.c
25
static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
drivers/net/dsa/microchip/ksz9477.c
27
regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);
drivers/net/dsa/microchip/ksz9477.c
30
static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
drivers/net/dsa/microchip/ksz9477.c
34
bits, set ? bits : 0);
drivers/net/dsa/microchip/ksz9477.c
37
static void ksz9477_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool set)
drivers/net/dsa/microchip/ksz9477.c
39
regmap_update_bits(ksz_regmap_32(dev), addr, bits, set ? bits : 0);
drivers/net/dsa/microchip/ksz9477.c
43
u32 bits, bool set)
drivers/net/dsa/microchip/ksz9477.c
46
bits, set ? bits : 0);
drivers/net/dsa/microchip/lan937x_main.c
105
static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
drivers/net/dsa/microchip/lan937x_main.c
107
return regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);
drivers/net/dsa/microchip/lan937x_main.c
111
u8 bits, bool set)
drivers/net/dsa/microchip/lan937x_main.c
114
bits, set ? bits : 0);
drivers/net/dsa/mv88e6xxx/port.c
645
u16 reg, bits;
drivers/net/dsa/mv88e6xxx/port.c
656
bits = MV88E6341_PORT_RESERVED_1A_FORCE_CMODE |
drivers/net/dsa/mv88e6xxx/port.c
659
if ((reg & bits) == bits)
drivers/net/dsa/mv88e6xxx/port.c
662
reg |= bits;
drivers/net/ethernet/3com/3c59x.c
3142
static void mdio_sync(struct vortex_private *vp, int bits)
drivers/net/ethernet/3com/3c59x.c
3145
while (-- bits >= 0) {
drivers/net/ethernet/3com/3c59x.c
758
static void mdio_sync(struct vortex_private *vp, int bits);
drivers/net/ethernet/8390/lib8390.c
881
static inline void make_mc_bits(u8 *bits, struct net_device *dev)
drivers/net/ethernet/8390/lib8390.c
891
bits[crc>>29] |= (1<<((crc>>26)&7));
drivers/net/ethernet/8390/pcnet_cs.c
708
int bits, mask = inb(addr) & MDIO_MASK;
drivers/net/ethernet/8390/pcnet_cs.c
709
for (bits = 0; bits < 32; bits++) {
drivers/net/ethernet/actions/owl-emac.c
51
static void owl_emac_reg_set(struct owl_emac_priv *priv, u32 reg, u32 bits)
drivers/net/ethernet/actions/owl-emac.c
53
owl_emac_reg_update(priv, reg, bits, bits);
drivers/net/ethernet/actions/owl-emac.c
56
static void owl_emac_reg_clear(struct owl_emac_priv *priv, u32 reg, u32 bits)
drivers/net/ethernet/actions/owl-emac.c
58
owl_emac_reg_update(priv, reg, bits, 0);
drivers/net/ethernet/amazon/ena/ena_netdev.c
1659
irq->affinity_hint_mask.bits[0], irq->vector);
drivers/net/ethernet/amazon/ena/ena_netdev.c
1692
i, irq->affinity_hint_mask.bits[0], irq->vector);
drivers/net/ethernet/amd/7990.c
277
unsigned char bits;
drivers/net/ethernet/amd/7990.c
299
!((bits = rd->rmd1_bits) & LE_R1_OWN);
drivers/net/ethernet/amd/7990.c
303
if ((bits & LE_R1_POK) != LE_R1_POK) {
drivers/net/ethernet/amd/7990.c
307
} else if (bits & LE_R1_ERR) {
drivers/net/ethernet/amd/7990.c
311
if (bits & LE_R1_BUF)
drivers/net/ethernet/amd/7990.c
313
if (bits & LE_R1_CRC)
drivers/net/ethernet/amd/7990.c
315
if (bits & LE_R1_OFL)
drivers/net/ethernet/amd/7990.c
317
if (bits & LE_R1_FRA)
drivers/net/ethernet/amd/7990.c
319
if (bits & LE_R1_EOP)
drivers/net/ethernet/amd/a2065.c
247
unsigned char bits;
drivers/net/ethernet/amd/a2065.c
267
!((bits = rd->rmd1_bits) & LE_R1_OWN);
drivers/net/ethernet/amd/a2065.c
271
if ((bits & LE_R1_POK) != LE_R1_POK) {
drivers/net/ethernet/amd/a2065.c
275
} else if (bits & LE_R1_ERR) {
drivers/net/ethernet/amd/a2065.c
279
if (bits & LE_R1_BUF)
drivers/net/ethernet/amd/a2065.c
281
if (bits & LE_R1_CRC)
drivers/net/ethernet/amd/a2065.c
283
if (bits & LE_R1_OFL)
drivers/net/ethernet/amd/a2065.c
285
if (bits & LE_R1_FRA)
drivers/net/ethernet/amd/a2065.c
287
if (bits & LE_R1_EOP)
drivers/net/ethernet/amd/declance.c
561
unsigned short bits;
drivers/net/ethernet/amd/declance.c
585
!((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN);
drivers/net/ethernet/amd/declance.c
590
if ((bits & LE_R1_POK) != LE_R1_POK) {
drivers/net/ethernet/amd/declance.c
593
} else if (bits & LE_R1_ERR) {
drivers/net/ethernet/amd/declance.c
597
if (bits & LE_R1_BUF)
drivers/net/ethernet/amd/declance.c
599
if (bits & LE_R1_CRC)
drivers/net/ethernet/amd/declance.c
601
if (bits & LE_R1_OFL)
drivers/net/ethernet/amd/declance.c
603
if (bits & LE_R1_FRA)
drivers/net/ethernet/amd/declance.c
605
if (bits & LE_R1_EOP)
drivers/net/ethernet/amd/sunlance.c
508
u8 bits;
drivers/net/ethernet/amd/sunlance.c
513
!((bits = rd->rmd1_bits) & LE_R1_OWN);
drivers/net/ethernet/amd/sunlance.c
517
if ((bits & LE_R1_POK) != LE_R1_POK) {
drivers/net/ethernet/amd/sunlance.c
520
} else if (bits & LE_R1_ERR) {
drivers/net/ethernet/amd/sunlance.c
524
if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
drivers/net/ethernet/amd/sunlance.c
525
if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
drivers/net/ethernet/amd/sunlance.c
526
if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
drivers/net/ethernet/amd/sunlance.c
527
if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
drivers/net/ethernet/amd/sunlance.c
528
if (bits & LE_R1_EOP) dev->stats.rx_errors++;
drivers/net/ethernet/amd/sunlance.c
573
u8 bits = td->tmd1_bits;
drivers/net/ethernet/amd/sunlance.c
576
if (bits & LE_T1_OWN)
drivers/net/ethernet/amd/sunlance.c
579
if (bits & LE_T1_ERR) {
drivers/net/ethernet/amd/sunlance.c
614
} else if ((bits & LE_T1_POK) == LE_T1_POK) {
drivers/net/ethernet/amd/sunlance.c
618
td->tmd1_bits = bits & ~(LE_T1_POK);
drivers/net/ethernet/amd/sunlance.c
621
if (bits & LE_T1_EONE)
drivers/net/ethernet/amd/sunlance.c
625
if (bits & LE_T1_EMORE)
drivers/net/ethernet/amd/sunlance.c
677
unsigned char bits;
drivers/net/ethernet/amd/sunlance.c
683
!((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
drivers/net/ethernet/amd/sunlance.c
687
if ((bits & LE_R1_POK) != LE_R1_POK) {
drivers/net/ethernet/amd/sunlance.c
690
} else if (bits & LE_R1_ERR) {
drivers/net/ethernet/amd/sunlance.c
694
if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
drivers/net/ethernet/amd/sunlance.c
695
if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
drivers/net/ethernet/amd/sunlance.c
696
if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
drivers/net/ethernet/amd/sunlance.c
697
if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
drivers/net/ethernet/amd/sunlance.c
698
if (bits & LE_R1_EOP) dev->stats.rx_errors++;
drivers/net/ethernet/amd/sunlance.c
741
u8 bits = sbus_readb(&td->tmd1_bits);
drivers/net/ethernet/amd/sunlance.c
744
if (bits & LE_T1_OWN)
drivers/net/ethernet/amd/sunlance.c
747
if (bits & LE_T1_ERR) {
drivers/net/ethernet/amd/sunlance.c
782
} else if ((bits & LE_T1_POK) == LE_T1_POK) {
drivers/net/ethernet/amd/sunlance.c
786
sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
drivers/net/ethernet/amd/sunlance.c
789
if (bits & LE_T1_EONE)
drivers/net/ethernet/amd/sunlance.c
793
if (bits & LE_T1_EMORE)
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
817
int i, bits;
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
819
bits = get_bitmask_order(VLAN_VID_MASK);
drivers/net/ethernet/amd/xgbe/xgbe-dev.c
820
for (i = 0; i < bits; i++) {
drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c
303
static void xgene_sgmac_rxtx(struct xgene_enet_pdata *p, u32 bits, bool set)
drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c
310
data |= bits;
drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c
312
data &= ~bits;
drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.h
120
#define GET_FLAGS(flags, bits) ((flags) & (bits))
drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.h
121
#define SET_FLAGS(flags, bits) ((flags) |= (bits))
drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.h
122
#define RESET_FLAGS(flags, bits) ((flags) &= ~(bits))
drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
659
u32 bits;
drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
684
reg_val |= mcp_attn_ctl_regs[i].bits;
drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h
686
reg_val &= ~mcp_attn_ctl_regs[i].bits;
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
220
static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits)
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
224
val |= bits;
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
229
static u32 bnx2x_bits_dis(struct bnx2x *bp, u32 reg, u32 bits)
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
233
val &= ~bits;
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
729
u16 bits = BNXT_NVM_CFG_VER_BITS;
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
750
bits *= 3; /* array of 3 version components */
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
756
req->data_len = cpu_to_le16(bits);
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
765
bnxt_copy_from_nvm_data(&ver, data, bits, bytes);
drivers/net/ethernet/broadcom/sb1250-mac.c
353
uint64_t bits;
drivers/net/ethernet/broadcom/sb1250-mac.c
358
bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
drivers/net/ethernet/broadcom/sb1250-mac.c
360
__raw_writeq(bits | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/sb1250-mac.c
363
__raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/sb1250-mac.c
364
__raw_writeq(bits | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/sb1250-mac.c
384
uint64_t bits;
drivers/net/ethernet/broadcom/sb1250-mac.c
390
bits = M_MAC_MDIO_DIR_OUTPUT;
drivers/net/ethernet/broadcom/sb1250-mac.c
391
__raw_writeq(bits | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/sb1250-mac.c
397
bits |= M_MAC_MDIO_OUT;
drivers/net/ethernet/broadcom/sb1250-mac.c
398
else bits &= ~M_MAC_MDIO_OUT;
drivers/net/ethernet/broadcom/sb1250-mac.c
399
__raw_writeq(bits | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/sb1250-mac.c
400
__raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/sb1250-mac.c
401
__raw_writeq(bits | mac_mdio_genc, sbm_mdio);
drivers/net/ethernet/broadcom/tg3.c
78
static inline int _tg3_flag(enum TG3_FLAGS flag, unsigned long *bits)
drivers/net/ethernet/broadcom/tg3.c
80
return test_bit(flag, bits);
drivers/net/ethernet/broadcom/tg3.c
83
static inline void _tg3_flag_set(enum TG3_FLAGS flag, unsigned long *bits)
drivers/net/ethernet/broadcom/tg3.c
85
set_bit(flag, bits);
drivers/net/ethernet/broadcom/tg3.c
88
static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
drivers/net/ethernet/broadcom/tg3.c
90
clear_bit(flag, bits);
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
108
(_bna)->bits.mbox_status_bits = (__HFN_INT_MBOX_LPU0_CT2 | \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
110
(_bna)->bits.mbox_mask_bits = (__HFN_INT_MBOX_LPU0_CT2 | \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
112
(_bna)->bits.error_status_bits = (__HFN_INT_ERR_MASK_CT2); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
113
(_bna)->bits.error_mask_bits = (__HFN_INT_ERR_MASK_CT2); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
114
(_bna)->bits.halt_status_bits = __HFN_INT_CPQ_HALT_CT2; \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
115
(_bna)->bits.halt_mask_bits = __HFN_INT_CPQ_HALT_CT2; \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
139
((_intr_status) & (_bna)->bits.mbox_status_bits)
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
142
((_intr_status) & (_bna)->bits.halt_status_bits)
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
145
((_intr_status) & (_bna)->bits.error_status_bits)
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
175
writel((mask | (bna)->bits.mbox_mask_bits | \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
176
(bna)->bits.error_mask_bits), (bna)->regs.fn_int_mask); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
184
writel((mask & ~((bna)->bits.mbox_mask_bits | \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
185
(bna)->bits.error_mask_bits)), (bna)->regs.fn_int_mask);\
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
193
writel(((_status) & ~(_bna)->bits.mbox_status_bits), \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
88
(_bna)->bits.mbox_status_bits = (__HFN_INT_MBOX_LPU0 | \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
90
(_bna)->bits.mbox_mask_bits = (__HFN_INT_MBOX_LPU0 | \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
92
(_bna)->bits.error_status_bits = (__HFN_INT_ERR_MASK); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
93
(_bna)->bits.error_mask_bits = (__HFN_INT_ERR_MASK); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
94
(_bna)->bits.halt_status_bits = __HFN_INT_LL_HALT; \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
95
(_bna)->bits.halt_mask_bits = __HFN_INT_LL_HALT; \
drivers/net/ethernet/brocade/bna/bna_types.h
921
struct bna_bit_defn bits;
drivers/net/ethernet/cadence/macb.h
1088
#define GEM_STAT_TITLE_BITS(name, title, bits) { \
drivers/net/ethernet/cadence/macb.h
1091
.stat_bits = bits \
drivers/net/ethernet/cavium/thunder/nicvf_queues.c
33
u64 reg, int bit_pos, int bits, int val)
drivers/net/ethernet/cavium/thunder/nicvf_queues.c
39
bit_mask = (1ULL << bits) - 1;
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c
518
unsigned int bits = fls(ppmax);
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c
520
if (bits > PPOD_IDX_MAX_SIZE)
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c
521
bits = PPOD_IDX_MAX_SIZE;
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c
524
ppmax, ppmax, bits, 1 << (bits + PPOD_IDX_SHIFT));
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c
526
return 1 << (bits + PPOD_IDX_SHIFT);
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
296
unsigned int bits = fls(tagmask);
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
299
tformat->free_bits = 32 - 2 - bits;
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
300
tformat->rsvd_bits = bits;
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
302
tformat->idx_bits = bits - 1 - PPOD_IDX_SHIFT;
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
303
tformat->no_ddp_mask = 1 << (bits - 1);
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
306
tformat->idx_clr_mask = (1 << (bits - 1)) - 1;
drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h
307
tformat->rsvd_mask = (1 << bits) - 1;
drivers/net/ethernet/cortina/gemini.c
1268
txq->ring[w].word0.bits.buffer_size,
drivers/net/ethernet/cortina/gemini.c
1296
r = rw.bits.rptr;
drivers/net/ethernet/cortina/gemini.c
1297
w = rw.bits.wptr;
drivers/net/ethernet/cortina/gemini.c
1312
txq->ring[d].word3.bits.eofie = 1;
drivers/net/ethernet/cortina/gemini.c
1406
unsigned int rx_csum = word0.bits.chksum_status;
drivers/net/ethernet/cortina/gemini.c
1407
unsigned int rx_status = word0.bits.status;
drivers/net/ethernet/cortina/gemini.c
1413
if (word0.bits.derr || word0.bits.perr ||
drivers/net/ethernet/cortina/gemini.c
1470
r = rw.bits.rptr;
drivers/net/ethernet/cortina/gemini.c
1471
w = rw.bits.wptr;
drivers/net/ethernet/cortina/gemini.c
1483
frag_len = word0.bits.buffer_size;
drivers/net/ethernet/cortina/gemini.c
1484
frame_len = word1.bits.byte_count;
drivers/net/ethernet/cortina/gemini.c
1802
dma_ctrl.bits.rd_enable = 1;
drivers/net/ethernet/cortina/gemini.c
1803
dma_ctrl.bits.td_enable = 1;
drivers/net/ethernet/cortina/gemini.c
1804
dma_ctrl.bits.loopback = 0;
drivers/net/ethernet/cortina/gemini.c
1805
dma_ctrl.bits.drop_small_ack = 0;
drivers/net/ethernet/cortina/gemini.c
1806
dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN;
drivers/net/ethernet/cortina/gemini.c
1807
dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED;
drivers/net/ethernet/cortina/gemini.c
1808
dma_ctrl.bits.rd_burst_size = HBURST_INCR8;
drivers/net/ethernet/cortina/gemini.c
1809
dma_ctrl.bits.rd_bus = HSIZE_8;
drivers/net/ethernet/cortina/gemini.c
1810
dma_ctrl.bits.td_prot = HPROT_DATA_CACHE;
drivers/net/ethernet/cortina/gemini.c
1811
dma_ctrl.bits.td_burst_size = HBURST_INCR8;
drivers/net/ethernet/cortina/gemini.c
1812
dma_ctrl.bits.td_bus = HSIZE_8;
drivers/net/ethernet/cortina/gemini.c
1823
dma_ctrl.bits.rd_enable = 0;
drivers/net/ethernet/cortina/gemini.c
1824
dma_ctrl.bits.td_enable = 0;
drivers/net/ethernet/cortina/gemini.c
1911
union gmac_rx_fltr filter = { .bits = {
drivers/net/ethernet/cortina/gemini.c
1924
filter.bits.error = 1;
drivers/net/ethernet/cortina/gemini.c
1925
filter.bits.promiscuous = 1;
drivers/net/ethernet/cortina/gemini.c
2161
pparam->rx_pause = config0.bits.rx_fc_en;
drivers/net/ethernet/cortina/gemini.c
2162
pparam->tx_pause = config0.bits.tx_fc_en;
drivers/net/ethernet/cortina/gemini.c
305
status.bits.link = phydev->link;
drivers/net/ethernet/cortina/gemini.c
306
status.bits.duplex = phydev->duplex;
drivers/net/ethernet/cortina/gemini.c
310
status.bits.speed = GMAC_SPEED_1000;
drivers/net/ethernet/cortina/gemini.c
312
status.bits.mii_rmii = GMAC_PHY_RGMII_1000;
drivers/net/ethernet/cortina/gemini.c
317
status.bits.speed = GMAC_SPEED_100;
drivers/net/ethernet/cortina/gemini.c
319
status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
drivers/net/ethernet/cortina/gemini.c
324
status.bits.speed = GMAC_SPEED_10;
drivers/net/ethernet/cortina/gemini.c
326
status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
drivers/net/ethernet/cortina/gemini.c
382
status.bits.mii_rmii = GMAC_PHY_MII;
drivers/net/ethernet/cortina/gemini.c
387
status.bits.mii_rmii = GMAC_PHY_GMII;
drivers/net/ethernet/cortina/gemini.c
395
status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
drivers/net/ethernet/cortina/gemini.c
467
union gmac_config0 config0 = { .bits = {
drivers/net/ethernet/cortina/gemini.c
481
union gmac_ahb_weight ahb_weight = { .bits = {
drivers/net/ethernet/cortina/gemini.c
488
union gmac_tx_wcr0 hw_weigh = { .bits = {
drivers/net/ethernet/cortina/gemini.c
494
union gmac_tx_wcr1 sw_weigh = { .bits = {
drivers/net/ethernet/cortina/gemini.c
502
union gmac_config1 config1 = { .bits = {
drivers/net/ethernet/cortina/gemini.c
506
union gmac_config2 config2 = { .bits = {
drivers/net/ethernet/cortina/gemini.c
510
union gmac_config3 config3 = { .bits = {
drivers/net/ethernet/cortina/gemini.c
516
config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu);
drivers/net/ethernet/cortina/gemini.c
518
config0.bits.reserved = tmp.bits.reserved;
drivers/net/ethernet/cortina/gemini.c
631
word0.bits.buffer_size, DMA_TO_DEVICE);
drivers/net/ethernet/cortina/gemini.c
642
if (!word0.bits.status_tx_ok) {
drivers/net/ethernet/cortina/gemini.c
648
bytes += txd->word1.bits.byte_count;
drivers/net/ethernet/cortina/gemini.c
653
nfrags = word0.bits.desc_count - 1;
drivers/net/ethernet/cortina/gemini.c
771
r = rw.bits.rptr;
drivers/net/ethernet/cortina/gemini.c
772
w = rw.bits.wptr;
drivers/net/ethernet/cortina/gemini.c
884
pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order;
drivers/net/ethernet/cortina/gemini.c
885
epn = (rw.bits.rptr >> fpp_order) - 1;
drivers/net/ethernet/cortina/gemini.c
961
qt.bits.swfq_empty = 32;
drivers/net/ethernet/cortina/gemini.c
964
skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order;
drivers/net/ethernet/cortina/gemini.h
184
} bits;
drivers/net/ethernet/cortina/gemini.h
193
} bits;
drivers/net/ethernet/cortina/gemini.h
329
} bits;
drivers/net/ethernet/cortina/gemini.h
363
} bits;
drivers/net/ethernet/cortina/gemini.h
383
} bits;
drivers/net/ethernet/cortina/gemini.h
407
} bits;
drivers/net/ethernet/cortina/gemini.h
431
} bits;
drivers/net/ethernet/cortina/gemini.h
459
} bits;
drivers/net/ethernet/cortina/gemini.h
498
} bits;
drivers/net/ethernet/cortina/gemini.h
536
} bits;
drivers/net/ethernet/cortina/gemini.h
592
} bits;
drivers/net/ethernet/cortina/gemini.h
636
} bits;
drivers/net/ethernet/cortina/gemini.h
688
} bits;
drivers/net/ethernet/cortina/gemini.h
713
} bits;
drivers/net/ethernet/cortina/gemini.h
775
} bits;
drivers/net/ethernet/cortina/gemini.h
808
} bits;
drivers/net/ethernet/cortina/gemini.h
827
} bits;
drivers/net/ethernet/cortina/gemini.h
841
} bits;
drivers/net/ethernet/cortina/gemini.h
861
} bits;
drivers/net/ethernet/cortina/gemini.h
949
} bits;
drivers/net/ethernet/dec/tulip/winbond-840.c
550
int bits = 32;
drivers/net/ethernet/dec/tulip/winbond-840.c
553
while (--bits >= 0) {
drivers/net/ethernet/dlink/dl2k.h
297
} bits;
drivers/net/ethernet/dlink/sundance.c
750
int bits = 32;
drivers/net/ethernet/dlink/sundance.c
753
while (--bits >= 0) {
drivers/net/ethernet/hisilicon/hns/hnae.h
228
#define setflags(flags, bits) ((flags) |= (bits))
drivers/net/ethernet/hisilicon/hns/hnae.h
229
#define unsetflags(flags, bits) ((flags) &= ~(bits))
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1020
addr[0] = mac_key->high.bits.mac_0;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1021
addr[1] = mac_key->high.bits.mac_1;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1022
addr[2] = mac_key->high.bits.mac_2;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1023
addr[3] = mac_key->high.bits.mac_3;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1024
addr[4] = mac_key->low.bits.mac_4;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1025
addr[5] = mac_key->low.bits.mac_5;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1594
mac_key->high.bits.mac_0 = addr[0];
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1595
mac_key->high.bits.mac_1 = addr[1];
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1596
mac_key->high.bits.mac_2 = addr[2];
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1597
mac_key->high.bits.mac_3 = addr[3];
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1598
mac_key->low.bits.mac_4 = addr[4];
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1599
mac_key->low.bits.mac_5 = addr[5];
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1600
mac_key->low.bits.port_vlan = 0;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1601
dsaf_set_field(mac_key->low.bits.port_vlan, DSAF_TBL_TCAM_KEY_VLAN_M,
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
1603
dsaf_set_field(mac_key->low.bits.port_vlan, DSAF_TBL_TCAM_KEY_PORT_M,
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
2037
soft_mac_entry->tcam_key.low.bits.port_vlan,
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
2053
soft_mac_entry->tcam_key.low.bits.port_vlan,
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
344
} bits;
drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
353
} bits;
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
1740
bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits,
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
2433
bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits,
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
2163
bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits,
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
454
bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits,
drivers/net/ethernet/intel/igb/e1000_mac.c
135
u32 bits;
drivers/net/ethernet/intel/igb/e1000_mac.c
153
bits = rd32(E1000_VLVF(regindex)) & E1000_VLVF_VLANID_MASK;
drivers/net/ethernet/intel/igb/e1000_mac.c
154
if (bits == vlan)
drivers/net/ethernet/intel/igb/e1000_mac.c
156
if (!first_empty_slot && !bits)
drivers/net/ethernet/intel/igb/e1000_mac.c
178
u32 regidx, vfta_delta, vfta, bits;
drivers/net/ethernet/intel/igb/e1000_mac.c
224
bits = rd32(E1000_VLVF(vlvf_index));
drivers/net/ethernet/intel/igb/e1000_mac.c
227
bits |= BIT(E1000_VLVF_POOLSEL_SHIFT + vind);
drivers/net/ethernet/intel/igb/e1000_mac.c
232
bits ^= BIT(E1000_VLVF_POOLSEL_SHIFT + vind);
drivers/net/ethernet/intel/igb/e1000_mac.c
234
if (!(bits & E1000_VLVF_POOLSEL_MASK)) {
drivers/net/ethernet/intel/igb/e1000_mac.c
266
wr32(E1000_VLVF(vlvf_index), bits | vlan | E1000_VLVF_VLANID_ENABLE);
drivers/net/ethernet/intel/igb/igb_main.c
5247
u32 i, vid, word, bits, pf_id;
drivers/net/ethernet/intel/igb/igb_main.c
5279
bits = ~BIT(pf_id);
drivers/net/ethernet/intel/igb/igb_main.c
5280
bits &= rd32(E1000_VLVF(i));
drivers/net/ethernet/intel/igb/igb_main.c
5281
wr32(E1000_VLVF(i), bits);
drivers/net/ethernet/intel/igb/igb_main.c
5289
bits = vid % BITS_PER_LONG;
drivers/net/ethernet/intel/igb/igb_main.c
5291
vfta[i] |= adapter->active_vlans[word] >> bits;
drivers/net/ethernet/intel/igb/igb_main.c
7489
u32 bits, pf_id;
drivers/net/ethernet/intel/igb/igb_main.c
7500
bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
drivers/net/ethernet/intel/igb/igb_main.c
7501
bits &= rd32(E1000_VLVF(idx));
drivers/net/ethernet/intel/igb/igb_main.c
7504
if (!bits) {
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
845
u32 bits;
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
859
bits = IXGBE_READ_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex));
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
860
bits &= (~(0x0F << bitindex));
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
861
bits |= (vind << bitindex);
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
862
IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex), bits);
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
867
bits = IXGBE_READ_REG(hw, IXGBE_VFTA(regindex));
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
870
bits |= BIT(bitindex);
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
873
bits &= ~BIT(bitindex);
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
874
IXGBE_WRITE_REG(hw, IXGBE_VFTA(regindex), bits);
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3088
u32 bits;
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3109
bits = IXGBE_READ_REG(hw, IXGBE_VLVF(regindex));
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3110
if (bits == vlan)
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3112
if (!first_empty_slot && !bits)
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3138
u32 regidx, vfta_delta, vfta, bits;
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3185
bits = IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32));
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3188
bits |= BIT(vind % 32);
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3193
bits ^= BIT(vind % 32);
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3195
if (!bits &&
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
3229
IXGBE_WRITE_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32), bits);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
4894
u32 bits, word;
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
4905
bits = ~BIT(VMDQ_P(0) % 32);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
4906
bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
4909
if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
5058
u32 i, vid, word, bits;
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
5081
bits = ~BIT(VMDQ_P(0) % 32);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
5082
bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
5083
IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
5090
bits = vid % BITS_PER_LONG;
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
5092
vfta[i] |= adapter->active_vlans[word] >> bits;
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
593
u32 bits[2], vlvfb, vid, vfta, vlvf;
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
607
bits[word % 2] = vlvfb;
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
608
bits[~word % 2] = IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1));
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
611
if (bits[(VMDQ_P(0) / 32) ^ 1] ||
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
612
(bits[VMDQ_P(0) / 32] & pool_mask))
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
616
if (bits[0] || bits[1])
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
186
unsigned int bits, unsigned int enable)
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
194
if (bits & BIT(i))
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
241
unsigned int bits, unsigned int mask)
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
249
if (bits & BIT(i))
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
269
unsigned int bits, unsigned int mask)
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
277
if (bits & BIT(i))
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
292
u8 bits;
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
297
bits = (pe->sram[ai_off] >> ai_shift) |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
300
return bits;
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
387
u8 bits;
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
394
bits = mvpp2_prs_sram_ai_get(&pe);
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
397
if ((bits & MVPP2_PRS_FLOW_ID_MASK) == flow)
drivers/net/ethernet/mellanox/mlx4/alloc.c
649
pgdir->bits[0] = pgdir->order0;
drivers/net/ethernet/mellanox/mlx4/alloc.c
650
pgdir->bits[1] = pgdir->order1;
drivers/net/ethernet/mellanox/mlx4/alloc.c
668
i = find_first_bit(pgdir->bits[o], MLX4_DB_PER_PAGE >> o);
drivers/net/ethernet/mellanox/mlx4/alloc.c
676
clear_bit(i, pgdir->bits[o]);
drivers/net/ethernet/mellanox/mlx4/alloc.c
681
set_bit(i ^ 1, pgdir->bits[order]);
drivers/net/ethernet/mellanox/mlx4/alloc.c
738
set_bit(i, db->u.pgdir->bits[o]);
drivers/net/ethernet/mellanox/mlx4/mlx4.h
254
unsigned long **bits;
drivers/net/ethernet/mellanox/mlx4/mr.c
109
buddy->bits = kcalloc(buddy->max_order + 1, sizeof(*buddy->bits),
drivers/net/ethernet/mellanox/mlx4/mr.c
113
if (!buddy->bits || !buddy->num_free)
drivers/net/ethernet/mellanox/mlx4/mr.c
118
buddy->bits[i] = kvmalloc_array(s, sizeof(long), GFP_KERNEL | __GFP_ZERO);
drivers/net/ethernet/mellanox/mlx4/mr.c
119
if (!buddy->bits[i])
drivers/net/ethernet/mellanox/mlx4/mr.c
123
set_bit(0, buddy->bits[buddy->max_order]);
drivers/net/ethernet/mellanox/mlx4/mr.c
130
kvfree(buddy->bits[i]);
drivers/net/ethernet/mellanox/mlx4/mr.c
133
kfree(buddy->bits);
drivers/net/ethernet/mellanox/mlx4/mr.c
144
kvfree(buddy->bits[i]);
drivers/net/ethernet/mellanox/mlx4/mr.c
146
kfree(buddy->bits);
drivers/net/ethernet/mellanox/mlx4/mr.c
57
seg = find_first_bit(buddy->bits[o], m);
drivers/net/ethernet/mellanox/mlx4/mr.c
66
clear_bit(seg, buddy->bits[o]);
drivers/net/ethernet/mellanox/mlx4/mr.c
72
set_bit(seg ^ 1, buddy->bits[o]);
drivers/net/ethernet/mellanox/mlx4/mr.c
89
while (test_bit(seg ^ 1, buddy->bits[order])) {
drivers/net/ethernet/mellanox/mlx4/mr.c
90
clear_bit(seg ^ 1, buddy->bits[order]);
drivers/net/ethernet/mellanox/mlx4/mr.c
96
set_bit(seg, buddy->bits[order]);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c
677
u16 bits = 0;
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c
681
bits++;
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c
684
return bits;
drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c
76
elinst->item.size.bits !=
drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c
77
elinfo->item.size.bits))
drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h
63
.size = {.bits = _size}, \
drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h
96
.size = {.bits = _size}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
121
tmp &= GENMASK(item->size.bits - 1, 0);
drivers/net/ethernet/mellanox/mlxsw/item.h
133
u32 mask = GENMASK(item->size.bits - 1, 0) << item->shift;
drivers/net/ethernet/mellanox/mlxsw/item.h
155
tmp &= GENMASK_ULL(item->size.bits - 1, 0);
drivers/net/ethernet/mellanox/mlxsw/item.h
166
u64 mask = GENMASK_ULL(item->size.bits - 1, 0) << item->shift;
drivers/net/ethernet/mellanox/mlxsw/item.h
19
unsigned char bits;
drivers/net/ethernet/mellanox/mlxsw/item.h
274
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
296
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
317
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
339
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
360
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
381
.size = {.bits = LOCAL_PORT_LSB_SIZE,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
387
.size = {.bits = LOCAL_PORT_MSB_SIZE,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
418
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
439
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
461
.size = {.bits = _sizebits,}, \
drivers/net/ethernet/mellanox/mlxsw/item.h
53
tmp &= GENMASK(item->size.bits - 1, 0);
drivers/net/ethernet/mellanox/mlxsw/item.h
65
u8 mask = GENMASK(item->size.bits - 1, 0) << item->shift;
drivers/net/ethernet/mellanox/mlxsw/item.h
87
tmp &= GENMASK(item->size.bits - 1, 0);
drivers/net/ethernet/mellanox/mlxsw/item.h
99
u16 mask = GENMASK(item->size.bits - 1, 0) << item->shift;
drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c
268
.size = {.bits = MLXSW_SP2_AFK_BITS_PER_BLOCK}, \
drivers/net/ethernet/micrel/ks8842.c
191
u16 bits, int offset)
drivers/net/ethernet/micrel/ks8842.c
196
reg |= bits;
drivers/net/ethernet/micrel/ks8842.c
201
u16 bits, int offset)
drivers/net/ethernet/micrel/ks8842.c
206
reg &= ~bits;
drivers/net/ethernet/micrel/ksz884x.c
1858
static void port_cfg(struct ksz_hw *hw, int port, int offset, u16 bits,
drivers/net/ethernet/micrel/ksz884x.c
1868
data |= bits;
drivers/net/ethernet/micrel/ksz884x.c
1870
data &= ~bits;
drivers/net/ethernet/micrel/ksz884x.c
1939
static int sw_chk(struct ksz_hw *hw, u32 addr, u16 bits)
drivers/net/ethernet/micrel/ksz884x.c
1944
return (data & bits) == bits;
drivers/net/ethernet/micrel/ksz884x.c
1956
static void sw_cfg(struct ksz_hw *hw, u32 addr, u16 bits, int set)
drivers/net/ethernet/micrel/ksz884x.c
1962
data |= bits;
drivers/net/ethernet/micrel/ksz884x.c
1964
data &= ~bits;
drivers/net/ethernet/micrel/ksz884x.c
3187
int bits;
drivers/net/ethernet/micrel/ksz884x.c
3204
bits = len = from = to = 0;
drivers/net/ethernet/micrel/ksz884x.c
3206
if (bits) {
drivers/net/ethernet/micrel/ksz884x.c
3211
--bits;
drivers/net/ethernet/micrel/ksz884x.c
3218
bits = 8;
drivers/net/ethernet/micrel/ksz884x.c
3224
bits = mask[len - 1];
drivers/net/ethernet/micrel/ksz884x.c
3226
bits &= ~val;
drivers/net/ethernet/micrel/ksz884x.c
3227
writeb(bits, hw->io + KS8841_WOL_FRAME_BYTE0_OFFSET + i + len -
drivers/net/ethernet/natsemi/sonic.c
160
u16 bits;
drivers/net/ethernet/natsemi/sonic.c
163
bits = SONIC_READ(SONIC_CMD) & mask;
drivers/net/ethernet/natsemi/sonic.c
164
if (!bits)
drivers/net/ethernet/natsemi/sonic.c
171
WARN_ONCE(1, "command deadline expired! 0x%04x\n", bits);
drivers/net/ethernet/qlogic/qed/qed_int.c
1049
struct aeu_invert_reg_bit *p_bit = &p_aeu->bits[j];
drivers/net/ethernet/qlogic/qed/qed_int.c
1069
u32 bits;
drivers/net/ethernet/qlogic/qed/qed_int.c
1076
bits = aeu_inv_arr[i] & en;
drivers/net/ethernet/qlogic/qed/qed_int.c
1079
if (!bits)
drivers/net/ethernet/qlogic/qed/qed_int.c
1090
p_aeu = &sb_attn_sw->p_aeu_desc[i].bits[j];
drivers/net/ethernet/qlogic/qed/qed_int.c
1101
bitmask = bits & (((1 << bit_len) - 1) << bit);
drivers/net/ethernet/qlogic/qed/qed_int.c
1388
p_aeu = &aeu_descs[i].bits[j];
drivers/net/ethernet/qlogic/qed/qed_int.c
83
struct aeu_invert_reg_bit bits[32];
drivers/net/ethernet/realtek/r8169_main.c
1645
static void rtl_ack_events(struct rtl8169_private *tp, u32 bits)
drivers/net/ethernet/realtek/r8169_main.c
1648
RTL_W32(tp, IntrStatus_8125, bits);
drivers/net/ethernet/realtek/r8169_main.c
1650
RTL_W16(tp, IntrStatus, bits);
drivers/net/ethernet/realtek/r8169_main.c
2964
u16 bits;
drivers/net/ethernet/realtek/r8169_main.c
2973
w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits;
drivers/net/ethernet/realtek/r8169_main.c
853
u8 bits, bool cond)
drivers/net/ethernet/realtek/r8169_main.c
859
val = old_val | bits;
drivers/net/ethernet/realtek/r8169_main.c
861
val = old_val & ~bits;
drivers/net/ethernet/renesas/rswitch_l2.c
26
u32 bits = learning ? FWPC0_MACSSA | FWPC0_MACHLA | FWPC0_MACHMA : FWPC0_MACDSA;
drivers/net/ethernet/renesas/rswitch_l2.c
27
u32 clear = start ? 0 : bits;
drivers/net/ethernet/renesas/rswitch_l2.c
28
u32 set = start ? bits : 0;
drivers/net/ethernet/sgi/ioc3-eth.c
1141
int bits;
drivers/net/ethernet/sgi/ioc3-eth.c
1147
for (bits = 6; --bits >= 0; ) {
drivers/net/ethernet/smsc/smc91x.c
754
static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
drivers/net/ethernet/smsc/smc91x.c
763
for (mask = 1 << (bits - 1); mask; mask >>= 1) {
drivers/net/ethernet/smsc/smc91x.c
776
static unsigned int smc_mii_in(struct net_device *dev, int bits)
drivers/net/ethernet/smsc/smc91x.c
785
for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
6785
int i, bits;
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
6787
bits = get_bitmask_order(VLAN_VID_MASK);
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
6788
for (i = 0; i < bits; i++) {
drivers/net/ethernet/sun/niu.c
121
u64 bits, int limit, int delay)
drivers/net/ethernet/sun/niu.c
126
if (!(val & bits))
drivers/net/ethernet/sun/niu.c
136
u64 bits, int limit, int delay,
drivers/net/ethernet/sun/niu.c
141
nw64_mac(reg, bits);
drivers/net/ethernet/sun/niu.c
142
err = __niu_wait_bits_clear_mac(np, reg, bits, limit, delay);
drivers/net/ethernet/sun/niu.c
145
(unsigned long long)bits, reg_name,
drivers/net/ethernet/sun/niu.c
156
u64 bits, int limit, int delay)
drivers/net/ethernet/sun/niu.c
161
if (!(val & bits))
drivers/net/ethernet/sun/niu.c
171
u64 bits, int limit, int delay,
drivers/net/ethernet/sun/niu.c
178
val |= bits;
drivers/net/ethernet/sun/niu.c
181
err = __niu_wait_bits_clear_ipp(np, reg, bits, limit, delay);
drivers/net/ethernet/sun/niu.c
184
(unsigned long long)bits, reg_name,
drivers/net/ethernet/sun/niu.c
195
u64 bits, int limit, int delay)
drivers/net/ethernet/sun/niu.c
200
if (!(val & bits))
drivers/net/ethernet/sun/niu.c
215
u64 bits, int limit, int delay,
drivers/net/ethernet/sun/niu.c
220
nw64(reg, bits);
drivers/net/ethernet/sun/niu.c
221
err = __niu_wait_bits_clear(np, reg, bits, limit, delay);
drivers/net/ethernet/sun/niu.c
224
(unsigned long long)bits, reg_name,
drivers/net/ethernet/sun/niu.c
246
unsigned long mask_reg, bits;
drivers/net/ethernet/sun/niu.c
254
bits = LD_IM0_MASK;
drivers/net/ethernet/sun/niu.c
257
bits = LD_IM1_MASK;
drivers/net/ethernet/sun/niu.c
262
val &= ~bits;
drivers/net/ethernet/sun/niu.c
264
val |= bits;
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
199
int i, bits;
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
201
bits = get_bitmask_order(VLAN_VID_MASK);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
202
for (i = 0; i < bits; i++) {
drivers/net/ethernet/ti/cpsw_ale.c
1007
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1015
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1023
.bits = 2,
drivers/net/ethernet/ti/cpsw_ale.c
1031
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1039
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1047
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1055
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1063
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1071
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1079
.bits = 8,
drivers/net/ethernet/ti/cpsw_ale.c
1087
.bits = 8,
drivers/net/ethernet/ti/cpsw_ale.c
1095
.bits = 6,
drivers/net/ethernet/ti/cpsw_ale.c
1103
.bits = 6,
drivers/net/ethernet/ti/cpsw_ale.c
1111
.bits = 6,
drivers/net/ethernet/ti/cpsw_ale.c
1119
.bits = 6,
drivers/net/ethernet/ti/cpsw_ale.c
1127
.bits = 6,
drivers/net/ethernet/ti/cpsw_ale.c
1135
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
1156
mask = BITMASK(info->bits);
drivers/net/ethernet/ti/cpsw_ale.c
1191
return tmp & BITMASK(info->bits);
drivers/net/ethernet/ti/cpsw_ale.c
123
static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
drivers/net/ethernet/ti/cpsw_ale.c
129
idx2 = (start + bits - 1) / 32;
drivers/net/ethernet/ti/cpsw_ale.c
137
return (hi_val + (ale_entry[idx] >> start)) & BITMASK(bits);
drivers/net/ethernet/ti/cpsw_ale.c
140
static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,
drivers/net/ethernet/ti/cpsw_ale.c
145
value &= BITMASK(bits);
drivers/net/ethernet/ti/cpsw_ale.c
147
idx2 = (start + bits - 1) / 32;
drivers/net/ethernet/ti/cpsw_ale.c
151
ale_entry[index] &= ~(BITMASK(bits + start - (idx2 * 32)));
drivers/net/ethernet/ti/cpsw_ale.c
156
ale_entry[idx] &= ~(BITMASK(bits) << start);
drivers/net/ethernet/ti/cpsw_ale.c
160
#define DEFINE_ALE_FIELD_GET(name, start, bits) \
drivers/net/ethernet/ti/cpsw_ale.c
1614
ale_controls[ALE_PORT_UNKNOWN_VLAN_MEMBER].bits =
drivers/net/ethernet/ti/cpsw_ale.c
1618
ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].bits =
drivers/net/ethernet/ti/cpsw_ale.c
1623
ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].bits =
drivers/net/ethernet/ti/cpsw_ale.c
1628
ale_controls[ALE_PORT_UNTAGGED_EGRESS].bits =
drivers/net/ethernet/ti/cpsw_ale.c
163
return cpsw_ale_get_field(ale_entry, start, bits); \
drivers/net/ethernet/ti/cpsw_ale.c
166
#define DEFINE_ALE_FIELD_SET(name, start, bits) \
drivers/net/ethernet/ti/cpsw_ale.c
169
cpsw_ale_set_field(ale_entry, start, bits, value); \
drivers/net/ethernet/ti/cpsw_ale.c
172
#define DEFINE_ALE_FIELD(name, start, bits) \
drivers/net/ethernet/ti/cpsw_ale.c
173
DEFINE_ALE_FIELD_GET(name, start, bits) \
drivers/net/ethernet/ti/cpsw_ale.c
174
DEFINE_ALE_FIELD_SET(name, start, bits)
drivers/net/ethernet/ti/cpsw_ale.c
177
static inline int cpsw_ale_get_##name(u32 *ale_entry, u32 bits) \
drivers/net/ethernet/ti/cpsw_ale.c
179
return cpsw_ale_get_field(ale_entry, start, bits); \
drivers/net/ethernet/ti/cpsw_ale.c
184
u32 bits) \
drivers/net/ethernet/ti/cpsw_ale.c
186
cpsw_ale_set_field(ale_entry, start, bits, value); \
drivers/net/ethernet/ti/cpsw_ale.c
207
#define ALE_ENTRY_FLD(id, start, bits) \
drivers/net/ethernet/ti/cpsw_ale.c
210
.num_bits = bits, \
drivers/net/ethernet/ti/cpsw_ale.c
24
#define BITMASK(bits) (BIT(bits) - 1)
drivers/net/ethernet/ti/cpsw_ale.c
265
u32 bits;
drivers/net/ethernet/ti/cpsw_ale.c
276
bits = entry_fld->num_bits;
drivers/net/ethernet/ti/cpsw_ale.c
278
bits = ale->port_mask_bits;
drivers/net/ethernet/ti/cpsw_ale.c
280
return cpsw_ale_get_field(ale_entry, entry_fld->start_bit, bits);
drivers/net/ethernet/ti/cpsw_ale.c
290
u32 bits;
drivers/net/ethernet/ti/cpsw_ale.c
301
bits = entry_fld->num_bits;
drivers/net/ethernet/ti/cpsw_ale.c
303
bits = ale->port_mask_bits;
drivers/net/ethernet/ti/cpsw_ale.c
305
cpsw_ale_set_field(ale_entry, entry_fld->start_bit, bits, value);
drivers/net/ethernet/ti/cpsw_ale.c
917
int bits;
drivers/net/ethernet/ti/cpsw_ale.c
927
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
935
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
943
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
951
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
959
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
967
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
975
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
983
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
991
.bits = 1,
drivers/net/ethernet/ti/cpsw_ale.c
999
.bits = 1,
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1612
u32 vlnctrl, i, vind, bits, reg_idx;
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1634
bits = rd32(wx, WX_PSR_VLAN_SWC_VM(reg_idx));
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1635
bits |= BIT(vind);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1636
wr32(wx, WX_PSR_VLAN_SWC_VM(reg_idx), bits);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1645
u32 i, vid, bits, vfta, vind, vlvf, reg_idx;
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1660
bits = rd32(wx, WX_PSR_VLAN_SWC_VM(reg_idx));
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1661
bits &= ~BIT(vind);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
1662
wr32(wx, WX_PSR_VLAN_SWC_VM(reg_idx), bits);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2540
u32 bits = 0, first_empty_slot = 0;
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2552
bits = rd32(wx, WX_PSR_VLAN_SWC);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2553
if (!bits && !(first_empty_slot))
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2555
else if ((bits & 0x0FFF) == vlan)
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2584
u32 vt, bits;
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2605
bits = rd32(wx, WX_PSR_VLAN_SWC_VM_L);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2606
bits |= (1 << vind);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2607
wr32(wx, WX_PSR_VLAN_SWC_VM_L, bits);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2609
bits = rd32(wx, WX_PSR_VLAN_SWC_VM_H);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2610
bits |= (1 << (vind - 32));
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2611
wr32(wx, WX_PSR_VLAN_SWC_VM_H, bits);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2616
bits = rd32(wx, WX_PSR_VLAN_SWC_VM_L);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2617
bits &= ~(1 << vind);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2618
wr32(wx, WX_PSR_VLAN_SWC_VM_L, bits);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2619
bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_H);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2621
bits = rd32(wx, WX_PSR_VLAN_SWC_VM_H);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2622
bits &= ~(1 << (vind - 32));
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2623
wr32(wx, WX_PSR_VLAN_SWC_VM_H, bits);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2624
bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_L);
drivers/net/ethernet/wangxun/libwx/wx_hw.c
2628
if (bits) {
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
606
u32 bits = 0, vlvf;
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
618
bits = rd32(wx, WX_PSR_VLAN_SWC_VM_L);
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
619
bits &= ~BIT(VMDQ_P(0));
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
621
bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_H);
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
624
bits = rd32(wx, WX_PSR_VLAN_SWC_VM_H);
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
625
bits &= ~BIT(VMDQ_P(0) % 32);
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
626
bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_L);
drivers/net/ethernet/wangxun/libwx/wx_sriov.c
632
if ((vlvf & VLAN_VID_MASK) == vid && !bits)
drivers/net/fjes/fjes_hw.c
407
cr.bits.req_start = 1;
drivers/net/fjes/fjes_hw.c
408
cr.bits.req_code = type;
drivers/net/fjes/fjes_hw.c
412
if (cr.bits.error == 0) {
drivers/net/fjes/fjes_hw.c
416
while ((cs.bits.complete != 1) && timeout > 0) {
drivers/net/fjes/fjes_hw.c
422
if (cs.bits.complete == 1)
drivers/net/fjes/fjes_hw.c
428
switch (cr.bits.err_info) {
drivers/net/fjes/fjes_hw.c
60
dctl.bits.reset = 1;
drivers/net/fjes/fjes_hw.c
65
while ((dctl.bits.reset == 1) && (timeout > 0)) {
drivers/net/fjes/fjes_hw.c
80
return info.bits.maxep;
drivers/net/fjes/fjes_hw.c
89
return info.bits.epid;
drivers/net/fjes/fjes_regs.h
49
} bits;
drivers/net/fjes/fjes_regs.h
57
} bits;
drivers/net/fjes/fjes_regs.h
67
} bits;
drivers/net/fjes/fjes_regs.h
78
} bits;
drivers/net/fjes/fjes_regs.h
88
} bits;
drivers/net/fjes/fjes_regs.h
97
} bits;
drivers/net/fjes/fjes_trace.h
34
__entry->cr_req = cr->bits.req_code;
drivers/net/fjes/fjes_trace.h
35
__entry->cr_error = cr->bits.error;
drivers/net/fjes/fjes_trace.h
36
__entry->cr_err_info = cr->bits.err_info;
drivers/net/fjes/fjes_trace.h
37
__entry->cr_req_start = cr->bits.req_start;
drivers/net/fjes/fjes_trace.h
38
__entry->cs_req = cs->bits.req_code;
drivers/net/fjes/fjes_trace.h
39
__entry->cs_busy = cs->bits.busy;
drivers/net/fjes/fjes_trace.h
40
__entry->cs_complete = cs->bits.complete;
drivers/net/mdio/mdio-bitbang.c
69
static void mdiobb_send_num(struct mdiobb_ctrl *ctrl, u16 val, int bits)
drivers/net/mdio/mdio-bitbang.c
73
for (i = bits - 1; i >= 0; i--)
drivers/net/mdio/mdio-bitbang.c
78
static u16 mdiobb_get_num(struct mdiobb_ctrl *ctrl, int bits)
drivers/net/mdio/mdio-bitbang.c
83
for (i = bits - 1; i >= 0; i--) {
drivers/net/mdio/mdio-mscc-miim.c
177
unsigned int offset, bits;
drivers/net/mdio/mdio-mscc-miim.c
184
bits = miim->info->phy_reset_bits;
drivers/net/mdio/mdio-mscc-miim.c
186
ret = regmap_update_bits(miim->phy_regs, offset, bits, 0);
drivers/net/mdio/mdio-mscc-miim.c
192
ret = regmap_update_bits(miim->phy_regs, offset, bits, bits);
drivers/net/phy/bcm-phy-lib.c
502
u8 bits;
drivers/net/phy/bcm-phy-lib.c
548
val = val & ((1 << stat.bits) - 1);
drivers/net/phy/marvell.c
2124
val = val & ((1 << stat.bits) - 1);
drivers/net/phy/marvell.c
2143
val = val & ((1 << stat.bits) - 1);
drivers/net/phy/marvell.c
315
u8 bits;
drivers/net/phy/marvell.c
332
u8 bits;
drivers/net/phy/micrel.c
2229
val = val & ((1 << stat.bits) - 1);
drivers/net/phy/micrel.c
392
u8 bits;
drivers/net/phy/microchip_t1.c
1524
val = val & ((1 << stat.bits) - 1);
drivers/net/phy/microchip_t1.c
310
u8 bits;
drivers/net/phy/phy-c45.c
1733
u8 bits;
drivers/net/phy/phy-c45.c
1744
bits = FIELD_GET(OATC14_ADFCAP_SQIPLUS_CAPABILITY, ret);
drivers/net/phy/phy-c45.c
1745
if (bits) {
drivers/net/phy/phy-c45.c
1746
phydev->oatc14_sqi_capability.sqiplus_bits = bits;
drivers/net/phy/phy-c45.c
1748
phydev->oatc14_sqi_capability.sqi_max = BIT(bits) - 1;
drivers/net/phy/smsc.c
382
u16 bits;
drivers/net/phy/smsc.c
395
bits = *mask;
drivers/net/phy/smsc.c
400
if (bits)
drivers/net/phy/smsc.c
404
if (bits & 1)
drivers/net/phy/smsc.c
406
bits >>= 1;
drivers/net/phy/smsc.c
45
u8 bits;
drivers/net/ppp/bsd_comp.c
354
int bits;
drivers/net/ppp/bsd_comp.c
364
bits = BSD_NBITS(options[2]);
drivers/net/ppp/bsd_comp.c
366
switch (bits)
drivers/net/ppp/bsd_comp.c
397
maxmaxcode = MAXCODE(bits);
drivers/net/ppp/bsd_comp.c
443
db->maxbits = bits;
drivers/net/ppp/ppp_generic.c
1967
int i, bits, hdrlen, mtu;
drivers/net/ppp/ppp_generic.c
2042
bits = B;
drivers/net/ppp/ppp_generic.c
2122
bits |= E;
drivers/net/ppp/ppp_generic.c
2131
q[2] = bits + ((ppp->nxseq >> 8) & 0xf);
drivers/net/ppp/ppp_generic.c
2134
q[2] = bits;
drivers/net/ppp/ppp_generic.c
2151
bits = 0;
drivers/net/ppp/ppp_mppe.c
242
state->bits = MPPE_BIT_ENCRYPTED;
drivers/net/ppp/ppp_mppe.c
271
state->bits |= MPPE_BIT_FLUSHED;
drivers/net/ppp/ppp_mppe.c
320
(state->bits & MPPE_BIT_FLUSHED)) { /* CCP Reset-Request */
drivers/net/ppp/ppp_mppe.c
326
state->bits |= MPPE_BIT_FLUSHED;
drivers/net/ppp/ppp_mppe.c
328
obuf[0] |= state->bits;
drivers/net/ppp/ppp_mppe.c
329
state->bits &= ~MPPE_BIT_FLUSHED; /* reset for next xmit */
drivers/net/ppp/ppp_mppe.c
84
unsigned char bits; /* MPPE control bits */
drivers/net/slip/slip.c
1011
short bits = 0;
drivers/net/slip/slip.c
1027
bits += 8;
drivers/net/slip/slip.c
1028
while (bits >= 6) {
drivers/net/slip/slip.c
1029
bits -= 6;
drivers/net/slip/slip.c
1030
c = 0x30 + ((v >> bits) & 0x3F);
drivers/net/slip/slip.c
1034
if (bits) {
drivers/net/slip/slip.c
1035
c = 0x30 + ((v << (6 - bits)) & 0x3F);
drivers/net/wan/farsync.c
1011
FST_WRB(card, txDescrRing[pi][i].bits, 0);
drivers/net/wan/farsync.c
1135
FST_WRB(card, rxDescrRing[pi][rxp].bits, DMA_OWN);
drivers/net/wan/farsync.c
1142
dmabits = FST_RDB(card, rxDescrRing[pi][rxp].bits);
drivers/net/wan/farsync.c
1149
FST_WRB(card, rxDescrRing[pi][rxp].bits, DMA_OWN);
drivers/net/wan/farsync.c
1171
dmabits = FST_RDB(card, rxDescrRing[pi][rxp].bits);
drivers/net/wan/farsync.c
1191
FST_WRB(card, rxDescrRing[pi][rxp].bits, DMA_OWN);
drivers/net/wan/farsync.c
1217
FST_WRB(card, rxDescrRing[pi][rxp].bits, DMA_OWN);
drivers/net/wan/farsync.c
1235
FST_WRB(card, rxDescrRing[pi][rxp].bits, DMA_OWN);
drivers/net/wan/farsync.c
1291
while (!(FST_RDB(card, txDescrRing[pi][port->txpos].bits) &
drivers/net/wan/farsync.c
1332
bits,
drivers/net/wan/farsync.c
1384
while (!(FST_RDB(card, rxDescrRing[pi][port->rxpos].bits)
drivers/net/wan/farsync.c
139
volatile u8 bits; /* Status and config */
drivers/net/wan/farsync.c
150
volatile u8 bits; /* Status and config */
drivers/net/wan/farsync.c
799
FST_WRB(card, txDescrRing[port->index][txpos].bits,
drivers/net/wan/farsync.c
831
FST_WRB(card, rxDescrRing[pi][rxp].bits, DMA_OWN);
drivers/net/wan/farsync.c
985
FST_WRB(card, rxDescrRing[pi][i].bits, DMA_OWN);
drivers/net/wireguard/allowedips.c
103
return common_bits(node, key, bits) >= node->cidr;
drivers/net/wireguard/allowedips.c
106
static struct allowedips_node *find_node(struct allowedips_node *trie, u8 bits,
drivers/net/wireguard/allowedips.c
111
while (node && prefix_matches(node, key, bits)) {
drivers/net/wireguard/allowedips.c
114
if (node->cidr == bits)
drivers/net/wireguard/allowedips.c
122
static struct wg_peer *lookup(struct allowedips_node __rcu *root, u8 bits,
drivers/net/wireguard/allowedips.c
13
static void swap_endian(u8 *dst, const u8 *src, u8 bits)
drivers/net/wireguard/allowedips.c
130
swap_endian(ip, be_ip, bits);
drivers/net/wireguard/allowedips.c
134
node = find_node(rcu_dereference_bh(root), bits, ip);
drivers/net/wireguard/allowedips.c
145
u8 cidr, u8 bits, struct allowedips_node **rnode,
drivers/net/wireguard/allowedips.c
15
if (bits == 32) {
drivers/net/wireguard/allowedips.c
152
while (node && node->cidr <= cidr && prefix_matches(node, key, bits)) {
drivers/net/wireguard/allowedips.c
17
} else if (bits == 128) {
drivers/net/wireguard/allowedips.c
172
u8 bit = choose(parent, node->bits);
drivers/net/wireguard/allowedips.c
176
static int add(struct allowedips_node __rcu **trie, u8 bits, const u8 *key,
drivers/net/wireguard/allowedips.c
181
if (unlikely(cidr > bits || !peer))
drivers/net/wireguard/allowedips.c
190
copy_and_assign_cidr(node, key, cidr, bits);
drivers/net/wireguard/allowedips.c
194
if (node_placement(*trie, key, cidr, bits, &node, lock)) {
drivers/net/wireguard/allowedips.c
205
copy_and_assign_cidr(newnode, key, cidr, bits);
drivers/net/wireguard/allowedips.c
217
cidr = min(cidr, common_bits(down, key, bits));
drivers/net/wireguard/allowedips.c
236
copy_and_assign_cidr(node, newnode->bits, cidr, bits);
drivers/net/wireguard/allowedips.c
24
u8 cidr, u8 bits)
drivers/net/wireguard/allowedips.c
278
static int remove(struct allowedips_node __rcu **trie, u8 bits, const u8 *key,
drivers/net/wireguard/allowedips.c
283
if (unlikely(cidr > bits))
drivers/net/wireguard/allowedips.c
285
if (!rcu_access_pointer(*trie) || !node_placement(*trie, key, cidr, bits, &node, lock) ||
drivers/net/wireguard/allowedips.c
29
node->bit_at_a ^= (bits / 8U - 1U) % 8U;
drivers/net/wireguard/allowedips.c
32
node->bitlen = bits;
drivers/net/wireguard/allowedips.c
33
memcpy(node->bits, src, bits / 8U);
drivers/net/wireguard/allowedips.c
381
swap_endian(ip, node->bits, node->bitlen);
drivers/net/wireguard/allowedips.c
83
u8 bits)
drivers/net/wireguard/allowedips.c
85
if (bits == 32)
drivers/net/wireguard/allowedips.c
86
return 32U - fls(*(const u32 *)node->bits ^ *(const u32 *)key);
drivers/net/wireguard/allowedips.c
87
else if (bits == 128)
drivers/net/wireguard/allowedips.c
89
*(const u64 *)&node->bits[0] ^ *(const u64 *)&key[0],
drivers/net/wireguard/allowedips.c
90
*(const u64 *)&node->bits[8] ^ *(const u64 *)&key[8]);
drivers/net/wireguard/allowedips.c
95
u8 bits)
drivers/net/wireguard/allowedips.h
19
u8 bits[16] __aligned(__alignof(u64));
drivers/net/wireguard/selftest/allowedips.c
22
static __init void print_node(struct allowedips_node *node, u8 bits)
drivers/net/wireguard/selftest/allowedips.c
32
if (bits == 32) {
drivers/net/wireguard/selftest/allowedips.c
35
} else if (bits == 128) {
drivers/net/wireguard/selftest/allowedips.c
59
print_node(rcu_dereference_raw(node->bit[0]), bits);
drivers/net/wireguard/selftest/allowedips.c
61
print_node(rcu_dereference_raw(node->bit[1]), bits);
drivers/net/wireguard/selftest/allowedips.c
64
static __init void print_tree(struct allowedips_node __rcu *top, u8 bits)
drivers/net/wireguard/selftest/allowedips.c
67
print_node(rcu_dereference_raw(top), bits);
drivers/net/wireless/admtek/adm8211.c
503
#define WRITE_SYN(name,v_mask,v_shift,a_mask,a_shift,bits,prewrite,postwrite)\
drivers/net/wireless/admtek/adm8211.c
524
for (i = 0; i <= bits; i++) { \
drivers/net/wireless/admtek/adm8211.c
525
if (bitbuf & (1 << (bits - i))) \
drivers/net/wireless/ath/ar5523/ar5523.c
440
static int ar5523_set_rxfilter(struct ar5523 *ar, u32 bits, u32 op)
drivers/net/wireless/ath/ar5523/ar5523.c
444
rxfilter.bits = cpu_to_be32(bits);
drivers/net/wireless/ath/ar5523/ar5523.c
447
ar5523_dbg(ar, "setting Rx filter=0x%x flags=0x%x\n", bits, op);
drivers/net/wireless/ath/ar5523/ar5523_hw.h
290
__be32 bits;
drivers/net/wireless/ath/ath10k/htt_rx.c
2498
if (fw_desc->u.bits.discard) {
drivers/net/wireless/ath/ath10k/rx_desc.h
1327
} bits;
drivers/net/wireless/ath/ath5k/ath5k.h
1702
static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits)
drivers/net/wireless/ath/ath5k/ath5k.h
1706
for (i = 0; i < bits; i++) {
drivers/net/wireless/ath/ath5k/pcu.c
118
int bitrate, bits, symbols, symbol_bits;
drivers/net/wireless/ath/ath5k/pcu.c
161
bits = plcp_bits + (len << 3);
drivers/net/wireless/ath/ath5k/pcu.c
164
symbols = DIV_ROUND_UP(bits * 10, symbol_bits);
drivers/net/wireless/ath/ath9k/hw.c
2872
u32 bits = REG_READ(ah, AR_RX_FILTER);
drivers/net/wireless/ath/ath9k/hw.c
2876
bits |= ATH9K_RX_FILTER_PHYRADAR;
drivers/net/wireless/ath/ath9k/hw.c
2878
bits |= ATH9K_RX_FILTER_PHYERR;
drivers/net/wireless/ath/ath9k/hw.c
2880
return bits;
drivers/net/wireless/ath/ath9k/hw.c
2884
void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
drivers/net/wireless/ath/ath9k/hw.c
2890
REG_WRITE(ah, AR_RX_FILTER, bits);
drivers/net/wireless/ath/ath9k/hw.c
2893
if (bits & ATH9K_RX_FILTER_PHYRADAR)
drivers/net/wireless/ath/ath9k/hw.c
2895
if (bits & ATH9K_RX_FILTER_PHYERR)
drivers/net/wireless/ath/ath9k/hw.h
1057
void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits);
drivers/net/wireless/ath/ath9k/xmit.c
1139
int symbols, bits;
drivers/net/wireless/ath/ath9k/xmit.c
1144
bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
drivers/net/wireless/ath/ath9k/xmit.c
1145
bits -= OFDM_PLCP_BITS;
drivers/net/wireless/ath/ath9k/xmit.c
1146
bytes = bits / 8;
drivers/net/wireless/atmel/at76c50x-usb.c
87
#define at76_dbg(bits, format, arg...) \
drivers/net/wireless/atmel/at76c50x-usb.c
89
if (at76_debug & (bits)) \
drivers/net/wireless/atmel/at76c50x-usb.c
93
#define at76_dbg_dump(bits, buf, len, format, arg...) \
drivers/net/wireless/atmel/at76c50x-usb.c
95
if (at76_debug & (bits)) { \
drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h
61
#define SFIELD(val, field, bits) \
drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h
63
((unsigned)(bits) << field ## _S))
drivers/net/wireless/intel/iwlegacy/common.c
27
_il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
drivers/net/wireless/intel/iwlegacy/common.c
33
if ((_il_rd(il, addr) & mask) == (bits & mask))
drivers/net/wireless/intel/iwlegacy/common.h
1973
int _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout);
drivers/net/wireless/intel/iwlegacy/common.h
2086
il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
drivers/net/wireless/intel/iwlegacy/common.h
2092
_il_wr_prph(il, reg, ((_il_rd_prph(il, reg) & mask) | bits));
drivers/net/wireless/intel/iwlwifi/iwl-io.c
156
u32 bits, u32 mask, int timeout)
drivers/net/wireless/intel/iwlwifi/iwl-io.c
161
if ((iwl_read_prph(trans, addr) & mask) == (bits & mask))
drivers/net/wireless/intel/iwlwifi/iwl-io.c
171
u32 bits, u32 mask, int timeout)
drivers/net/wireless/intel/iwlwifi/iwl-io.c
177
(bits & mask))
drivers/net/wireless/intel/iwlwifi/iwl-io.c
198
u32 bits, u32 mask)
drivers/net/wireless/intel/iwlwifi/iwl-io.c
203
mask) | bits);
drivers/net/wireless/intel/iwlwifi/iwl-io.c
50
u32 bits, u32 mask, int timeout)
drivers/net/wireless/intel/iwlwifi/iwl-io.c
55
if ((iwl_read32(trans, addr) & mask) == (bits & mask))
drivers/net/wireless/intel/iwlwifi/iwl-io.h
100
u32 bits, u32 mask, int timeout)
drivers/net/wireless/intel/iwlwifi/iwl-io.h
104
bits, mask, timeout);
drivers/net/wireless/intel/iwlwifi/iwl-io.h
27
u32 bits, u32 mask, int timeout);
drivers/net/wireless/intel/iwlwifi/iwl-io.h
28
static inline int iwl_poll_bits(struct iwl_trans *trans, u32 addr, u32 bits,
drivers/net/wireless/intel/iwlwifi/iwl-io.h
31
return iwl_poll_bits_mask(trans, addr, bits, bits, timeout);
drivers/net/wireless/intel/iwlwifi/iwl-io.h
53
u32 bits, u32 mask, int timeout);
drivers/net/wireless/intel/iwlwifi/iwl-io.h
55
u32 bits, u32 mask, int timeout);
drivers/net/wireless/intel/iwlwifi/iwl-io.h
58
u32 bits, u32 mask);
drivers/net/wireless/intersil/p54/p54spi.c
110
static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
drivers/net/wireless/intersil/p54/p54spi.c
116
if ((buffer & bits) == bits)
drivers/net/wireless/marvell/mwifiex/sdio.c
1262
mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
drivers/net/wireless/marvell/mwifiex/sdio.c
1271
else if ((cs & bits) == bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
748
int rtl8xxxu_write8_set(struct rtl8xxxu_priv *priv, u16 addr, u8 bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
753
val8 |= bits;
drivers/net/wireless/realtek/rtl8xxxu/core.c
757
int rtl8xxxu_write8_clear(struct rtl8xxxu_priv *priv, u16 addr, u8 bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
762
val8 &= ~bits;
drivers/net/wireless/realtek/rtl8xxxu/core.c
766
int rtl8xxxu_write16_set(struct rtl8xxxu_priv *priv, u16 addr, u16 bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
771
val16 |= bits;
drivers/net/wireless/realtek/rtl8xxxu/core.c
775
int rtl8xxxu_write16_clear(struct rtl8xxxu_priv *priv, u16 addr, u16 bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
780
val16 &= ~bits;
drivers/net/wireless/realtek/rtl8xxxu/core.c
784
int rtl8xxxu_write32_set(struct rtl8xxxu_priv *priv, u16 addr, u32 bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
789
val32 |= bits;
drivers/net/wireless/realtek/rtl8xxxu/core.c
793
int rtl8xxxu_write32_clear(struct rtl8xxxu_priv *priv, u16 addr, u32 bits)
drivers/net/wireless/realtek/rtl8xxxu/core.c
798
val32 &= ~bits;
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
2049
int rtl8xxxu_write8_set(struct rtl8xxxu_priv *priv, u16 addr, u8 bits);
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
2050
int rtl8xxxu_write8_clear(struct rtl8xxxu_priv *priv, u16 addr, u8 bits);
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
2051
int rtl8xxxu_write16_set(struct rtl8xxxu_priv *priv, u16 addr, u16 bits);
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
2052
int rtl8xxxu_write16_clear(struct rtl8xxxu_priv *priv, u16 addr, u16 bits);
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
2053
int rtl8xxxu_write32_set(struct rtl8xxxu_priv *priv, u16 addr, u32 bits);
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
2054
int rtl8xxxu_write32_clear(struct rtl8xxxu_priv *priv, u16 addr, u32 bits);
drivers/net/wireless/realtek/rtw89/mac.c
4650
u32 bits = B_AX_TBTT_PROHIB_EN | B_AX_BRK_SETUP;
drivers/net/wireless/realtek/rtw89/mac.c
4653
rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, bits);
drivers/net/wireless/realtek/rtw89/mac.c
4655
rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, bits);
drivers/net/wireless/realtek/rtw89/phy.c
2120
void rtw89_phy_write32_idx_set(struct rtw89_dev *rtwdev, u32 addr, u32 bits,
drivers/net/wireless/realtek/rtw89/phy.c
2125
rtw89_phy_write32_set(rtwdev, addr, bits);
drivers/net/wireless/realtek/rtw89/phy.c
2129
void rtw89_phy_write32_idx_clr(struct rtw89_dev *rtwdev, u32 addr, u32 bits,
drivers/net/wireless/realtek/rtw89/phy.c
2134
rtw89_phy_write32_clr(rtwdev, addr, bits);
drivers/net/wireless/realtek/rtw89/phy.h
1017
void rtw89_phy_write32_idx_set(struct rtw89_dev *rtwdev, u32 addr, u32 bits,
drivers/net/wireless/realtek/rtw89/phy.h
1019
void rtw89_phy_write32_idx_clr(struct rtw89_dev *rtwdev, u32 addr, u32 bits,
drivers/net/wireless/realtek/rtw89/phy.h
752
u32 addr, u32 bits)
drivers/net/wireless/realtek/rtw89/phy.h
756
rtw89_write32_set(rtwdev, addr + phy->cr_base, bits);
drivers/net/wireless/realtek/rtw89/phy.h
760
u32 addr, u32 bits)
drivers/net/wireless/realtek/rtw89/phy.h
764
rtw89_write32_clr(rtwdev, addr + phy->cr_base, bits);
drivers/net/wireless/zydas/zd1211rw/zd_chip.c
1473
const u32* values, unsigned int count, u8 bits)
drivers/net/wireless/zydas/zd1211rw/zd_chip.c
1479
r = zd_rfwrite_locked(chip, values[i], bits);
drivers/net/wireless/zydas/zd1211rw/zd_chip.h
852
static inline int zd_rfwrite_locked(struct zd_chip *chip, u32 value, u8 bits)
drivers/net/wireless/zydas/zd1211rw/zd_chip.h
855
return zd_usb_rfwrite(&chip->usb, value, bits);
drivers/net/wireless/zydas/zd1211rw/zd_chip.h
861
const u32* values, unsigned int count, u8 bits);
drivers/net/wireless/zydas/zd1211rw/zd_mac.c
619
u32 bits = (u32)tx_length * 8;
drivers/net/wireless/zydas/zd1211rw/zd_mac.c
628
bits = (2*bits) + 10; /* round up to the next integer */
drivers/net/wireless/zydas/zd1211rw/zd_mac.c
632
u32 t = bits % 11;
drivers/net/wireless/zydas/zd1211rw/zd_mac.c
638
bits += 10; /* round up to the next integer */
drivers/net/wireless/zydas/zd1211rw/zd_mac.c
642
return bits/divisor;
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
104
bit(rw, 17), bits(rw, 15, 16), bits(rw, 10, 14),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
105
bits(rw, 7, 9), bits(rw, 4, 6), bit(rw, 3), bit(rw, 2),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
111
bits(rw, 15, 17), bits(rw, 9, 14), bits(rw, 3, 8),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
112
bits(rw, 0, 2));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
116
bits(rw, 12, 17), bits(rw, 6, 11), bits(rw, 0, 5));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
123
bits(rw, 8, 9), bits(rw, 5, 7), bits(rw, 3, 4),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
124
bits(rw, 0, 2));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
129
bits(rw, 13, 17), bits(rw, 9, 12), bits(rw, 4, 8),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
130
bits(rw, 0, 3));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
41
return bits(rw, bit, bit);
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
46
int reg = bits(rw, 18, 22);
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
47
int rw_flag = bits(rw, 23, 23);
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
54
bits(rw, 14, 15), bit(rw, 3), bit(rw, 2), bit(rw, 1),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
63
bits(rw, 7, 9), bits(rw, 4, 6), bits(rw, 0, 3));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
67
bits(rw, 6, 17), bits(rw, 0, 5));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
70
PDEBUG("reg3 IFPLL3 num %d", bits(rw, 0, 17));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
74
bits(rw, 8, 16), bits(rw, 4, 7), bits(rw, 0, 3));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
82
bits(rw, 7, 9), bits(rw, 4, 6), bits(rw, 0,3));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
86
bits(rw, 6, 17), bits(rw, 0, 5));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
89
PDEBUG("reg7 RFPLL3 num2 %d", bits(rw, 0, 17));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
93
bits(rw, 8, 16), bits(rw, 4, 7), bits(rw, 0, 3));
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
97
bits(rw, 13, 17), bits(rw, 8, 12), bits(rw, 3, 7),
drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c
98
bits(rw, 0, 2));
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1952
int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1960
if (bits < USB_MIN_RFWRITE_BIT_COUNT) {
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1964
bits, USB_MIN_RFWRITE_BIT_COUNT);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1967
if (bits > USB_MAX_RFWRITE_BIT_COUNT) {
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1970
bits, USB_MAX_RFWRITE_BIT_COUNT);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1974
if (value & (~0UL << bits)) {
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1977
value, bits);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1982
dev_dbg_f(zd_usb_dev(usb), "value %#09x bits %d\n", value, bits);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1996
BUG_ON(sizeof(struct usb_req_rfwrite) + bits * sizeof(__le16) >
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
1999
req_len = sizeof(struct usb_req_rfwrite) + bits * sizeof(__le16);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
2005
req->bits = cpu_to_le16(bits);
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
2007
for (i = 0; i < bits; i++) {
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
2009
if (value & (1 << (bits-1-i)))
drivers/net/wireless/zydas/zd1211rw/zd_usb.h
274
int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits);
drivers/net/wireless/zydas/zd1211rw/zd_usb.h
96
__le16 bits;
drivers/ntb/hw/intel/ntb_hw_gen1.c
1214
static void xeon_db_iowrite(u64 bits, void __iomem *mmio)
drivers/ntb/hw/intel/ntb_hw_gen1.c
1216
iowrite16((u16)bits, mmio);
drivers/ntb/hw/intel/ntb_hw_gen3.h
101
iowrite64(bits, mmio);
drivers/ntb/hw/intel/ntb_hw_gen3.h
99
static inline void gen3_db_iowrite(u64 bits, void __iomem *mmio)
drivers/ntb/test/ntb_tool.c
367
u64 bits;
drivers/ntb/test/ntb_tool.c
377
n = sscanf(buf, "%c %lli", &cmd, &bits);
drivers/ntb/test/ntb_tool.c
387
ret = fn_set(tc->ntb, bits);
drivers/ntb/test/ntb_tool.c
392
ret = fn_clear(tc->ntb, bits);
drivers/nvme/host/pci.c
2522
static int nvme_set_host_mem(struct nvme_dev *dev, u32 bits)
drivers/nvme/host/pci.c
2531
c.features.dword11 = cpu_to_le32(bits);
drivers/nvme/host/pci.c
2541
ret, bits);
drivers/nvme/host/pci.c
2543
dev->hmb = bits & NVME_HOST_MEM_ENABLE;
drivers/nvmem/sc27xx-efuse.c
106
static int sc27xx_efuse_poll_status(struct sc27xx_efuse *efuse, u32 bits)
drivers/nvmem/sc27xx-efuse.c
113
val, (val & bits),
drivers/parisc/sba_iommu.c
1118
Tells where the dvi bits are located in the address.
drivers/parport/parport_sunbpp.c
100
bits |= PARPORT_STATUS_ACK;
drivers/parport/parport_sunbpp.c
102
bits |= PARPORT_STATUS_BUSY;
drivers/parport/parport_sunbpp.c
105
dprintk((KERN_DEBUG "read status 0x%x\n", bits));
drivers/parport/parport_sunbpp.c
106
return bits;
drivers/parport/parport_sunbpp.c
112
unsigned char bits = 0;
drivers/parport/parport_sunbpp.c
117
bits |= PARPORT_CONTROL_STROBE;
drivers/parport/parport_sunbpp.c
119
bits |= PARPORT_CONTROL_AUTOFD;
drivers/parport/parport_sunbpp.c
121
bits |= PARPORT_CONTROL_INIT;
drivers/parport/parport_sunbpp.c
123
bits |= PARPORT_CONTROL_SELECT;
drivers/parport/parport_sunbpp.c
126
dprintk((KERN_DEBUG "read control 0x%x\n", bits));
drivers/parport/parport_sunbpp.c
127
return bits;
drivers/parport/parport_sunbpp.c
89
unsigned char bits = 0;
drivers/parport/parport_sunbpp.c
94
bits |= PARPORT_STATUS_ERROR;
drivers/parport/parport_sunbpp.c
96
bits |= PARPORT_STATUS_SELECT;
drivers/parport/parport_sunbpp.c
98
bits |= PARPORT_STATUS_PAPEROUT;
drivers/pci/controller/pci-hyperv.c
1074
wslot.bits.dev = PCI_SLOT(devfn);
drivers/pci/controller/pci-hyperv.c
1075
wslot.bits.func = PCI_FUNC(devfn);
drivers/pci/controller/pci-hyperv.c
1093
return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
drivers/pci/controller/pci-hyperv.c
165
} bits;
drivers/pcmcia/soc_common.c
685
unsigned int val, struct bittbl *bits, int sz)
drivers/pcmcia/soc_common.c
692
if (val & bits[i].mask)
drivers/pcmcia/soc_common.c
693
b += sprintf(b, " %s", bits[i].name);
drivers/pcmcia/ti113x.h
919
#define DEVID(_vend,_dev,_subvend,_subdev,mask,bits) { \
drivers/pcmcia/ti113x.h
924
.driver_data = ((mask) << 8 | (bits)), \
drivers/pcmcia/ti113x.h
941
u8 test_c9, old_c9, mask, bits;
drivers/pcmcia/ti113x.h
952
bits = id->driver_data & 0xFF;
drivers/pcmcia/ti113x.h
954
test_c9 = (test_c9 & ~mask) | bits;
drivers/perf/arm-cmn.c
395
int bits = arm_cmn_xyidbits(cmn);
drivers/perf/arm-cmn.c
396
int x = id >> bits;
drivers/perf/arm-cmn.c
397
int y = id & ((1U << bits) - 1);
drivers/phy/allwinner/phy-sun4i-usb.c
232
u32 bits, reg_value;
drivers/phy/allwinner/phy-sun4i-usb.c
237
bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
drivers/phy/allwinner/phy-sun4i-usb.c
243
bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
drivers/phy/allwinner/phy-sun4i-usb.c
249
reg_value |= bits;
drivers/phy/allwinner/phy-sun4i-usb.c
251
reg_value &= ~bits;
drivers/phy/allwinner/phy-sun9i-usb.c
46
u32 bits, reg_value;
drivers/phy/allwinner/phy-sun9i-usb.c
48
bits = SUNXI_AHB_INCR16_BURST_EN | SUNXI_AHB_INCR8_BURST_EN |
drivers/phy/allwinner/phy-sun9i-usb.c
53
bits |= SUNXI_HSIC | SUNXI_EHCI_HS_FORCE |
drivers/phy/allwinner/phy-sun9i-usb.c
59
reg_value |= bits;
drivers/phy/allwinner/phy-sun9i-usb.c
61
reg_value &= ~bits;
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
416
u16 reg, u16 bits,
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
431
data, (data & bits) == bits,
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
440
data, (data & bits) == bits,
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
455
u8 reg, u32 bits,
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
462
data, (data & bits) == bits,
drivers/phy/mediatek/phy-mtk-io.h
14
static inline void mtk_phy_clear_bits(void __iomem *reg, u32 bits)
drivers/phy/mediatek/phy-mtk-io.h
18
tmp &= ~bits;
drivers/phy/mediatek/phy-mtk-io.h
22
static inline void mtk_phy_set_bits(void __iomem *reg, u32 bits)
drivers/phy/mediatek/phy-mtk-io.h
26
tmp |= bits;
drivers/phy/phy-xgene.c
626
u32 reg, u32 bits)
drivers/phy/phy-xgene.c
631
val |= bits;
drivers/phy/phy-xgene.c
634
val &= ~bits;
drivers/phy/phy-xgene.c
639
u32 reg, u32 bits)
drivers/phy/phy-xgene.c
644
val &= ~bits;
drivers/phy/phy-xgene.c
649
u32 reg, u32 bits)
drivers/phy/phy-xgene.c
654
val |= bits;
drivers/phy/phy-xgene.c
685
u32 bits)
drivers/phy/phy-xgene.c
690
val &= ~bits;
drivers/phy/phy-xgene.c
695
u32 bits)
drivers/phy/phy-xgene.c
700
val |= bits;
drivers/phy/st/phy-stm32-usbphyc.c
159
static inline void stm32_usbphyc_set_bits(void __iomem *reg, u32 bits)
drivers/phy/st/phy-stm32-usbphyc.c
161
writel_relaxed(readl_relaxed(reg) | bits, reg);
drivers/phy/st/phy-stm32-usbphyc.c
164
static inline void stm32_usbphyc_clr_bits(void __iomem *reg, u32 bits)
drivers/phy/st/phy-stm32-usbphyc.c
166
writel_relaxed(readl_relaxed(reg) & ~bits, reg);
drivers/phy/ti/phy-twl4030-usb.c
240
twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
drivers/phy/ti/phy-twl4030-usb.c
242
return twl4030_usb_write(twl, ULPI_SET(reg), bits);
drivers/phy/ti/phy-twl4030-usb.c
246
twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
drivers/phy/ti/phy-twl4030-usb.c
248
return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
drivers/pinctrl/intel/pinctrl-cherryview.c
1566
acpi_physical_address address, u32 bits, u64 *value,
drivers/pinctrl/intel/pinctrl-tangier.c
123
u32 bits, u32 mask)
drivers/pinctrl/intel/pinctrl-tangier.c
131
value = (value & ~mask) | (bits & mask);
drivers/pinctrl/intel/pinctrl-tangier.c
222
u32 bits = grp->mode << BUFCFG_PINMODE_SHIFT;
drivers/pinctrl/intel/pinctrl-tangier.c
239
tng_update_bufcfg(tp, grp->grp.pins[i], bits, mask);
drivers/pinctrl/intel/pinctrl-tangier.c
249
u32 bits = BUFCFG_PINMODE_GPIO << BUFCFG_PINMODE_SHIFT;
drivers/pinctrl/intel/pinctrl-tangier.c
257
tng_update_bufcfg(tp, pin, bits, mask);
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
126
bits = c->fixed ? c->s_bit : c->s_bit +
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
133
pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg);
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
134
pfd->bitpos = bits % c->sz_reg;
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
81
u32 bits;
drivers/pinctrl/mediatek/pinctrl-mtk-common.c
213
unsigned int bits, mask, shift;
drivers/pinctrl/mediatek/pinctrl-mtk-common.c
227
bits = drv_grp->high_bit - drv_grp->low_bit + 1;
drivers/pinctrl/mediatek/pinctrl-mtk-common.c
228
mask = BIT(bits) - 1;
drivers/pinctrl/pinctrl-at91-pio4.c
346
unsigned long *bits)
drivers/pinctrl/pinctrl-at91-pio4.c
351
bitmap_zero(bits, atmel_pioctrl->npins);
drivers/pinctrl/pinctrl-at91-pio4.c
366
bits[word] |= mask[word] & (reg << offset);
drivers/pinctrl/pinctrl-at91-pio4.c
406
unsigned long *bits)
drivers/pinctrl/pinctrl-at91-pio4.c
425
bitmask = mask[word] & bits[word];
drivers/pinctrl/pinctrl-at91-pio4.c
428
bitmask = mask[word] & ~bits[word];
drivers/pinctrl/pinctrl-at91-pio4.c
433
bits[word] >>= ATMEL_PIO_NPINS_PER_BANK;
drivers/pinctrl/pinctrl-at91.c
1464
unsigned long *mask, unsigned long *bits)
drivers/pinctrl/pinctrl-at91.c
1469
#define BITS_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
drivers/pinctrl/pinctrl-at91.c
1471
uint32_t set_mask = (*mask & *bits) & BITS_MASK(chip->ngpio);
drivers/pinctrl/pinctrl-at91.c
1472
uint32_t clear_mask = (*mask & ~(*bits)) & BITS_MASK(chip->ngpio);
drivers/pinctrl/pinctrl-aw9523.c
593
unsigned long *bits)
drivers/pinctrl/pinctrl-aw9523.c
608
*bits = state;
drivers/pinctrl/pinctrl-aw9523.c
618
*bits |= (state << 8);
drivers/pinctrl/pinctrl-aw9523.c
626
unsigned long *bits)
drivers/pinctrl/pinctrl-aw9523.c
635
bits_lo = *bits;
drivers/pinctrl/pinctrl-aw9523.c
636
bits_hi = *bits >> 8;
drivers/pinctrl/pinctrl-cy8c95x0.c
599
unsigned long bits, offset;
drivers/pinctrl/pinctrl-cy8c95x0.c
607
for_each_set_clump8(offset, bits, tmask, chip->nport * BANK_SZ) {
drivers/pinctrl/pinctrl-cy8c95x0.c
612
ret = cy8c95x0_regmap_update_bits(chip, reg, i, bits, write_val);
drivers/pinctrl/pinctrl-cy8c95x0.c
627
unsigned long bits, offset;
drivers/pinctrl/pinctrl-cy8c95x0.c
635
for_each_set_clump8(offset, bits, tmask, chip->nport * BANK_SZ) {
drivers/pinctrl/pinctrl-cy8c95x0.c
638
ret = cy8c95x0_regmap_read_bits(chip, reg, i, bits, &read_val);
drivers/pinctrl/pinctrl-cy8c95x0.c
644
read_val |= bitmap_get_value8(tval, offset) & ~bits;
drivers/pinctrl/pinctrl-cy8c95x0.c
882
unsigned long *mask, unsigned long *bits)
drivers/pinctrl/pinctrl-cy8c95x0.c
886
return cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, bits, mask);
drivers/pinctrl/pinctrl-cy8c95x0.c
890
unsigned long *mask, unsigned long *bits)
drivers/pinctrl/pinctrl-cy8c95x0.c
894
return cy8c95x0_write_regs_mask(chip, CY8C95X0_OUTPUT, bits, mask);
drivers/pinctrl/pinctrl-mcp23s08.c
293
unsigned long *mask, unsigned long *bits)
drivers/pinctrl/pinctrl-mcp23s08.c
307
*bits = status;
drivers/pinctrl/pinctrl-mcp23s08.c
333
unsigned long *mask, unsigned long *bits)
drivers/pinctrl/pinctrl-mcp23s08.c
339
ret = mcp_update_bits(mcp, MCP_OLAT, *mask, *bits);
drivers/pinctrl/pinctrl-sx150x.c
448
unsigned long *bits)
drivers/pinctrl/pinctrl-sx150x.c
453
*bits);
drivers/pinctrl/renesas/core.c
761
u32 bits;
drivers/pinctrl/renesas/core.c
803
static void __init sh_pfc_check_reg(const char *drvname, u32 reg, u32 bits)
drivers/pinctrl/renesas/core.c
811
if (bits & sh_pfc_regs[i].bits)
drivers/pinctrl/renesas/core.c
813
bits & sh_pfc_regs[i].bits);
drivers/pinctrl/renesas/core.c
815
sh_pfc_regs[i].bits |= bits;
drivers/pinctrl/renesas/core.c
825
sh_pfc_regs[sh_pfc_num_regs].bits = bits;
drivers/pinctrl/renesas/core.c
958
u32 bits;
drivers/pinctrl/renesas/core.c
960
for (i = 0, bits = 0; i < ARRAY_SIZE(bias->pins); i++)
drivers/pinctrl/renesas/core.c
962
bits |= BIT(i);
drivers/pinctrl/renesas/core.c
965
sh_pfc_check_reg(info->name, bias->puen, bits);
drivers/pinctrl/renesas/core.c
967
sh_pfc_check_reg(info->name, bias->pud, bits);
drivers/platform/cznic/turris-omnia-mcu-gpio.c
383
unsigned long *bits)
drivers/platform/cznic/turris-omnia-mcu-gpio.c
436
__assign_bit(i, bits, test_bit(omnia_gpios[i].bit, field));
drivers/platform/cznic/turris-omnia-mcu-gpio.c
458
unsigned long *bits)
drivers/platform/cznic/turris-omnia-mcu-gpio.c
487
__assign_bit(bit, field, test_bit(i, bits));
drivers/platform/olpc/olpc-ec.c
187
int olpc_ec_mask_write(u16 bits)
drivers/platform/olpc/olpc-ec.c
196
__be16 ec_word = cpu_to_be16(bits);
drivers/platform/olpc/olpc-ec.c
200
u8 ec_byte = bits & 0xff;
drivers/platform/surface/surface3_power.c
375
u32 bits, u64 *value64,
drivers/platform/surface/surface_acpi_notify.c
635
u32 bits, u64 *value64, void *opreg_context,
drivers/platform/x86/intel/ishtp_eclite.c
204
u32 bits, u64 *value64,
drivers/platform/x86/intel/ishtp_eclite.c
254
u32 bits, u64 *value64,
drivers/platform/x86/intel/ishtp_eclite.c
258
unsigned int bytes = BITS_TO_BYTES(bits);
drivers/platform/x86/intel/plr_tpmi.c
165
static void plr_print_bits(struct seq_file *s, u64 val, int bits)
drivers/platform/x86/intel/plr_tpmi.c
170
for_each_set_bit(bit, mask, bits) {
drivers/platform/x86/lg-laptop.c
733
u32 bits, u64 *value, void *handler_context,
drivers/platform/x86/lg-laptop.c
739
if (bits % BITS_PER_BYTE)
drivers/platform/x86/lg-laptop.c
742
size = bits / BITS_PER_BYTE;
drivers/pmdomain/imx/gpcv2.c
1007
.bits = {
drivers/pmdomain/imx/gpcv2.c
1018
.bits = {
drivers/pmdomain/imx/gpcv2.c
1032
.bits = {
drivers/pmdomain/imx/gpcv2.c
1046
.bits = {
drivers/pmdomain/imx/gpcv2.c
1057
.bits = {
drivers/pmdomain/imx/gpcv2.c
1071
.bits = {
drivers/pmdomain/imx/gpcv2.c
1082
.bits = {
drivers/pmdomain/imx/gpcv2.c
1093
.bits = {
drivers/pmdomain/imx/gpcv2.c
1104
.bits = {
drivers/pmdomain/imx/gpcv2.c
1118
.bits = {
drivers/pmdomain/imx/gpcv2.c
1129
.bits = {
drivers/pmdomain/imx/gpcv2.c
1140
.bits = {
drivers/pmdomain/imx/gpcv2.c
1154
.bits = {
drivers/pmdomain/imx/gpcv2.c
1232
.bits = {
drivers/pmdomain/imx/gpcv2.c
1246
.bits = {
drivers/pmdomain/imx/gpcv2.c
1257
.bits = {
drivers/pmdomain/imx/gpcv2.c
1271
.bits = {
drivers/pmdomain/imx/gpcv2.c
1285
.bits = {
drivers/pmdomain/imx/gpcv2.c
1349
if (domain->bits.map)
drivers/pmdomain/imx/gpcv2.c
1351
domain->bits.map, domain->bits.map);
drivers/pmdomain/imx/gpcv2.c
1375
if (domain->bits.map)
drivers/pmdomain/imx/gpcv2.c
1377
domain->bits.map, 0);
drivers/pmdomain/imx/gpcv2.c
1390
if (domain->bits.map)
drivers/pmdomain/imx/gpcv2.c
1392
domain->bits.map, 0);
drivers/pmdomain/imx/gpcv2.c
291
} bits;
drivers/pmdomain/imx/gpcv2.c
348
if (domain->bits.pxx) {
drivers/pmdomain/imx/gpcv2.c
351
domain->bits.pxx, domain->bits.pxx);
drivers/pmdomain/imx/gpcv2.c
358
!(reg_val & domain->bits.pxx),
drivers/pmdomain/imx/gpcv2.c
378
if (domain->bits.hskreq) {
drivers/pmdomain/imx/gpcv2.c
380
domain->bits.hskreq, domain->bits.hskreq);
drivers/pmdomain/imx/gpcv2.c
440
if (domain->bits.hskreq) {
drivers/pmdomain/imx/gpcv2.c
442
domain->bits.hskreq);
drivers/pmdomain/imx/gpcv2.c
446
!(reg_val & domain->bits.hskack),
drivers/pmdomain/imx/gpcv2.c
454
if (domain->bits.pxx) {
drivers/pmdomain/imx/gpcv2.c
463
domain->bits.pxx, domain->bits.pxx);
drivers/pmdomain/imx/gpcv2.c
470
!(reg_val & domain->bits.pxx),
drivers/pmdomain/imx/gpcv2.c
507
.bits = {
drivers/pmdomain/imx/gpcv2.c
519
.bits = {
drivers/pmdomain/imx/gpcv2.c
531
.bits = {
drivers/pmdomain/imx/gpcv2.c
575
.bits = {
drivers/pmdomain/imx/gpcv2.c
586
.bits = {
drivers/pmdomain/imx/gpcv2.c
597
.bits = {
drivers/pmdomain/imx/gpcv2.c
608
.bits = {
drivers/pmdomain/imx/gpcv2.c
619
.bits = {
drivers/pmdomain/imx/gpcv2.c
630
.bits = {
drivers/pmdomain/imx/gpcv2.c
643
.bits = {
drivers/pmdomain/imx/gpcv2.c
657
.bits = {
drivers/pmdomain/imx/gpcv2.c
670
.bits = {
drivers/pmdomain/imx/gpcv2.c
681
.bits = {
drivers/pmdomain/imx/gpcv2.c
692
.bits = {
drivers/pmdomain/imx/gpcv2.c
744
.bits = {
drivers/pmdomain/imx/gpcv2.c
757
.bits = {
drivers/pmdomain/imx/gpcv2.c
769
.bits = {
drivers/pmdomain/imx/gpcv2.c
781
.bits = {
drivers/pmdomain/imx/gpcv2.c
792
.bits = {
drivers/pmdomain/imx/gpcv2.c
804
.bits = {
drivers/pmdomain/imx/gpcv2.c
817
.bits = {
drivers/pmdomain/imx/gpcv2.c
831
.bits = {
drivers/pmdomain/imx/gpcv2.c
842
.bits = {
drivers/pmdomain/imx/gpcv2.c
853
.bits = {
drivers/pmdomain/imx/gpcv2.c
865
.bits = {
drivers/pmdomain/imx/gpcv2.c
879
.bits = {
drivers/pmdomain/imx/gpcv2.c
935
.bits = {
drivers/pmdomain/imx/gpcv2.c
946
.bits = {
drivers/pmdomain/imx/gpcv2.c
957
.bits = {
drivers/pmdomain/imx/gpcv2.c
968
.bits = {
drivers/pmdomain/imx/gpcv2.c
979
.bits = {
drivers/pmdomain/imx/gpcv2.c
993
.bits = {
drivers/pmdomain/qcom/cpr.c
826
u32 bits = 0;
drivers/pmdomain/qcom/cpr.c
829
ret = nvmem_cell_read_variable_le_u32(drv->dev, init_v_efuse, &bits);
drivers/pmdomain/qcom/cpr.c
833
steps = bits & ~BIT(desc->cpr_fuses.init_voltage_width - 1);
drivers/pmdomain/qcom/cpr.c
835
if (bits & BIT(desc->cpr_fuses.init_voltage_width - 1))
drivers/pnp/base.h
34
typedef struct { DECLARE_BITMAP(bits, PNP_IRQ_NR); } pnp_irq_mask_t;
drivers/pnp/interface.c
75
if (test_bit(i, irq->map.bits)) {
drivers/pnp/interface.c
86
if (bitmap_empty(irq->map.bits, PNP_IRQ_NR))
drivers/pnp/isapnp/core.c
415
unsigned long bits;
drivers/pnp/isapnp/core.c
420
bits = (tmp[1] << 8) | tmp[0];
drivers/pnp/isapnp/core.c
422
bitmap_zero(map.bits, PNP_IRQ_NR);
drivers/pnp/isapnp/core.c
423
bitmap_copy(map.bits, &bits, 16);
drivers/pnp/manager.c
154
if (bitmap_empty(rule->map.bits, PNP_IRQ_NR)) {
drivers/pnp/manager.c
161
res->start = find_next_bit(rule->map.bits, PNP_IRQ_NR, 16);
drivers/pnp/manager.c
167
if (test_bit(xtab[i], rule->map.bits)) {
drivers/pnp/pnpacpi/rsparser.c
314
bitmap_zero(map.bits, PNP_IRQ_NR);
drivers/pnp/pnpacpi/rsparser.c
317
__set_bit(p->interrupts[i], map.bits);
drivers/pnp/pnpacpi/rsparser.c
331
bitmap_zero(map.bits, PNP_IRQ_NR);
drivers/pnp/pnpacpi/rsparser.c
335
__set_bit(p->interrupts[i], map.bits);
drivers/pnp/pnpbios/rsparser.c
266
unsigned long bits;
drivers/pnp/pnpbios/rsparser.c
270
bits = (p[2] << 8) | p[1];
drivers/pnp/pnpbios/rsparser.c
272
bitmap_zero(map.bits, PNP_IRQ_NR);
drivers/pnp/pnpbios/rsparser.c
273
bitmap_copy(map.bits, &bits, 16);
drivers/pnp/quirks.c
81
bitmap_zero(irq->map.bits, PNP_IRQ_NR);
drivers/pnp/quirks.c
82
__set_bit(5, irq->map.bits);
drivers/pnp/quirks.c
83
__set_bit(7, irq->map.bits);
drivers/pnp/quirks.c
84
__set_bit(10, irq->map.bits);
drivers/pnp/resource.c
672
test_bit(start, irq->map.bits))
drivers/pnp/resource.c
71
if (test_bit(i, irq->map.bits))
drivers/pnp/support.c
145
if (bitmap_empty(irq->map.bits, PNP_IRQ_NR))
drivers/pnp/support.c
150
if (test_bit(i, irq->map.bits))
drivers/powercap/intel_rapl_common.c
664
u64 bits;
drivers/powercap/intel_rapl_common.c
671
bits = rapl_unit_xlate(rd, rpi->unit, value, 1);
drivers/powercap/intel_rapl_common.c
672
bits <<= rpi->shift;
drivers/powercap/intel_rapl_common.c
673
bits &= rpi->mask;
drivers/powercap/intel_rapl_common.c
679
ra.value = bits;
drivers/pwm/pwm-samsung.c
140
u8 bits;
drivers/pwm/pwm-samsung.c
142
bits = (fls(divisor) - 1) - our_chip->variant.div_base;
drivers/pwm/pwm-samsung.c
148
reg |= bits << shift;
drivers/pwm/pwm-samsung.c
211
if (variant->bits < 32) {
drivers/pwm/pwm-samsung.c
214
if ((rate >> (variant->bits + div)) < freq)
drivers/pwm/pwm-samsung.c
471
.bits = 16,
drivers/pwm/pwm-samsung.c
478
.bits = 32,
drivers/pwm/pwm-samsung.c
485
.bits = 32,
drivers/pwm/pwm-samsung.c
492
.bits = 32,
drivers/pwm/pwm-twl.c
156
u8 val, mask, bits;
drivers/pwm/pwm-twl.c
160
bits = TWL4030_GPIO7_VIBRASYNC_PWM1_PWM1;
drivers/pwm/pwm-twl.c
163
bits = TWL4030_GPIO6_PWM0_MUTE_PWM0;
drivers/pwm/pwm-twl.c
179
val |= bits;
drivers/regulator/da9062-regulator.c
895
int bits, i, ret;
drivers/regulator/da9062-regulator.c
897
ret = regmap_read(hw->regmap, DA9062AA_STATUS_D, &bits);
drivers/regulator/da9062-regulator.c
909
if (BIT(regl->info->oc_event.lsb) & bits) {
drivers/regulator/da9063-regulator.c
738
int bits, i, ret;
drivers/regulator/da9063-regulator.c
740
ret = regmap_read(hw->regmap, DA9063_REG_STATUS_D, &bits);
drivers/regulator/da9063-regulator.c
749
if (BIT(regl->info->oc_event.lsb) & bits) {
drivers/regulator/max8660.c
136
u8 reg, bits;
drivers/regulator/max8660.c
145
bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30;
drivers/regulator/max8660.c
146
return max8660_write(max8660, MAX8660_VCC1, 0xff, bits);
drivers/regulator/tps65910-regulator.c
274
#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
drivers/s390/block/dasd.c
2155
void dasd_device_set_stop_bits(struct dasd_device *device, int bits)
drivers/s390/block/dasd.c
2157
device->stopped |= bits;
drivers/s390/block/dasd.c
2161
void dasd_device_remove_stop_bits(struct dasd_device *device, int bits)
drivers/s390/block/dasd.c
2163
device->stopped &= ~bits;
drivers/s390/block/dasd_fba.c
476
if (private->rdc_data.mode.bits.data_chain == 0) {
drivers/s390/block/dasd_fba.c
493
if (private->rdc_data.mode.bits.data_chain != 0) {
drivers/s390/block/dasd_fba.c
510
if (private->rdc_data.mode.bits.data_chain == 0) {
drivers/s390/block/dasd_fba.c
578
if (private->rdc_data.mode.bits.data_chain != 0)
drivers/s390/block/dasd_fba.c
584
if (private->rdc_data.mode.bits.data_chain == 0)
drivers/s390/block/dasd_fba.h
51
} __attribute__ ((packed)) bits;
drivers/s390/block/dasd_fba.h
62
} __attribute__ ((packed)) bits;
drivers/s390/cio/airq.c
114
static inline unsigned long iv_size(unsigned long bits)
drivers/s390/cio/airq.c
116
return BITS_TO_LONGS(bits) * sizeof(unsigned long);
drivers/s390/cio/airq.c
127
struct airq_iv *airq_iv_create(unsigned long bits, unsigned long flags,
drivers/s390/cio/airq.c
136
iv->bits = bits;
drivers/s390/cio/airq.c
138
size = iv_size(bits);
drivers/s390/cio/airq.c
141
if ((cache_line_size() * BITS_PER_BYTE) < bits
drivers/s390/cio/airq.c
163
iv->end = bits;
drivers/s390/cio/airq.c
170
size = bits * sizeof(unsigned long);
drivers/s390/cio/airq.c
176
size = bits * sizeof(unsigned int);
drivers/s390/cio/airq.c
210
cio_dma_free(iv->vector, iv_size(iv->bits));
drivers/s390/cio/airq.c
232
bit = find_first_bit_inv(iv->avail, iv->bits);
drivers/s390/cio/airq.c
233
while (bit + num <= iv->bits) {
drivers/s390/cio/airq.c
245
bit = find_next_bit_inv(iv->avail, iv->bits, bit + i + 1);
drivers/s390/cio/airq.c
247
if (bit + num > iv->bits)
drivers/s390/crypto/ap_bus.c
1209
int ap_hex2bitmap(const char *str, unsigned long *bitmap, int bits)
drivers/s390/crypto/ap_bus.c
1214
if (bits & 0x07)
drivers/s390/crypto/ap_bus.c
1222
for (i = 0; isxdigit(*str) && i < bits; str++) {
drivers/s390/crypto/ap_bus.c
1255
static int modify_bitmap(const char *str, unsigned long *bitmap, int bits)
drivers/s390/crypto/ap_bus.c
1261
if (bits & 0x07)
drivers/s390/crypto/ap_bus.c
1269
if (str == np || a >= bits)
drivers/s390/crypto/ap_bus.c
1274
if (str == np || a > z || z >= bits)
drivers/s390/crypto/ap_bus.c
1290
static int ap_parse_bitmap_str(const char *str, unsigned long *bitmap, int bits,
drivers/s390/crypto/ap_bus.c
1296
size = BITS_TO_LONGS(bits) * sizeof(unsigned long);
drivers/s390/crypto/ap_bus.c
1299
rc = modify_bitmap(str, newmap, bits);
drivers/s390/crypto/ap_bus.c
1302
rc = ap_hex2bitmap(str, newmap, bits);
drivers/s390/crypto/ap_bus.c
1308
unsigned long *bitmap, int bits,
drivers/s390/crypto/ap_bus.c
1315
if (bits & 0x07)
drivers/s390/crypto/ap_bus.c
1318
size = BITS_TO_LONGS(bits) * sizeof(unsigned long);
drivers/s390/crypto/ap_bus.c
1326
rc = ap_parse_bitmap_str(str, bitmap, bits, newmap);
drivers/s390/net/qeth_l3_main.c
73
static void qeth_l3_convert_addr_to_bits(u8 *addr, u8 *bits, int len)
drivers/s390/net/qeth_l3_main.c
81
bits[i*8 + j] = octet & 1;
drivers/scsi/aha1542.c
91
u8 bits = inb(port) & mask;
drivers/scsi/aha1542.c
92
if ((bits & allof) == allof && ((bits & noneof) == 0))
drivers/scsi/aic7xxx/aic7xxx_93cx6.c
116
if (cmd->bits[i] != 0)
drivers/scsi/aic7xxx/aic7xxx_93cx6.c
122
if (cmd->bits[i] != 0)
drivers/scsi/aic7xxx/aic7xxx_93cx6.c
77
uint8_t bits[11];
drivers/scsi/esp_scsi.c
1153
u8 bits = esp_read8(ESP_FDATA);
drivers/scsi/esp_scsi.c
1161
if (!(bits & esp->scsi_id_mask))
drivers/scsi/esp_scsi.c
1163
bits &= ~esp->scsi_id_mask;
drivers/scsi/esp_scsi.c
1164
if (!bits || (bits & (bits - 1)))
drivers/scsi/esp_scsi.c
1167
target = ffs(bits) - 1;
drivers/scsi/ips.c
4509
uint32_t bits;
drivers/scsi/ips.c
4517
bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
drivers/scsi/ips.c
4521
else if (bits & 0x3)
drivers/scsi/lpfc/lpfc_bsg.c
2660
ctreq->RevisionId.bits.Revision = SLI_CT_REVISION;
drivers/scsi/lpfc/lpfc_bsg.c
2661
ctreq->RevisionId.bits.InId = 0;
drivers/scsi/lpfc/lpfc_bsg.c
2664
ctreq->CommandResponse.bits.CmdRsp = ELX_LOOPBACK_XRI_SETUP;
drivers/scsi/lpfc/lpfc_bsg.c
2665
ctreq->CommandResponse.bits.Size = 0;
drivers/scsi/lpfc/lpfc_bsg.c
3198
ctreq->RevisionId.bits.Revision = SLI_CT_REVISION;
drivers/scsi/lpfc/lpfc_bsg.c
3199
ctreq->RevisionId.bits.InId = 0;
drivers/scsi/lpfc/lpfc_bsg.c
3202
ctreq->CommandResponse.bits.CmdRsp = cpu_to_be16(ELX_LOOPBACK_DATA);
drivers/scsi/lpfc/lpfc_bsg.c
3203
ctreq->CommandResponse.bits.Size = cpu_to_be16(size);
drivers/scsi/lpfc/lpfc_bsg.c
932
cmd = be16_to_cpu(ct_req->CommandResponse.bits.CmdRsp);
drivers/scsi/lpfc/lpfc_ct.c
1021
if (CTrsp->CommandResponse.bits.CmdRsp ==
drivers/scsi/lpfc/lpfc_ct.c
1036
} else if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1045
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1052
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1060
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1067
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1078
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1085
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1233
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1248
} else if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1257
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1265
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1273
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1281
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1290
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1298
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1375
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1604
CommandResponse.bits.CmdRsp);
drivers/scsi/lpfc/lpfc_ct.c
1614
be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp),
drivers/scsi/lpfc/lpfc_ct.c
1674
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1695
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1716
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1737
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1760
if (be16_to_cpu(ctrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1792
if (be16_to_cpu(CTrsp->CommandResponse.bits.CmdRsp) ==
drivers/scsi/lpfc/lpfc_ct.c
1993
CtReq->RevisionId.bits.Revision = SLI_CT_REVISION;
drivers/scsi/lpfc/lpfc_ct.c
1994
CtReq->RevisionId.bits.InId = 0;
drivers/scsi/lpfc/lpfc_ct.c
1997
CtReq->CommandResponse.bits.Size = 0;
drivers/scsi/lpfc/lpfc_ct.c
2000
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2012
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2024
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2031
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2039
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
207
ct_rsp->RevisionId.bits.Revision = SLI_CT_REVISION;
drivers/scsi/lpfc/lpfc_ct.c
2073
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
208
ct_rsp->RevisionId.bits.InId = 0;
drivers/scsi/lpfc/lpfc_ct.c
2083
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2094
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2106
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
211
ct_rsp->CommandResponse.bits.Size = 0;
drivers/scsi/lpfc/lpfc_ct.c
2118
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
212
ct_rsp->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2125
CtReq->CommandResponse.bits.CmdRsp =
drivers/scsi/lpfc/lpfc_ct.c
2246
__be16 fdmi_cmd = CTcmd->CommandResponse.bits.CmdRsp;
drivers/scsi/lpfc/lpfc_ct.c
2247
__be16 fdmi_rsp = CTrsp->CommandResponse.bits.CmdRsp;
drivers/scsi/lpfc/lpfc_ct.c
314
mi_cmd = be16_to_cpu(ct_req->CommandResponse.bits.CmdRsp);
drivers/scsi/lpfc/lpfc_ct.c
3257
CtReq->RevisionId.bits.Revision = SLI_CT_REVISION;
drivers/scsi/lpfc/lpfc_ct.c
3258
CtReq->RevisionId.bits.InId = 0;
drivers/scsi/lpfc/lpfc_ct.c
3263
CtReq->CommandResponse.bits.CmdRsp = cpu_to_be16(cmdcode);
drivers/scsi/lpfc/lpfc_ct.c
3419
CtReq->CommandResponse.bits.Size = cpu_to_be16(rsp_size);
drivers/scsi/lpfc/lpfc_ct.c
3589
__be16 rsp = ctrsp->CommandResponse.bits.CmdRsp;
drivers/scsi/lpfc/lpfc_ct.c
3597
cmd = be16_to_cpu(ctcmd->CommandResponse.bits.CmdRsp);
drivers/scsi/lpfc/lpfc_ct.c
3747
ctreq->RevisionId.bits.Revision = SLI_CT_REVISION;
drivers/scsi/lpfc/lpfc_ct.c
3748
ctreq->RevisionId.bits.InId = 0;
drivers/scsi/lpfc/lpfc_ct.c
3753
ctreq->CommandResponse.bits.CmdRsp = cpu_to_be16(cmdcode);
drivers/scsi/lpfc/lpfc_ct.c
3806
ctreq->CommandResponse.bits.Size = cpu_to_be16(rsp_size);
drivers/scsi/lpfc/lpfc_ct.c
675
CommandResponse.bits.CmdRsp;
drivers/scsi/lpfc/lpfc_hw.h
3787
struct_group_tagged(MAILBOX_word0, bits,
drivers/scsi/lpfc/lpfc_hw.h
82
} bits;
drivers/scsi/lpfc/lpfc_hw.h
91
} bits;
drivers/scsi/megaraid/megaraid_sas.h
803
} bits;
drivers/scsi/megaraid/megaraid_sas_base.c
5060
if (ci->host_device_list[i].flags.u.bits.is_sys_pd) {
drivers/scsi/megaraid/megaraid_sas_base.c
8817
if (targetid_entry->flags.u.bits.is_sys_pd) {
drivers/scsi/megaraid/megaraid_sas_fusion.h
186
} bits;
drivers/scsi/mpt3sas/mpt3sas_ctl.c
1239
karg.pci_information.u.bits.bus = ioc->pdev->bus->number;
drivers/scsi/mpt3sas/mpt3sas_ctl.c
1240
karg.pci_information.u.bits.device = PCI_SLOT(ioc->pdev->devfn);
drivers/scsi/mpt3sas/mpt3sas_ctl.c
1241
karg.pci_information.u.bits.function = PCI_FUNC(ioc->pdev->devfn);
drivers/scsi/mpt3sas/mpt3sas_ctl.h
146
} bits;
drivers/scsi/smartpqi/smartpqi.h
915
} bits;
drivers/scsi/smartpqi/smartpqi_init.c
7699
if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
drivers/scsi/smartpqi/smartpqi_init.c
7729
reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
drivers/scsi/smartpqi/smartpqi_init.c
7730
reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
drivers/soc/aspeed/aspeed-p2a-ctrl.c
266
u32 bits = 0;
drivers/soc/aspeed/aspeed-p2a-ctrl.c
283
bits |= priv->parent->config->regions[i].bit;
drivers/soc/aspeed/aspeed-p2a-ctrl.c
294
regmap_update_bits(priv->parent->regmap, SCU2C, bits, bits);
drivers/soc/fsl/qbman/bman.c
627
int bman_p_irqsource_add(struct bman_portal *p, u32 bits)
drivers/soc/fsl/qbman/bman.c
632
p->irq_sources |= bits & BM_PIRQ_VISIBLE;
drivers/soc/fsl/qbman/bman_priv.h
69
int bman_p_irqsource_add(struct bman_portal *p, u32 bits);
drivers/soc/fsl/qbman/qman.c
1287
portal->bits = 0;
drivers/soc/fsl/qbman/qman.c
1685
void qman_p_irqsource_add(struct qman_portal *p, u32 bits)
drivers/soc/fsl/qbman/qman.c
1690
p->irq_sources |= bits & QM_PIRQ_VISIBLE;
drivers/soc/fsl/qbman/qman.c
1696
void qman_p_irqsource_remove(struct qman_portal *p, u32 bits)
drivers/soc/fsl/qbman/qman.c
1712
bits &= QM_PIRQ_VISIBLE;
drivers/soc/fsl/qbman/qman.c
1713
p->irq_sources &= ~bits;
drivers/soc/fsl/qbman/qman.c
980
unsigned long bits;
drivers/soc/fsl/qbman/qman_ccsr.c
244
u16 bits;
drivers/soc/fsl/qbman/qman_ccsr.c
524
log_edata_bits(dev, error_mdata[memid].bits);
drivers/soc/fsl/qbman/qman_ccsr.c
543
log_edata_bits(dev, error_mdata[memid].bits);
drivers/soc/fsl/qe/gpio.c
81
unsigned long *mask, unsigned long *bits)
drivers/soc/fsl/qe/gpio.c
94
if (test_bit(i, bits))
drivers/spi/spi-ath79.c
109
u32 word, u8 bits, unsigned flags)
drivers/spi/spi-ath79.c
115
for (word <<= (32 - bits); likely(bits); bits--) {
drivers/spi/spi-ath79.c
128
if (bits == 1)
drivers/spi/spi-atmel.c
1292
unsigned int bits = spi->bits_per_word;
drivers/spi/spi-atmel.c
1322
csr = SPI_BF(BITS, bits - 8);
drivers/spi/spi-atmel.c
1354
bits, spi->mode, spi_get_chipselect(spi, 0), csr);
drivers/spi/spi-atmel.c
1384
u8 bits;
drivers/spi/spi-atmel.c
1395
bits = (asd->csr >> 4) & 0xf;
drivers/spi/spi-atmel.c
1396
if (bits != xfer->bits_per_word - 8) {
drivers/spi/spi-bitbang-txrx.h
115
u32 word, u8 bits)
drivers/spi/spi-bitbang-txrx.h
119
u8 rxbit = bits - 1;
drivers/spi/spi-bitbang-txrx.h
122
for (; likely(bits); bits--) {
drivers/spi/spi-bitbang-txrx.h
148
u32 word, u8 bits)
drivers/spi/spi-bitbang-txrx.h
152
u8 rxbit = bits - 1;
drivers/spi/spi-bitbang-txrx.h
155
for (; likely(bits); bits--) {
drivers/spi/spi-bitbang-txrx.h
51
u32 word, u8 bits)
drivers/spi/spi-bitbang-txrx.h
55
u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
drivers/spi/spi-bitbang-txrx.h
57
for (word <<= (32 - bits); likely(bits); bits--) {
drivers/spi/spi-bitbang-txrx.h
83
u32 word, u8 bits)
drivers/spi/spi-bitbang-txrx.h
87
u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
drivers/spi/spi-bitbang-txrx.h
89
for (word <<= (32 - bits); likely(bits); bits--) {
drivers/spi/spi-bitbang.c
102
word = txrx_word(spi, ns, word, bits, flags);
drivers/spi/spi-bitbang.c
120
unsigned int bits = t->bits_per_word;
drivers/spi/spi-bitbang.c
133
word = txrx_word(spi, ns, word, bits, flags);
drivers/spi/spi-bitbang.c
58
unsigned int bits = t->bits_per_word;
drivers/spi/spi-bitbang.c
71
word = txrx_word(spi, ns, word, bits, flags);
drivers/spi/spi-bitbang.c
89
unsigned int bits = t->bits_per_word;
drivers/spi/spi-butterfly.c
138
u8 bits, unsigned flags)
drivers/spi/spi-butterfly.c
140
return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-davinci.c
238
static inline void set_io_bits(void __iomem *addr, u32 bits)
drivers/spi/spi-davinci.c
242
v |= bits;
drivers/spi/spi-davinci.c
246
static inline void clear_io_bits(void __iomem *addr, u32 bits)
drivers/spi/spi-davinci.c
250
v &= ~bits;
drivers/spi/spi-fsl-dspi.c
111
#define SPI_FRAME_BITS(bits) SPI_CTAR_FMSZ((bits) - 1)
drivers/spi/spi-fsl-dspi.c
112
#define SPI_FRAME_EBITS(bits) SPI_CTARE_FMSZE(((bits) - 1) >> 4)
drivers/spi/spi-gpio.c
106
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
109
return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
111
return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
115
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
118
return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
120
return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
124
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
127
return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
129
return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
133
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
136
return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
138
return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
152
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
156
return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
158
return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
162
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
166
return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
168
return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-gpio.c
172
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
176
return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
178
return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
182
unsigned int nsecs, u32 word, u8 bits, unsigned int flags)
drivers/spi/spi-gpio.c
186
return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-gpio.c
188
return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-ingenic.c
124
unsigned int bits)
drivers/spi/spi-ingenic.c
136
if (bits > 16) {
drivers/spi/spi-ingenic.c
140
} else if (bits > 8) {
drivers/spi/spi-ingenic.c
176
struct spi_transfer *xfer, unsigned int bits)
drivers/spi/spi-ingenic.c
181
&xfer->rx_sg, DMA_DEV_TO_MEM, bits);
drivers/spi/spi-ingenic.c
186
&xfer->tx_sg, DMA_MEM_TO_DEV, bits);
drivers/spi/spi-ingenic.c
245
unsigned int bits = xfer->bits_per_word ?: spi->bits_per_word;
drivers/spi/spi-ingenic.c
250
return spi_ingenic_dma_tx(ctlr, xfer, bits);
drivers/spi/spi-ingenic.c
252
if (bits > 16)
drivers/spi/spi-ingenic.c
255
if (bits > 8)
drivers/spi/spi-lm70llp.c
182
static u32 lm70_txrx(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits,
drivers/spi/spi-lm70llp.c
185
return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-lp8841-rtc.c
68
u32 word, u8 bits)
drivers/spi/spi-lp8841-rtc.c
72
u32 shift = 32 - bits;
drivers/spi/spi-lp8841-rtc.c
74
for (; likely(bits); bits--) {
drivers/spi/spi-npcm-pspi.c
61
static inline unsigned int bytes_per_word(unsigned int bits)
drivers/spi/spi-npcm-pspi.c
63
return bits <= 8 ? 1 : 2;
drivers/spi/spi-omap-uwire.c
205
unsigned bits = t->bits_per_word;
drivers/spi/spi-omap-uwire.c
227
if (bits > 8) {
drivers/spi/spi-omap-uwire.c
232
val <<= 16 - bits;
drivers/spi/spi-omap-uwire.c
236
dev_name(&spi->dev), bits, val);
drivers/spi/spi-omap-uwire.c
244
val = START | w | (bits << 5);
drivers/spi/spi-omap-uwire.c
268
if (bits > 8) {
drivers/spi/spi-omap-uwire.c
274
val = START | w | (bits << 0);
drivers/spi/spi-omap-uwire.c
289
val &= (1 << bits) - 1;
drivers/spi/spi-omap-uwire.c
296
dev_name(&spi->dev), bits, val);
drivers/spi/spi-pl022.c
1598
unsigned int bits = spi->bits_per_word;
drivers/spi/spi-pl022.c
1688
if ((bits <= 3) || (bits > pl022->vendor->max_bpw)) {
drivers/spi/spi-pl022.c
1694
} else if (bits <= 8) {
drivers/spi/spi-pl022.c
1699
} else if (bits <= 16) {
drivers/spi/spi-pl022.c
1754
SSP_WRITE_BITS(chip->cr0, bits - 1,
drivers/spi/spi-pl022.c
1771
SSP_WRITE_BITS(chip->cr0, bits - 1,
drivers/spi/spi-pxa2xx.c
1012
cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits);
drivers/spi/spi-pxa2xx.c
293
u32 clk_div, u8 bits)
drivers/spi/spi-pxa2xx.c
299
| QUARK_X1000_SSCR0_DataSize(bits > 32 ? 8 : bits);
drivers/spi/spi-pxa2xx.c
303
| SSCR0_DataSize(bits > 16 ? bits - 16 : bits)
drivers/spi/spi-pxa2xx.c
304
| (bits > 16 ? SSCR0_EDSS : 0);
drivers/spi/spi-pxa2xx.c
942
u8 bits;
drivers/spi/spi-pxa2xx.c
968
bits = transfer->bits_per_word;
drivers/spi/spi-pxa2xx.c
973
if (bits <= 8) {
drivers/spi/spi-pxa2xx.c
977
} else if (bits <= 16) {
drivers/spi/spi-pxa2xx.c
981
} else if (bits <= 32) {
drivers/spi/spi-pxa2xx.h
103
static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits)
drivers/spi/spi-pxa2xx.h
105
pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits);
drivers/spi/spi-pxa2xx.h
108
static inline u32 read_SSSR_bits(const struct driver_data *drv_data, u32 bits)
drivers/spi/spi-pxa2xx.h
110
return pxa2xx_spi_read(drv_data, SSSR) & bits;
drivers/spi/spi-rockchip.c
20
#define ROCKCHIP_SPI_CLR_BITS(reg, bits) \
drivers/spi/spi-rockchip.c
21
writel_relaxed(readl_relaxed(reg) & ~(bits), reg)
drivers/spi/spi-rockchip.c
22
#define ROCKCHIP_SPI_SET_BITS(reg, bits) \
drivers/spi/spi-rockchip.c
23
writel_relaxed(readl_relaxed(reg) | (bits), reg)
drivers/spi/spi-sh-msiof.c
267
u32 bits, u32 words1, u32 words2)
drivers/spi/spi-sh-msiof.c
270
FIELD_PREP(SIMDR2_BITLEN1, bits - 1) |
drivers/spi/spi-sh-msiof.c
282
u32 dr3 = FIELD_PREP(SIMDR3_BITLEN2, bits - 1) |
drivers/spi/spi-sh-msiof.c
579
unsigned int words, unsigned int bits)
drivers/spi/spi-sh-msiof.c
591
fifo_shift = 32 - bits;
drivers/spi/spi-sh-msiof.c
597
sh_msiof_spi_set_mode_regs(p, tx_buf, rx_buf, bits, words, 0);
drivers/spi/spi-sh-msiof.c
829
unsigned int bits = t->bits_per_word;
drivers/spi/spi-sh-msiof.c
857
if (bits <= 8) {
drivers/spi/spi-sh-msiof.c
859
} else if (bits <= 16) {
drivers/spi/spi-sh-msiof.c
889
if (bits <= 8 && len > 15) {
drivers/spi/spi-sh-msiof.c
890
bits = 32;
drivers/spi/spi-sh-msiof.c
897
if (bits <= 8) {
drivers/spi/spi-sh-msiof.c
901
} else if (bits <= 16) {
drivers/spi/spi-sh-msiof.c
941
words, bits);
drivers/spi/spi-sh-msiof.c
953
bits = t->bits_per_word;
drivers/spi/spi-sh-sci.c
100
unsigned nsecs, u32 word, u8 bits,
drivers/spi/spi-sh-sci.c
103
return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-sh-sci.c
39
static inline void setbits(struct sh_sci_spi *sp, int bits, int on)
drivers/spi/spi-sh-sci.c
50
sp->val |= bits;
drivers/spi/spi-sh-sci.c
52
sp->val &= ~bits;
drivers/spi/spi-sh-sci.c
79
unsigned nsecs, u32 word, u8 bits,
drivers/spi/spi-sh-sci.c
82
return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-sh-sci.c
86
unsigned nsecs, u32 word, u8 bits,
drivers/spi/spi-sh-sci.c
89
return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
drivers/spi/spi-sh-sci.c
93
unsigned nsecs, u32 word, u8 bits,
drivers/spi/spi-sh-sci.c
96
return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
drivers/spi/spi-sprd.c
254
static void sprd_spi_set_transfer_bits(struct sprd_spi *ss, u32 bits)
drivers/spi/spi-sprd.c
260
val |= bits << SPRD_SPI_CHNL_LEN;
drivers/spi/spi-stm32.c
447
u32 offset, u32 bits)
drivers/spi/spi-stm32.c
449
writel_relaxed(readl_relaxed(spi->base + offset) | bits,
drivers/spi/spi-stm32.c
454
u32 offset, u32 bits)
drivers/spi/spi-stm32.c
456
writel_relaxed(readl_relaxed(spi->base + offset) & ~bits,
drivers/spi/spi-uniphier.c
103
static inline unsigned int bytes_per_word(unsigned int bits)
drivers/spi/spi-uniphier.c
105
return bits <= 8 ? 1 : (bits <= 16 ? 2 : 4);
drivers/spi/spi-xtensa-xtfpga.c
54
u32 v, u8 bits, unsigned flags)
drivers/spi/spi-xtensa-xtfpga.c
58
xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
drivers/spi/spi-xtensa-xtfpga.c
59
xspi->data_sz += bits;
drivers/spi/spi-zynqmp-gqspi.c
1021
static unsigned long zynqmp_qspi_timeout(struct zynqmp_qspi *xqspi, u8 bits,
drivers/spi/spi-zynqmp-gqspi.c
1028
bits * xqspi->speed_hz);
drivers/staging/fbtft/fbtft-io.c
46
int bits, i, j;
drivers/staging/fbtft/fbtft-io.c
65
bits = 63;
drivers/staging/fbtft/fbtft-io.c
69
tmp |= dc << bits;
drivers/staging/fbtft/fbtft-io.c
70
bits -= 8;
drivers/staging/fbtft/fbtft-io.c
71
tmp |= val << bits--;
drivers/staging/iio/frequency/ad9834.c
55
#define RES_MASK(bits) (BIT(bits) - 1)
drivers/staging/media/atomisp/pci/runtime/isys/interface/ia_css_isys.h
81
unsigned int ia_css_isys_rx_translate_irq_infos(unsigned int bits);
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
102
unsigned int ia_css_isys_rx_translate_irq_infos(unsigned int bits)
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
106
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
108
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
110
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
112
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
114
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
116
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
118
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
120
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
122
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
124
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
126
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
128
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
130
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
132
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
134
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
136
if (bits & (1U << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT))
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
158
hrt_data bits = receiver_port_reg_load(RX0_ID,
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
16
hrt_data bits = receiver_port_reg_load(RX0_ID,
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
164
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
166
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_INIT_TIMEOUT_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
168
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_ENTRY_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
170
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_SLEEP_MODE_EXIT_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
172
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_CORRECTED_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
174
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_HS_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
176
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_SOT_SYNC_HS_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
178
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_CONTROL_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
180
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ECC_DOUBLE_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
182
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_CRC_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
184
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ID_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
186
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_SYNC_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
188
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_FRAME_DATA_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
190
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_DATA_TIMEOUT_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
192
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_ESCAPE_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
194
bits |= 1U << _HRT_CSS_RECEIVER_IRQ_ERR_LINE_SYNC_BIT;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
198
_HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, bits);
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
20
bits |= (1U << _HRT_CSS_RECEIVER_IRQ_OVERRUN_BIT) |
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
40
_HRT_CSS_RECEIVER_IRQ_ENABLE_REG_IDX, bits);
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
94
unsigned int bits;
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
97
bits = ia_css_isys_rx_get_interrupt_reg(port);
drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
98
*irq_infos = ia_css_isys_rx_translate_irq_infos(bits);
drivers/target/iscsi/iscsi_target_auth.c
215
int i, bits = 0, ac = 0;
drivers/target/iscsi/iscsi_target_auth.c
229
bits += 6;
drivers/target/iscsi/iscsi_target_auth.c
230
if (bits >= 8) {
drivers/target/iscsi/iscsi_target_auth.c
231
*cp++ = (ac >> (bits - 8)) & 0xff;
drivers/target/iscsi/iscsi_target_auth.c
232
ac &= ~(BIT(16) - BIT(bits - 8));
drivers/target/iscsi/iscsi_target_auth.c
233
bits -= 8;
drivers/thermal/intel/int340x_thermal/platform_temperature_control.c
134
mask = GENMASK_ULL(ptc_mmio_regs[index].shift + ptc_mmio_regs[index].bits - 1,
drivers/thermal/intel/int340x_thermal/platform_temperature_control.c
46
int bits;
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
18
int bits;
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
260
mask = GENMASK(mmio_regs[ret].shift + mmio_regs[ret].bits - 1, mmio_regs[ret].shift);\
drivers/thermal/intel/intel_hfi.c
560
nr_capabilities = hweight8(edx.split.capabilities.bits);
drivers/thermal/intel/intel_hfi.c
66
u8 bits;
drivers/thermal/uniphier_thermal.c
155
u32 bits = 0;
drivers/thermal/uniphier_thermal.c
159
bits |= PMALERTINTCTL_EN(i);
drivers/thermal/uniphier_thermal.c
163
PMALERTINTCTL_MASK, bits);
drivers/thermal/uniphier_thermal.c
210
u32 mask = 0, bits = 0;
drivers/thermal/uniphier_thermal.c
215
bits |= PMALERTINTCTL_CLR(i);
drivers/thermal/uniphier_thermal.c
220
tdev->data->map_base + PMALERTINTCTL, mask, bits);
drivers/tty/amiserial.c
120
static __inline__ void rtsdtr_ctrl(int bits)
drivers/tty/amiserial.c
122
ciab.pra = ((bits & (SER_RTS | SER_DTR)) ^ (SER_RTS | SER_DTR)) | (ciab.pra & ~(SER_RTS | SER_DTR));
drivers/tty/amiserial.c
572
int bits;
drivers/tty/amiserial.c
579
cval = 3; bits = 10;
drivers/tty/amiserial.c
582
bits++;
drivers/tty/amiserial.c
586
bits++;
drivers/tty/amiserial.c
630
info->timeout = (XMIT_FIFO_SIZE*HZ*bits*quot) / baud_base;
drivers/tty/mxser.c
1611
u8 irqbits, bits, mask = BIT(max) - 1;
drivers/tty/mxser.c
1619
for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
drivers/tty/mxser.c
1622
if (bits & irqbits)
drivers/tty/n_gsm.c
1805
u8 bits;
drivers/tty/n_gsm.c
1823
bits = *dp;
drivers/tty/n_gsm.c
1824
if ((bits & 1) == 0)
drivers/tty/n_gsm.c
1829
if (bits & 2)
drivers/tty/n_gsm.c
1831
if (bits & 4)
drivers/tty/n_gsm.c
1833
if (bits & 8)
drivers/tty/serial/21285.c
401
int *parity, int *bits)
drivers/tty/serial/21285.c
409
*bits = 5;
drivers/tty/serial/21285.c
412
*bits = 6;
drivers/tty/serial/21285.c
415
*bits = 7;
drivers/tty/serial/21285.c
419
*bits = 8;
drivers/tty/serial/21285.c
439
int bits = 8;
drivers/tty/serial/21285.c
449
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/21285.c
451
serial21285_get_options(port, &baud, &parity, &bits);
drivers/tty/serial/21285.c
453
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/8250/8250_bcm7271.c
260
int reg_type, int offset, u32 bits)
drivers/tty/serial/8250/8250_bcm7271.c
266
value |= bits;
drivers/tty/serial/8250/8250_bcm7271.c
271
int reg_type, int offset, u32 bits)
drivers/tty/serial/8250/8250_bcm7271.c
277
value &= ~bits;
drivers/tty/serial/8250/8250_ingenic.c
100
unsigned int parity, bits, flow; /* unused for now */
drivers/tty/serial/8250/8250_ingenic.c
102
uart_parse_options(opt, &baud, &parity, &bits, &flow);
drivers/tty/serial/8250/8250_port.c
1968
static bool wait_for_lsr(struct uart_8250_port *up, int bits)
drivers/tty/serial/8250/8250_port.c
1984
if ((status & bits) == bits)
drivers/tty/serial/8250/8250_port.c
1996
static void wait_for_xmitr(struct uart_8250_port *up, int bits)
drivers/tty/serial/8250/8250_port.c
2001
tx_ready = wait_for_lsr(up, bits);
drivers/tty/serial/8250/8250_port.c
2016
wait_for_lsr(up, bits);
drivers/tty/serial/8250/8250_port.c
3435
int bits = 8;
drivers/tty/serial/8250/8250_port.c
3444
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/8250/8250_port.c
3448
ret = uart_set_options(port, port->cons, baud, parity, bits, flow);
drivers/tty/serial/altera_uart.c
439
int bits = 8;
drivers/tty/serial/altera_uart.c
450
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/altera_uart.c
452
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/amba-pl010.c
576
int *parity, int *bits)
drivers/tty/serial/amba-pl010.c
591
*bits = 7;
drivers/tty/serial/amba-pl010.c
593
*bits = 8;
drivers/tty/serial/amba-pl010.c
605
int bits = 8;
drivers/tty/serial/amba-pl010.c
628
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/amba-pl010.c
630
pl010_console_get_options(uap, &baud, &parity, &bits);
drivers/tty/serial/amba-pl010.c
632
return uart_set_options(&uap->port, co, baud, parity, bits, flow);
drivers/tty/serial/amba-pl011.c
2164
unsigned int bits;
drivers/tty/serial/amba-pl011.c
2233
bits = tty_get_frame_size(termios->c_cflag);
drivers/tty/serial/amba-pl011.c
2247
uap->rs485_tx_drain_interval = ns_to_ktime(DIV_ROUND_UP(bits * NSEC_PER_SEC, baud));
drivers/tty/serial/amba-pl011.c
2465
int *parity, int *bits)
drivers/tty/serial/amba-pl011.c
2484
*bits = 7;
drivers/tty/serial/amba-pl011.c
2486
*bits = 8;
drivers/tty/serial/amba-pl011.c
2507
int bits = 8;
drivers/tty/serial/amba-pl011.c
2547
&baud, &parity, &bits, &flow);
drivers/tty/serial/amba-pl011.c
2549
pl011_console_get_options(uap, &baud, &parity, &bits);
drivers/tty/serial/amba-pl011.c
2552
return uart_set_options(&uap->port, co, baud, parity, bits, flow);
drivers/tty/serial/apbuart.c
422
int *parity, int *bits)
drivers/tty/serial/apbuart.c
437
*bits = 8;
drivers/tty/serial/apbuart.c
447
int bits = 8;
drivers/tty/serial/apbuart.c
467
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/apbuart.c
469
apbuart_console_get_options(port, &baud, &parity, &bits);
drivers/tty/serial/apbuart.c
471
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/ar933x_uart.c
721
int bits = 8;
drivers/tty/serial/ar933x_uart.c
733
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/ar933x_uart.c
735
return uart_set_options(&up->port, co, baud, parity, bits, flow);
drivers/tty/serial/arc_uart.c
480
int bits = 8;
drivers/tty/serial/arc_uart.c
496
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/arc_uart.c
502
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/atmel_serial.c
2611
int *parity, int *bits)
drivers/tty/serial/atmel_serial.c
2625
*bits = 8;
drivers/tty/serial/atmel_serial.c
2627
*bits = 7;
drivers/tty/serial/atmel_serial.c
2643
int bits = 8;
drivers/tty/serial/atmel_serial.c
2658
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/atmel_serial.c
2660
atmel_console_get_options(port, &baud, &parity, &bits);
drivers/tty/serial/atmel_serial.c
2662
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/bcm63xx_uart.c
735
int bits = 8;
drivers/tty/serial/bcm63xx_uart.c
745
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/bcm63xx_uart.c
747
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/clps711x.c
381
int baud = 38400, bits = 8, parity = 'n', flow = 'n';
drivers/tty/serial/clps711x.c
412
bits = 7;
drivers/tty/serial/clps711x.c
418
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/clps711x.c
420
ret = uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/cpm_uart.c
1393
int bits = 8;
drivers/tty/serial/cpm_uart.c
1434
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/cpm_uart.c
1465
uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/cpm_uart.c
575
unsigned int bits = tty_get_frame_size(termios->c_cflag);
drivers/tty/serial/cpm_uart.c
598
out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits - 1) | cval |
drivers/tty/serial/cpm_uart.c
601
unsigned int bits = tty_get_char_size(termios->c_cflag);
drivers/tty/serial/cpm_uart.c
605
out_be16(&sccp->scc_psmr, (UART_LCR_WLEN(bits) << 12) | scval);
drivers/tty/serial/digicolor-usart.c
418
int baud = 115200, bits = 8, parity = 'n', flow = 'n';
drivers/tty/serial/digicolor-usart.c
429
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/digicolor-usart.c
431
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/dz.c
887
int bits = 8;
drivers/tty/serial/dz.c
894
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/dz.c
895
return uart_set_options(uport, co, baud, parity, bits, flow);
drivers/tty/serial/fsl_linflexuart.c
665
linflex_console_get_options(struct uart_port *sport, int *parity, int *bits)
drivers/tty/serial/fsl_linflexuart.c
687
*bits = 9;
drivers/tty/serial/fsl_linflexuart.c
689
*bits = 8;
drivers/tty/serial/fsl_linflexuart.c
697
int bits = 8;
drivers/tty/serial/fsl_linflexuart.c
716
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/fsl_linflexuart.c
718
linflex_console_get_options(sport, &parity, &bits);
drivers/tty/serial/fsl_linflexuart.c
736
ret = uart_set_options(sport, co, baud, parity, bits, flow);
drivers/tty/serial/fsl_lpuart.c
1349
unsigned int bits = tty_get_frame_size(termios->c_cflag);
drivers/tty/serial/fsl_lpuart.c
1356
sport->rx_dma_rng_buf_len = (DMA_RX_TIMEOUT * baud / bits / 1000) * 2;
drivers/tty/serial/fsl_lpuart.c
2571
int *parity, int *bits)
drivers/tty/serial/fsl_lpuart.c
2594
*bits = 9;
drivers/tty/serial/fsl_lpuart.c
2596
*bits = 8;
drivers/tty/serial/fsl_lpuart.c
2620
int *parity, int *bits)
drivers/tty/serial/fsl_lpuart.c
2643
*bits = 9;
drivers/tty/serial/fsl_lpuart.c
2645
*bits = 8;
drivers/tty/serial/fsl_lpuart.c
2668
int bits = 8;
drivers/tty/serial/fsl_lpuart.c
2685
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/fsl_lpuart.c
2688
lpuart32_console_get_options(sport, &baud, &parity, &bits);
drivers/tty/serial/fsl_lpuart.c
2690
lpuart_console_get_options(sport, &baud, &parity, &bits);
drivers/tty/serial/fsl_lpuart.c
2697
return uart_set_options(&sport->port, co, baud, parity, bits, flow);
drivers/tty/serial/imx.c
2223
int *parity, int *bits)
drivers/tty/serial/imx.c
2243
*bits = 8;
drivers/tty/serial/imx.c
2245
*bits = 7;
drivers/tty/serial/imx.c
2285
int bits = 8;
drivers/tty/serial/imx.c
2309
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/imx.c
2311
imx_uart_console_get_options(sport, &baud, &parity, &bits);
drivers/tty/serial/imx.c
2315
retval = uart_set_options(&sport->port, co, baud, parity, bits, flow);
drivers/tty/serial/ip22zilog.c
1000
return uart_set_options(&up->port, con, baud, parity, bits, flow);
drivers/tty/serial/ip22zilog.c
982
int baud = 9600, bits = 8;
drivers/tty/serial/ip22zilog.c
999
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/lantiq.c
622
int bits = 8;
drivers/tty/serial/lantiq.c
641
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/lantiq.c
642
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/liteuart.c
393
int bits = 8;
drivers/tty/serial/liteuart.c
406
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/liteuart.c
408
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/lpc32xx_hs.c
156
int bits = 8;
drivers/tty/serial/lpc32xx_hs.c
168
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/lpc32xx_hs.c
172
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/ma35d1_serial.c
597
int bits = 8;
drivers/tty/serial/ma35d1_serial.c
626
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/ma35d1_serial.c
628
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/mcf.c
506
int bits = 8;
drivers/tty/serial/mcf.c
517
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/mcf.c
519
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/meson_uart.c
592
int bits = 8;
drivers/tty/serial/meson_uart.c
606
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/meson_uart.c
608
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/milbeaut_usio.c
425
int bits = 8;
drivers/tty/serial/milbeaut_usio.c
436
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/milbeaut_usio.c
441
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/mpc52xx_uart.c
1496
int *baud, int *parity, int *bits, int *flow)
drivers/tty/serial/mpc52xx_uart.c
1511
*bits = 5;
drivers/tty/serial/mpc52xx_uart.c
1514
*bits = 6;
drivers/tty/serial/mpc52xx_uart.c
1517
*bits = 7;
drivers/tty/serial/mpc52xx_uart.c
1521
*bits = 8;
drivers/tty/serial/mpc52xx_uart.c
1574
int bits = 8;
drivers/tty/serial/mpc52xx_uart.c
1625
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/mpc52xx_uart.c
1627
mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
drivers/tty/serial/mpc52xx_uart.c
1630
baud, bits, parity, flow);
drivers/tty/serial/mpc52xx_uart.c
1632
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/mps2-uart.c
436
int bits = 8;
drivers/tty/serial/mps2-uart.c
449
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/mps2-uart.c
451
return uart_set_options(&mps_port->port, co, baud, parity, bits, flow);
drivers/tty/serial/msm_serial.c
1693
int bits = 8;
drivers/tty/serial/msm_serial.c
1708
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/msm_serial.c
1712
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/mvebu-uart.c
766
int bits = 8;
drivers/tty/serial/mvebu-uart.c
781
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/mvebu-uart.c
783
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/mxs-auart.c
1356
int *parity, int *bits)
drivers/tty/serial/mxs-auart.c
1375
*bits = 7;
drivers/tty/serial/mxs-auart.c
1377
*bits = 8;
drivers/tty/serial/mxs-auart.c
1394
int bits = 8;
drivers/tty/serial/mxs-auart.c
1415
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/mxs-auart.c
1417
auart_console_get_options(s, &baud, &parity, &bits);
drivers/tty/serial/mxs-auart.c
1419
ret = uart_set_options(&s->port, co, baud, parity, bits, flow);
drivers/tty/serial/omap-serial.c
1252
int bits = 8;
drivers/tty/serial/omap-serial.c
1261
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/omap-serial.c
1263
return uart_set_options(&up->port, co, baud, parity, bits, flow);
drivers/tty/serial/owl-uart.c
559
int bits = 8;
drivers/tty/serial/owl-uart.c
571
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/owl-uart.c
573
return uart_set_options(&owl_port->port, co, baud, parity, bits, flow);
drivers/tty/serial/pch_uart.c
1299
unsigned int baud, parity, bits, stb;
drivers/tty/serial/pch_uart.c
1306
bits = PCH_UART_HAL_5BIT;
drivers/tty/serial/pch_uart.c
1309
bits = PCH_UART_HAL_6BIT;
drivers/tty/serial/pch_uart.c
1312
bits = PCH_UART_HAL_7BIT;
drivers/tty/serial/pch_uart.c
1315
bits = PCH_UART_HAL_8BIT;
drivers/tty/serial/pch_uart.c
1345
rtn = pch_uart_hal_set_line(priv, baud, parity, bits, stb);
drivers/tty/serial/pch_uart.c
1438
static void wait_for_xmitr(struct eg20t_port *up, int bits)
drivers/tty/serial/pch_uart.c
1446
if ((status & bits) == bits)
drivers/tty/serial/pch_uart.c
1594
int bits = 8;
drivers/tty/serial/pch_uart.c
1613
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/pch_uart.c
1615
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/pch_uart.c
428
unsigned int parity, unsigned int bits,
drivers/tty/serial/pch_uart.c
448
if (bits & ~PCH_UART_LCR_WLS) {
drivers/tty/serial/pch_uart.c
449
dev_err(priv->port.dev, "Invalid bits(0x%x)\n", bits);
drivers/tty/serial/pch_uart.c
459
lcr |= bits;
drivers/tty/serial/pic32_uart.c
796
int bits = 8;
drivers/tty/serial/pic32_uart.c
813
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/pic32_uart.c
815
return uart_set_options(&sport->port, co, baud, parity, bits, flow);
drivers/tty/serial/pmac_zilog.c
1901
int bits = 8;
drivers/tty/serial/pmac_zilog.c
1949
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/pmac_zilog.c
1951
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/pxa.c
683
int bits = 8;
drivers/tty/serial/pxa.c
694
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/pxa.c
696
return uart_set_options(&up->port, co, baud, parity, bits, flow);
drivers/tty/serial/qcom_geni_serial.c
1463
int bits = 8;
drivers/tty/serial/qcom_geni_serial.c
1489
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/qcom_geni_serial.c
1491
return uart_set_options(uport, co, baud, parity, bits, flow);
drivers/tty/serial/rda-uart.c
626
int bits = 8;
drivers/tty/serial/rda-uart.c
638
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/rda-uart.c
640
return uart_set_options(&rda_port->port, co, baud, parity, bits, flow);
drivers/tty/serial/sa1100.c
717
int *parity, int *bits)
drivers/tty/serial/sa1100.c
737
*bits = 8;
drivers/tty/serial/sa1100.c
739
*bits = 7;
drivers/tty/serial/sa1100.c
752
int bits = 8;
drivers/tty/serial/sa1100.c
766
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sa1100.c
768
sa1100_console_get_options(sport, &baud, &parity, &bits);
drivers/tty/serial/sa1100.c
770
return uart_set_options(&sport->port, co, baud, parity, bits, flow);
drivers/tty/serial/samsung_tty.c
2280
int *parity, int *bits)
drivers/tty/serial/samsung_tty.c
2295
*bits = 5;
drivers/tty/serial/samsung_tty.c
2298
*bits = 6;
drivers/tty/serial/samsung_tty.c
2301
*bits = 7;
drivers/tty/serial/samsung_tty.c
2305
*bits = 8;
drivers/tty/serial/samsung_tty.c
2345
int bits = 8;
drivers/tty/serial/samsung_tty.c
2369
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/samsung_tty.c
2371
s3c24xx_serial_get_options(port, &baud, &parity, &bits);
drivers/tty/serial/samsung_tty.c
2375
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/sb1250-duart.c
868
int bits = 8;
drivers/tty/serial/sb1250-duart.c
883
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sb1250-duart.c
884
return uart_set_options(uport, co, baud, parity, bits, flow);
drivers/tty/serial/sccnxp.c
861
int baud = 9600, bits = 8, parity = 'n', flow = 'n';
drivers/tty/serial/sccnxp.c
864
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sccnxp.c
866
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/serial_core.c
2160
int *bits, int *flow)
drivers/tty/serial/serial_core.c
2170
*bits = *s++ - '0';
drivers/tty/serial/serial_core.c
2190
int baud, int parity, int bits, int flow)
drivers/tty/serial/serial_core.c
2210
if (bits == 7)
drivers/tty/serial/serial_core.c
2596
int bits = 8;
drivers/tty/serial/serial_core.c
2623
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/serial_core.c
2625
ret = uart_set_options(port, NULL, baud, parity, bits, flow);
drivers/tty/serial/serial_txx9.c
878
int bits = 8;
drivers/tty/serial/serial_txx9.c
896
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/serial_txx9.c
898
return uart_set_options(up, co, baud, parity, bits, flow);
drivers/tty/serial/sh-sci.c
1256
unsigned int bits;
drivers/tty/serial/sh-sci.c
1272
bits = 0;
drivers/tty/serial/sh-sci.c
1275
bits = SCFCR_RTRG0;
drivers/tty/serial/sh-sci.c
1278
bits = SCFCR_RTRG1;
drivers/tty/serial/sh-sci.c
1281
bits = SCFCR_RTRG0 | SCFCR_RTRG1;
drivers/tty/serial/sh-sci.c
1288
bits = 0;
drivers/tty/serial/sh-sci.c
1291
bits = SCFCR_RTRG0;
drivers/tty/serial/sh-sci.c
1294
bits = SCFCR_RTRG1;
drivers/tty/serial/sh-sci.c
1297
bits = SCFCR_RTRG0 | SCFCR_RTRG1;
drivers/tty/serial/sh-sci.c
1308
~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits);
drivers/tty/serial/sh-sci.c
2682
unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i, bits;
drivers/tty/serial/sh-sci.c
2811
bits = tty_get_frame_size(termios->c_cflag);
drivers/tty/serial/sh-sci.c
2837
int last_stop = bits * 2 - 1;
drivers/tty/serial/sh-sci.c
2918
s->rx_frame = (10000 * bits) / (baud / 100);
drivers/tty/serial/sh-sci.c
3412
unsigned int bits;
drivers/tty/serial/sh-sci.c
3433
bits = sci_port->params->param_bits->poll_sent_bits;
drivers/tty/serial/sh-sci.c
3435
while ((sci_port->ops->read_reg(port, regs->status) & bits) != bits)
drivers/tty/serial/sh-sci.c
3453
int bits = 8;
drivers/tty/serial/sh-sci.c
3478
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sh-sci.c
3480
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/sifive.c
878
int bits = 8;
drivers/tty/serial/sifive.c
892
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sifive.c
894
return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
drivers/tty/serial/sprd_serial.c
1018
int bits = 8;
drivers/tty/serial/sprd_serial.c
1032
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sprd_serial.c
1035
parity, bits, flow);
drivers/tty/serial/st-asc.c
882
int bits = 8;
drivers/tty/serial/st-asc.c
901
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/st-asc.c
903
return uart_set_options(&ascport->port, co, baud, parity, bits, flow);
drivers/tty/serial/stm32-usart.c
1159
unsigned int baud, bits, uart_clk, uart_clk_pres;
drivers/tty/serial/stm32-usart.c
120
static void stm32_usart_set_bits(struct uart_port *port, u32 reg, u32 bits)
drivers/tty/serial/stm32-usart.c
1210
bits = tty_get_char_size(cflag);
drivers/tty/serial/stm32-usart.c
1211
stm32_port->rdr_mask = (BIT(bits) - 1);
drivers/tty/serial/stm32-usart.c
1214
bits++;
drivers/tty/serial/stm32-usart.c
1225
if (bits == 9) {
drivers/tty/serial/stm32-usart.c
1227
} else if ((bits == 7) && cfg->has_7bits_data) {
drivers/tty/serial/stm32-usart.c
1229
} else if (bits != 8) {
drivers/tty/serial/stm32-usart.c
1231
, bits);
drivers/tty/serial/stm32-usart.c
1235
bits = 8;
drivers/tty/serial/stm32-usart.c
1237
bits++;
drivers/tty/serial/stm32-usart.c
1246
bits = bits + 3; /* 1 start bit + 2 stop bits */
drivers/tty/serial/stm32-usart.c
1248
bits = bits + 2; /* 1 start bit + 1 stop bit */
drivers/tty/serial/stm32-usart.c
125
val |= bits;
drivers/tty/serial/stm32-usart.c
1252
writel_relaxed(bits, port->membase + ofs->rtor);
drivers/tty/serial/stm32-usart.c
129
static void stm32_usart_clr_bits(struct uart_port *port, u32 reg, u32 bits)
drivers/tty/serial/stm32-usart.c
134
val &= ~bits;
drivers/tty/serial/stm32-usart.c
1961
int bits = 8;
drivers/tty/serial/stm32-usart.c
1980
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/stm32-usart.c
1982
return uart_set_options(&stm32port->port, co, baud, parity, bits, flow);
drivers/tty/serial/suncore.c
123
bits = simple_strtoul(++s, NULL, 0);
drivers/tty/serial/suncore.c
148
switch (bits) {
drivers/tty/serial/suncore.c
89
int baud, bits, stop, cflag;
drivers/tty/serial/sunplus-uart.c
533
int bits = 8;
drivers/tty/serial/sunplus-uart.c
545
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/sunplus-uart.c
547
return uart_set_options(&sup->port, co, baud, parity, bits, flow);
drivers/tty/serial/uartlite.c
530
int bits = 8;
drivers/tty/serial/uartlite.c
552
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/uartlite.c
554
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/vt8500_serial.c
498
int bits = 8;
drivers/tty/serial/vt8500_serial.c
511
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/vt8500_serial.c
514
co, baud, parity, bits, flow);
drivers/tty/serial/xilinx_uartps.c
1420
int bits = 8;
drivers/tty/serial/xilinx_uartps.c
1432
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/xilinx_uartps.c
1441
return uart_set_options(port, co, baud, parity, bits, flow);
drivers/tty/serial/zs.c
1183
int bits = 8;
drivers/tty/serial/zs.c
1190
uart_parse_options(options, &baud, &parity, &bits, &flow);
drivers/tty/serial/zs.c
1191
return uart_set_options(uport, co, baud, parity, bits, flow);
drivers/tty/tty_ioctl.c
296
unsigned char bits = 2 + tty_get_char_size(cflag);
drivers/tty/tty_ioctl.c
299
bits++;
drivers/tty/tty_ioctl.c
301
bits++;
drivers/tty/tty_ioctl.c
303
bits++;
drivers/tty/tty_ioctl.c
305
return bits;
drivers/ufs/host/ufs-sprd.c
32
unsigned int reg, unsigned int bits, unsigned int val)
drivers/ufs/host/ufs-sprd.c
34
regmap_update_bits(priv->sysci[index].regmap, reg, bits, val);
drivers/usb/c67x00/c67x00-ll-hpi.c
268
void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits)
drivers/usb/c67x00/c67x00-ll-hpi.c
270
hpi_write_word(sie->dev, USB_STAT_REG(sie->sie_num), bits);
drivers/usb/c67x00/c67x00.h
256
void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits);
drivers/usb/core/hub.c
778
unsigned long bits;
drivers/usb/core/hub.c
796
bits = 0;
drivers/usb/core/hub.c
798
bits |= ((unsigned long) ((*hub->buffer)[i]))
drivers/usb/core/hub.c
800
hub->event_bits[0] = bits;
drivers/usb/gadget/function/uvc_configfs.c
1849
#define UVCG_STREAMING_HEADER_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
1865
result = sprintf(page, "%u\n", le##bits##_to_cpu(sh->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
187
#define UVCG_CTRL_HDR_ATTR(cname, aname, bits, limit) \
drivers/usb/gadget/function/uvc_configfs.c
1934
#define UVCG_FRAME_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
1967
ret = kstrtou##bits(page, 0, &num); \
drivers/usb/gadget/function/uvc_configfs.c
203
result = sprintf(page, "%u\n", le##bits##_to_cpu(ch->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
219
u##bits num; \
drivers/usb/gadget/function/uvc_configfs.c
232
ret = kstrtou##bits(page, 0, &num); \
drivers/usb/gadget/function/uvc_configfs.c
2334
#define UVCG_UNCOMPRESSED_ATTR_RO(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2350
result = sprintf(page, "%u\n", le##bits##_to_cpu(u->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
2359
#define UVCG_UNCOMPRESSED_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2375
result = sprintf(page, "%u\n", le##bits##_to_cpu(u->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
240
ch->desc.aname = cpu_to_le##bits(num); \
drivers/usb/gadget/function/uvc_configfs.c
2533
#define UVCG_MJPEG_ATTR_RO(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2548
result = sprintf(page, "%u\n", le##bits##_to_cpu(u->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
2557
#define UVCG_MJPEG_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2572
result = sprintf(page, "%u\n", le##bits##_to_cpu(u->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
2723
#define UVCG_FRAMEBASED_ATTR_RO(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2739
result = sprintf(page, "%u\n", le##bits##_to_cpu(u->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
2748
#define UVCG_FRAMEBASED_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2764
result = sprintf(page, "%u\n", le##bits##_to_cpu(u->desc.aname));\
drivers/usb/gadget/function/uvc_configfs.c
2973
#define UVCG_COLOR_MATCHING_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
2992
le##bits##_to_cpu(color_match->desc.aname)); \
drivers/usb/gadget/function/uvc_configfs.c
3009
u##bits num; \
drivers/usb/gadget/function/uvc_configfs.c
3011
ret = kstrtou##bits(page, 0, &num); \
drivers/usb/gadget/function/uvc_configfs.c
305
#define UVCG_DEFAULT_PROCESSING_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
323
result = sprintf(page, "%u\n", le##bits##_to_cpu(pd->aname)); \
drivers/usb/gadget/function/uvc_configfs.c
466
#define UVCG_DEFAULT_CAMERA_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
485
result = sprintf(page, "%u\n", le##bits##_to_cpu(cd->aname)); \
drivers/usb/gadget/function/uvc_configfs.c
639
#define UVCG_DEFAULT_OUTPUT_ATTR(cname, aname, bits) \
drivers/usb/gadget/function/uvc_configfs.c
658
result = sprintf(page, "%u\n", le##bits##_to_cpu(cd->aname)); \
drivers/usb/gadget/udc/fsl_udc_core.c
1076
u32 bits;
drivers/usb/gadget/udc/fsl_udc_core.c
1091
bits = (1 << 16) | 1;
drivers/usb/gadget/udc/fsl_udc_core.c
1093
bits = 1 << (16 + ep_num);
drivers/usb/gadget/udc/fsl_udc_core.c
1095
bits = 1 << ep_num;
drivers/usb/gadget/udc/fsl_udc_core.c
1099
fsl_writel(bits, &dr_regs->endptflush);
drivers/usb/gadget/udc/fsl_udc_core.c
1111
} while (fsl_readl(&dr_regs->endptstatus) & bits);
drivers/usb/gadget/udc/renesas_usb3.c
414
static void usb3_set_bit(struct renesas_usb3 *usb3, u32 bits, u32 offs)
drivers/usb/gadget/udc/renesas_usb3.c
418
val |= bits;
drivers/usb/gadget/udc/renesas_usb3.c
422
static void usb3_clear_bit(struct renesas_usb3 *usb3, u32 bits, u32 offs)
drivers/usb/gadget/udc/renesas_usb3.c
426
val &= ~bits;
drivers/usb/gadget/udc/renesas_usb3.c
454
static void usb3_drd_set_bit(struct renesas_usb3 *usb3, u32 bits, u32 offs)
drivers/usb/gadget/udc/renesas_usb3.c
458
val |= bits;
drivers/usb/gadget/udc/renesas_usb3.c
462
static void usb3_drd_clear_bit(struct renesas_usb3 *usb3, u32 bits, u32 offs)
drivers/usb/gadget/udc/renesas_usb3.c
466
val &= ~bits;
drivers/usb/gadget/udc/renesas_usb3.c
496
static void usb3_enable_irq_1(struct renesas_usb3 *usb3, u32 bits)
drivers/usb/gadget/udc/renesas_usb3.c
498
usb3_set_bit(usb3, bits, USB3_USB_INT_ENA_1);
drivers/usb/gadget/udc/renesas_usb3.c
501
static void usb3_disable_irq_1(struct renesas_usb3 *usb3, u32 bits)
drivers/usb/gadget/udc/renesas_usb3.c
503
usb3_clear_bit(usb3, bits, USB3_USB_INT_ENA_1);
drivers/usb/gadget/udc/renesas_usb3.c
549
u32 bits = USB20_CON_B2_PUE | USB20_CON_B2_CONNECT;
drivers/usb/gadget/udc/renesas_usb3.c
552
usb3_set_bit(usb3, bits, USB3_USB20_CON);
drivers/usb/gadget/udc/renesas_usb3.c
554
usb3_clear_bit(usb3, bits, USB3_USB20_CON);
drivers/usb/gadget/udc/renesas_usb3.c
610
u32 bits = SSIFCMD_UDIR_U2 | SSIFCMD_UREQ_U2;
drivers/usb/gadget/udc/renesas_usb3.c
614
usb3_clear_bit(usb3, bits, USB3_SSIFCMD);
drivers/usb/gadget/udc/renesas_usb3.c
616
usb3_set_bit(usb3, bits, USB3_SSIFCMD);
drivers/usb/gadget/udc/renesas_usb3.c
621
u32 bits = SSIFCMD_UDIR_U1 | SSIFCMD_UREQ_U1;
drivers/usb/gadget/udc/renesas_usb3.c
625
usb3_clear_bit(usb3, bits, USB3_SSIFCMD);
drivers/usb/gadget/udc/renesas_usb3.c
627
usb3_set_bit(usb3, bits, USB3_SSIFCMD);
drivers/usb/gadget/udc/rzv2m_usb3drd.c
21
static void rzv2m_usb3drd_set_bit(struct rzv2m_usb3drd *usb3, u32 bits,
drivers/usb/gadget/udc/rzv2m_usb3drd.c
26
val |= bits;
drivers/usb/gadget/udc/rzv2m_usb3drd.c
30
static void rzv2m_usb3drd_clear_bit(struct rzv2m_usb3drd *usb3, u32 bits,
drivers/usb/gadget/udc/rzv2m_usb3drd.c
35
val &= ~bits;
drivers/usb/host/fhci-hcd.c
151
u8 bits = 0;
drivers/usb/host/fhci-hcd.c
159
bits |= 0x2;
drivers/usb/host/fhci-hcd.c
163
bits |= 0x1;
drivers/usb/host/fhci-hcd.c
165
return bits;
drivers/usb/mtu3/mtu3.h
409
static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
drivers/usb/mtu3/mtu3.h
414
writel((tmp | (bits)), addr);
drivers/usb/mtu3/mtu3.h
417
static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
drivers/usb/mtu3/mtu3.h
422
writel((tmp & ~(bits)), addr);
drivers/usb/mtu3/mtu3_core.c
55
u32 bits = mep->fifo_size / MTU3_EP_FIFO_UNIT;
drivers/usb/mtu3/mtu3_core.c
58
if (unlikely(addr < fifo->base || bits > fifo->limit))
drivers/usb/mtu3/mtu3_core.c
62
bitmap_clear(fifo->bitmap, start_bit, bits);
drivers/usb/serial/console.c
59
int bits = 8;
drivers/usb/serial/console.c
78
bits = *s++ - '0';
drivers/usb/serial/console.c
87
switch (bits) {
drivers/usb/serial/cp210x.c
1260
u16 bits;
drivers/usb/serial/cp210x.c
1276
bits = 0;
drivers/usb/serial/cp210x.c
1280
bits |= BITS_DATA_5;
drivers/usb/serial/cp210x.c
1283
bits |= BITS_DATA_6;
drivers/usb/serial/cp210x.c
1286
bits |= BITS_DATA_7;
drivers/usb/serial/cp210x.c
1290
bits |= BITS_DATA_8;
drivers/usb/serial/cp210x.c
1297
bits |= BITS_PARITY_MARK;
drivers/usb/serial/cp210x.c
1299
bits |= BITS_PARITY_SPACE;
drivers/usb/serial/cp210x.c
1302
bits |= BITS_PARITY_ODD;
drivers/usb/serial/cp210x.c
1304
bits |= BITS_PARITY_EVEN;
drivers/usb/serial/cp210x.c
1309
bits |= BITS_STOP_2;
drivers/usb/serial/cp210x.c
1311
bits |= BITS_STOP_1;
drivers/usb/serial/cp210x.c
1313
ret = cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits);
drivers/usb/serial/ftdi_sio.c
1853
unsigned long *bits)
drivers/usb/serial/ftdi_sio.c
1862
*bits = result & *mask;
drivers/usb/serial/ftdi_sio.c
1868
unsigned long *bits)
drivers/usb/serial/ftdi_sio.c
1877
priv->gpio_value |= *bits & *mask;
drivers/usb/serial/io_edgeport.c
499
struct edge_compatibility_bits *bits;
drivers/usb/serial/io_edgeport.c
529
bits = &ep->epic_descriptor.Supports;
drivers/usb/serial/io_edgeport.c
531
dev_dbg(dev, " VendEnableSuspend: %s\n", bits->VendEnableSuspend ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
532
dev_dbg(dev, " IOSPOpen : %s\n", bits->IOSPOpen ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
533
dev_dbg(dev, " IOSPClose : %s\n", bits->IOSPClose ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
534
dev_dbg(dev, " IOSPChase : %s\n", bits->IOSPChase ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
535
dev_dbg(dev, " IOSPSetRxFlow : %s\n", bits->IOSPSetRxFlow ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
536
dev_dbg(dev, " IOSPSetTxFlow : %s\n", bits->IOSPSetTxFlow ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
537
dev_dbg(dev, " IOSPSetXChar : %s\n", bits->IOSPSetXChar ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
538
dev_dbg(dev, " IOSPRxCheck : %s\n", bits->IOSPRxCheck ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
539
dev_dbg(dev, " IOSPSetClrBreak : %s\n", bits->IOSPSetClrBreak ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
540
dev_dbg(dev, " IOSPWriteMCR : %s\n", bits->IOSPWriteMCR ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
541
dev_dbg(dev, " IOSPWriteLCR : %s\n", bits->IOSPWriteLCR ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
542
dev_dbg(dev, " IOSPSetBaudRate : %s\n", bits->IOSPSetBaudRate ? "TRUE": "FALSE");
drivers/usb/serial/io_edgeport.c
543
dev_dbg(dev, " TrueEdgeport : %s\n", bits->TrueEdgeport ? "TRUE": "FALSE");
drivers/usb/serial/whiteheat.c
619
port_settings.bits = tty_get_char_size(cflag);
drivers/usb/serial/whiteheat.c
620
dev_dbg(dev, "%s - data bits = %d\n", __func__, port_settings.bits);
drivers/usb/serial/whiteheat.h
92
__u8 bits; /* 5, 6, 7, or 8 */
drivers/usb/serial/xr_serial.c
696
u8 bits = 0;
drivers/usb/serial/xr_serial.c
713
bits |= XR_UART_DATA_7;
drivers/usb/serial/xr_serial.c
715
bits |= XR_UART_DATA_8;
drivers/usb/serial/xr_serial.c
718
bits |= XR_UART_DATA_7;
drivers/usb/serial/xr_serial.c
722
bits |= XR_UART_DATA_8;
drivers/usb/serial/xr_serial.c
729
bits |= XR_UART_PARITY_MARK;
drivers/usb/serial/xr_serial.c
731
bits |= XR_UART_PARITY_SPACE;
drivers/usb/serial/xr_serial.c
734
bits |= XR_UART_PARITY_ODD;
drivers/usb/serial/xr_serial.c
736
bits |= XR_UART_PARITY_EVEN;
drivers/usb/serial/xr_serial.c
741
bits |= XR_UART_STOP_2;
drivers/usb/serial/xr_serial.c
743
bits |= XR_UART_STOP_1;
drivers/usb/serial/xr_serial.c
745
ret = xr_set_reg_uart(port, XR21V141X_REG_FORMAT, bits);
drivers/usb/storage/alauda.c
248
unsigned char par = 0, bit, bits[8] = {0};
drivers/usb/storage/alauda.c
256
bits[j] ^= bit;
drivers/usb/storage/alauda.c
260
a = (bits[3] << 6) + (bits[2] << 4) + (bits[1] << 2) + bits[0];
drivers/usb/storage/alauda.c
263
a = (bits[7] << 6) + (bits[6] << 4) + (bits[5] << 2) + bits[4];
drivers/usb/storage/sddr09.c
214
unsigned char par = 0, bit, bits[8] = {0};
drivers/usb/storage/sddr09.c
222
bits[j] ^= bit;
drivers/usb/storage/sddr09.c
226
a = (bits[3] << 6) + (bits[2] << 4) + (bits[1] << 2) + bits[0];
drivers/usb/storage/sddr09.c
229
a = (bits[7] << 6) + (bits[6] << 4) + (bits[5] << 2) + bits[4];
drivers/vfio/pci/vfio_pci_config.c
1423
int bits;
drivers/vfio/pci/vfio_pci_config.c
1431
bits = byte ? round_up(byte, 32) : 256;
drivers/vfio/pci/vfio_pci_config.c
1432
return 8 + (bits / 8);
drivers/video/fbdev/amifb.c
1853
short height, width, bits, words;
drivers/video/fbdev/amifb.c
1871
bits = 0; words = delta; datawords = 0;
drivers/video/fbdev/amifb.c
1873
if (bits == 0) {
drivers/video/fbdev/amifb.c
1874
bits = 16; --words;
drivers/video/fbdev/amifb.c
1882
--bits;
drivers/video/fbdev/amifb.c
1896
if (bits > 0) {
drivers/video/fbdev/amifb.c
1927
short height, width, bits, words;
drivers/video/fbdev/amifb.c
1959
bits = 16; words = delta; datawords = 0;
drivers/video/fbdev/amifb.c
1976
if (--bits == 0) {
drivers/video/fbdev/amifb.c
1977
bits = 16; --words;
drivers/video/fbdev/amifb.c
1987
if (bits < 16) {
drivers/video/fbdev/amifb.c
1993
: "=a" (lspr) : "0" (lspr), "d" (datawords), "d" (delta), "d" (bits));
drivers/video/fbdev/amifb.c
1995
*(lspr + delta) = (u_short) (datawords >> (16 + bits));
drivers/video/fbdev/amifb.c
1996
*lspr++ = (u_short) ((datawords & 0x0000ffff) >> bits);
drivers/video/fbdev/au1200fb.c
655
int bits = 0;
drivers/video/fbdev/au1200fb.c
660
bits = 1;
drivers/video/fbdev/au1200fb.c
663
bits = 2;
drivers/video/fbdev/au1200fb.c
666
bits = 4;
drivers/video/fbdev/au1200fb.c
669
bits = 8;
drivers/video/fbdev/au1200fb.c
679
bits = 16;
drivers/video/fbdev/au1200fb.c
683
bits = 32;
drivers/video/fbdev/au1200fb.c
687
return bits;
drivers/video/fbdev/core/cfbmem.h
11
int bits;
drivers/video/fbdev/core/cfbmem.h
21
ptr.bits = (base - ptr.address) * BITS_PER_BYTE;
drivers/video/fbdev/core/fb_copyarea.h
102
first = fb_pixel_mask(dst->bits, reverse);
drivers/video/fbdev/core/fb_copyarea.h
146
fb_copy_aligned_rev(dst, src, width + dst->bits, reverse);
drivers/video/fbdev/core/fb_copyarea.h
152
fb_copy_aligned_fwd(dst, src, width + dst->bits, reverse);
drivers/video/fbdev/core/fb_copyarea.h
166
int end = dst->bits + width;
drivers/video/fbdev/core/fb_copyarea.h
169
first = fb_pixel_mask(dst->bits, reverse);
drivers/video/fbdev/core/fb_copyarea.h
172
shift = dst->bits - src->bits;
drivers/video/fbdev/core/fb_copyarea.h
181
if (src->bits + width > BITS_PER_LONG)
drivers/video/fbdev/core/fb_copyarea.h
244
if (src->bits + width
drivers/video/fbdev/core/fb_copyarea.h
263
first = fb_pixel_mask(dst->bits, reverse);
drivers/video/fbdev/core/fb_copyarea.h
266
shift = dst->bits - src->bits;
drivers/video/fbdev/core/fb_copyarea.h
277
if (src->bits > left)
drivers/video/fbdev/core/fb_copyarea.h
282
if (src->bits + end - dst->bits > BITS_PER_LONG)
drivers/video/fbdev/core/fb_copyarea.h
341
if (src->bits > left)
drivers/video/fbdev/core/fb_copyarea.h
356
int move = src->bits < dst->bits ? -1 : 0;
drivers/video/fbdev/core/fb_copyarea.h
359
fb_copy_rev(dst, src, width + dst->bits, reorder, reverse);
drivers/video/fbdev/core/fb_copyarea.h
366
int move = src->bits > dst->bits ? 1 : 0;
drivers/video/fbdev/core/fb_copyarea.h
396
if (src.bits == dst.bits)
drivers/video/fbdev/core/fb_copyarea.h
399
!((src.bits ^ dst.bits) & (BITS_PER_BYTE-1)))) {
drivers/video/fbdev/core/fb_copyarea.h
56
first = fb_pixel_mask(dst->bits, reverse);
drivers/video/fbdev/core/fb_draw.h
24
unsigned int bits = (unsigned int)adr->bits + offset;
drivers/video/fbdev/core/fb_draw.h
26
adr->bits = bits & (BITS_PER_LONG - 1u);
drivers/video/fbdev/core/fb_draw.h
27
adr->address += (bits & ~(BITS_PER_LONG - 1u)) / BITS_PER_BYTE;
drivers/video/fbdev/core/fb_draw.h
33
int bits = adr->bits - (int)offset;
drivers/video/fbdev/core/fb_draw.h
35
adr->bits = bits & (BITS_PER_LONG - 1);
drivers/video/fbdev/core/fb_draw.h
36
if (bits < 0)
drivers/video/fbdev/core/fb_draw.h
37
adr->address -= (adr->bits - bits) / BITS_PER_BYTE;
drivers/video/fbdev/core/fb_draw.h
39
adr->address += (bits - adr->bits) / BITS_PER_BYTE;
drivers/video/fbdev/core/fb_fillrect.h
113
end += dst->bits;
drivers/video/fbdev/core/fb_fillrect.h
114
first = fb_pixel_mask(dst->bits, pattern->reverse);
drivers/video/fbdev/core/fb_fillrect.h
162
end += dst->bits;
drivers/video/fbdev/core/fb_fillrect.h
163
first = fb_pixel_mask(dst->bits, pattern->reverse);
drivers/video/fbdev/core/fb_fillrect.h
244
pattern->pixels = fb_rotate(pat, dst->bits, bpp);
drivers/video/fbdev/core/fb_fillrect.h
250
pattern->pixels = fb_rotate(pat, dst->bits, bpp);
drivers/video/fbdev/core/fb_imageblit.h
104
*bits = iter->bpp * iter->i;
drivers/video/fbdev/core/fb_imageblit.h
114
*bits = iter->bpp * BITS_PER_BYTE/2;
drivers/video/fbdev/core/fb_imageblit.h
121
*pixels <<= BITS_PER_LONG - *bits;
drivers/video/fbdev/core/fb_imageblit.h
128
int *bits),
drivers/video/fbdev/core/fb_imageblit.h
129
void *iter, int bits, struct fb_address *dst,
drivers/video/fbdev/core/fb_imageblit.h
134
int shift = dst->bits;
drivers/video/fbdev/core/fb_imageblit.h
145
while (get(iter, &pixels, &bits)) {
drivers/video/fbdev/core/fb_imageblit.h
147
shift += bits;
drivers/video/fbdev/core/fb_imageblit.h
155
val = !shift ? 0 : fb_left(pixels, bits - shift);
drivers/video/fbdev/core/fb_imageblit.h
161
if (offset || !dst->bits)
drivers/video/fbdev/core/fb_imageblit.h
327
static inline unsigned long fb_pack(unsigned long left, unsigned long right, int bits)
drivers/video/fbdev/core/fb_imageblit.h
330
return left | right << bits;
drivers/video/fbdev/core/fb_imageblit.h
332
return right | left << bits;
drivers/video/fbdev/core/fb_imageblit.h
37
static bool fb_bitmap_image(void *iterator, unsigned long *pixels, int *bits)
drivers/video/fbdev/core/fb_imageblit.h
455
if (!dst->bits && !(bits_per_line & (BITS_PER_LONG-1))) {
drivers/video/fbdev/core/fb_imageblit.h
62
static bool fb_color_image(void *iterator, unsigned long *pixels, int *bits)
drivers/video/fbdev/core/fb_imageblit.h
91
static bool fb_bitmap4x_image(void *iterator, unsigned long *pixels, int *bits)
drivers/video/fbdev/core/sysmem.h
11
int bits;
drivers/video/fbdev/core/sysmem.h
21
ptr.bits = (base - ptr.address) * BITS_PER_BYTE;
drivers/video/fbdev/omap/sossi.c
102
static void sossi_set_bits(int reg, u32 bits)
drivers/video/fbdev/omap/sossi.c
104
sossi_write_reg(reg, sossi_read_reg(reg) | bits);
drivers/video/fbdev/omap/sossi.c
107
static void sossi_clear_bits(int reg, u32 bits)
drivers/video/fbdev/omap/sossi.c
109
sossi_write_reg(reg, sossi_read_reg(reg) & ~bits);
drivers/video/fbdev/smscufx.c
213
static int ufx_reg_set_bits(struct ufx_data *dev, u32 index, u32 bits)
drivers/video/fbdev/smscufx.c
215
return ufx_reg_clear_and_set_bits(dev, index, 0, bits);
drivers/video/fbdev/smscufx.c
218
static int ufx_reg_clear_bits(struct ufx_data *dev, u32 index, u32 bits)
drivers/video/fbdev/smscufx.c
220
return ufx_reg_clear_and_set_bits(dev, index, bits, 0);
drivers/video/fbdev/smscufx.c
43
#define all_bits_set(x, bits) (((x) & (bits)) == (bits))
drivers/virtio/virtio_input.c
142
unsigned long *bits, unsigned int bitcount)
drivers/virtio/virtio_input.c
167
__set_bit(bit, bits);
drivers/w1/masters/omap_hdq.c
117
static u8 hdq_reset_irqstatus(struct hdq_data *hdq_data, u8 bits)
drivers/w1/masters/omap_hdq.c
125
hdq_data->hdq_irqstatus &= ~bits;
drivers/watchdog/iTCO_wdt.c
249
u32 bits = PMC_CFG_NO_REBOOT_EN;
drivers/watchdog/iTCO_wdt.c
250
u32 value = set ? bits : 0;
drivers/watchdog/iTCO_wdt.c
252
return intel_pmc_gcr_update(pmc, PMC_GCR_PMC_CFG_REG, bits, value);
drivers/xen/acpi.c
43
unsigned int bits = extended ? 8 : 16;
drivers/xen/acpi.c
56
if (WARN((val_a & (~0 << bits)) || (val_b & (~0 << bits)),
drivers/xen/acpi.c
59
bits, val_a, val_b))
drivers/xen/events/events_2l.c
232
xen_ulong_t bits;
drivers/xen/events/events_2l.c
235
bits = MASK_LSBS(pending_bits, bit_idx);
drivers/xen/events/events_2l.c
238
if (bits == 0)
drivers/xen/events/events_2l.c
241
bit_idx = EVTCHN_FIRST_BIT(bits);
fs/btrfs/accessors.c
102
put_unaligned_le##bits(val, lebytes); \
fs/btrfs/accessors.c
103
if (sizeof(u##bits) == 2) { \
fs/btrfs/accessors.c
110
memcpy(kaddr, lebytes + part, sizeof(u##bits) - part); \
fs/btrfs/accessors.c
51
#define DEFINE_BTRFS_SETGET_BITS(bits) \
fs/btrfs/accessors.c
52
u##bits btrfs_get_##bits(const struct extent_buffer *eb, \
fs/btrfs/accessors.c
61
u8 lebytes[sizeof(u##bits)]; \
fs/btrfs/accessors.c
63
if (unlikely(member_offset + sizeof(u##bits) > eb->len)) { \
fs/btrfs/accessors.c
64
report_setget_bounds(eb, ptr, off, sizeof(u##bits)); \
fs/btrfs/accessors.c
67
if (INLINE_EXTENT_BUFFER_PAGES == 1 || sizeof(u##bits) == 1 || \
fs/btrfs/accessors.c
68
likely(sizeof(u##bits) <= part)) \
fs/btrfs/accessors.c
69
return get_unaligned_le##bits(kaddr); \
fs/btrfs/accessors.c
71
if (sizeof(u##bits) == 2) { \
fs/btrfs/accessors.c
78
part, sizeof(u##bits)); \
fs/btrfs/accessors.c
80
return get_unaligned_le##bits(lebytes); \
fs/btrfs/accessors.c
82
void btrfs_set_##bits(const struct extent_buffer *eb, void *ptr, \
fs/btrfs/accessors.c
83
unsigned long off, u##bits val) \
fs/btrfs/accessors.c
91
u8 lebytes[sizeof(u##bits)]; \
fs/btrfs/accessors.c
93
if (unlikely(member_offset + sizeof(u##bits) > eb->len)) { \
fs/btrfs/accessors.c
94
report_setget_bounds(eb, ptr, off, sizeof(u##bits)); \
fs/btrfs/accessors.c
97
if (INLINE_EXTENT_BUFFER_PAGES == 1 || sizeof(u##bits) == 1 || \
fs/btrfs/accessors.c
98
likely(sizeof(u##bits) <= part)) { \
fs/btrfs/accessors.c
99
put_unaligned_le##bits(val, kaddr); \
fs/btrfs/accessors.h
51
#define DECLARE_BTRFS_SETGET_BITS(bits) \
fs/btrfs/accessors.h
52
u##bits btrfs_get_##bits(const struct extent_buffer *eb, \
fs/btrfs/accessors.h
54
void btrfs_set_##bits(const struct extent_buffer *eb, void *ptr, \
fs/btrfs/accessors.h
55
unsigned long off, u##bits val);
fs/btrfs/accessors.h
62
#define BTRFS_SETGET_FUNCS(name, type, member, bits) \
fs/btrfs/accessors.h
63
static inline u##bits btrfs_##name(const struct extent_buffer *eb, \
fs/btrfs/accessors.h
66
static_assert(sizeof(u##bits) == sizeof_field(type, member)); \
fs/btrfs/accessors.h
67
return btrfs_get_##bits(eb, s, offsetof(type, member)); \
fs/btrfs/accessors.h
70
u##bits val) \
fs/btrfs/accessors.h
72
static_assert(sizeof(u##bits) == sizeof_field(type, member)); \
fs/btrfs/accessors.h
73
btrfs_set_##bits(eb, s, offsetof(type, member), val); \
fs/btrfs/accessors.h
76
#define BTRFS_SETGET_HEADER_FUNCS(name, type, member, bits) \
fs/btrfs/accessors.h
77
static inline u##bits btrfs_##name(const struct extent_buffer *eb) \
fs/btrfs/accessors.h
81
return get_unaligned_le##bits(&p->member); \
fs/btrfs/accessors.h
84
u##bits val) \
fs/btrfs/accessors.h
87
put_unaligned_le##bits(val, &p->member); \
fs/btrfs/accessors.h
90
#define BTRFS_SETGET_STACK_FUNCS(name, type, member, bits) \
fs/btrfs/accessors.h
91
static inline u##bits btrfs_##name(const type *s) \
fs/btrfs/accessors.h
93
return get_unaligned_le##bits(&s->member); \
fs/btrfs/accessors.h
95
static inline void btrfs_set_##name(type *s, u##bits val) \
fs/btrfs/accessors.h
97
put_unaligned_le##bits(val, &s->member); \
fs/btrfs/btrfs_inode.h
565
u32 bits);
fs/btrfs/btrfs_inode.h
567
struct extent_state *state, u32 bits);
fs/btrfs/extent-io-tree.c
1012
state = find_first_extent_bit_state(tree, start, bits);
fs/btrfs/extent-io-tree.c
1045
u64 *start_ret, u64 *end_ret, u32 bits)
fs/btrfs/extent-io-tree.c
1053
state = find_first_extent_bit_state(tree, start, bits);
fs/btrfs/extent-io-tree.c
1138
u32 bits, u64 *failed_start,
fs/btrfs/extent-io-tree.c
1150
u32 exclusive_bits = (bits & EXTENT_LOCK_BITS);
fs/btrfs/extent-io-tree.c
1153
set_gfp_mask_from_bits(&bits, &mask);
fs/btrfs/extent-io-tree.c
1155
trace_btrfs_set_extent_bit(tree, start, end - start + 1, bits);
fs/btrfs/extent-io-tree.c
1194
insert_state_fast(tree, prealloc, p, parent, bits, changeset);
fs/btrfs/extent-io-tree.c
1217
set_state_bits(tree, state, bits, changeset);
fs/btrfs/extent-io-tree.c
1256
if ((state->state & bits) == bits) {
fs/btrfs/extent-io-tree.c
1273
set_state_bits(tree, state, bits, changeset);
fs/btrfs/extent-io-tree.c
1309
inserted_state = insert_state(tree, prealloc, bits, changeset);
fs/btrfs/extent-io-tree.c
1362
set_state_bits(tree, prealloc, bits, changeset);
fs/btrfs/extent-io-tree.c
1386
u32 bits, struct extent_state **cached_state)
fs/btrfs/extent-io-tree.c
1388
return set_extent_bit(tree, start, end, bits, NULL, NULL, cached_state, NULL);
fs/btrfs/extent-io-tree.c
1410
u32 bits, u32 clear_bits,
fs/btrfs/extent-io-tree.c
1423
trace_btrfs_convert_extent_bit(tree, start, end - start + 1, bits,
fs/btrfs/extent-io-tree.c
1461
insert_state_fast(tree, prealloc, p, parent, bits, NULL);
fs/btrfs/extent-io-tree.c
1477
set_state_bits(tree, state, bits, NULL);
fs/btrfs/extent-io-tree.c
1516
set_state_bits(tree, state, bits, NULL);
fs/btrfs/extent-io-tree.c
1553
inserted_state = insert_state(tree, prealloc, bits, NULL);
fs/btrfs/extent-io-tree.c
1601
set_state_bits(tree, prealloc, bits, NULL);
fs/btrfs/extent-io-tree.c
1639
u64 *start_ret, u64 *end_ret, u32 bits)
fs/btrfs/extent-io-tree.c
1674
if (state->state & bits) {
fs/btrfs/extent-io-tree.c
1719
if (state->end >= start && !(state->state & bits)) {
fs/btrfs/extent-io-tree.c
1758
u32 bits, bool contig,
fs/btrfs/extent-io-tree.c
1813
if (state->end >= cur_start && (state->state & bits) == bits) {
fs/btrfs/extent-io-tree.c
186
static int add_extent_changeset(struct extent_state *state, u32 bits,
fs/btrfs/extent-io-tree.c
1870
void btrfs_get_range_bits(struct extent_io_tree *tree, u64 start, u64 end, u32 *bits,
fs/btrfs/extent-io-tree.c
1882
*bits = 0;
fs/btrfs/extent-io-tree.c
1894
*bits |= state->state;
fs/btrfs/extent-io-tree.c
194
if (set && (state->state & bits) == bits)
fs/btrfs/extent-io-tree.c
1950
u32 bits, struct extent_changeset *changeset)
fs/btrfs/extent-io-tree.c
1957
ASSERT(!(bits & EXTENT_LOCK_BITS));
fs/btrfs/extent-io-tree.c
1959
return set_extent_bit(tree, start, end, bits, NULL, NULL, NULL, changeset);
fs/btrfs/extent-io-tree.c
196
if (!set && (state->state & bits) == 0)
fs/btrfs/extent-io-tree.c
1963
u32 bits, struct extent_changeset *changeset)
fs/btrfs/extent-io-tree.c
1969
ASSERT(!(bits & EXTENT_LOCK_BITS));
fs/btrfs/extent-io-tree.c
1971
return btrfs_clear_extent_bit_changeset(tree, start, end, bits, NULL, changeset);
fs/btrfs/extent-io-tree.c
1975
u32 bits, struct extent_state **cached)
fs/btrfs/extent-io-tree.c
1980
ret = set_extent_bit(tree, start, end, bits, &failed_start, NULL, cached, NULL);
fs/btrfs/extent-io-tree.c
1984
bits, cached);
fs/btrfs/extent-io-tree.c
1994
int btrfs_lock_extent_bits(struct extent_io_tree *tree, u64 start, u64 end, u32 bits,
fs/btrfs/extent-io-tree.c
2001
ret = set_extent_bit(tree, start, end, bits, &failed_start,
fs/btrfs/extent-io-tree.c
2006
bits, cached_state);
fs/btrfs/extent-io-tree.c
2008
wait_extent_bit(tree, failed_start, end, bits, &failed_state);
fs/btrfs/extent-io-tree.c
2009
ret = set_extent_bit(tree, start, end, bits, &failed_start,
fs/btrfs/extent-io-tree.c
392
u32 bits, struct extent_changeset *changeset)
fs/btrfs/extent-io-tree.c
394
u32 bits_to_set = bits & ~EXTENT_CTLBITS;
fs/btrfs/extent-io-tree.c
398
btrfs_set_delalloc_extent(tree->inode, state, bits);
fs/btrfs/extent-io-tree.c
423
u32 bits,
fs/btrfs/extent-io-tree.c
430
const bool try_merge = !(bits & (EXTENT_LOCK_BITS | EXTENT_BOUNDARY));
fs/btrfs/extent-io-tree.c
432
set_state_bits(tree, state, bits, changeset);
fs/btrfs/extent-io-tree.c
481
struct rb_node *parent, unsigned bits,
fs/btrfs/extent-io-tree.c
484
set_state_bits(tree, state, bits, changeset);
fs/btrfs/extent-io-tree.c
543
struct extent_state *state, u32 bits)
fs/btrfs/extent-io-tree.c
547
if (!(bits & EXTENT_LOCK_BITS))
fs/btrfs/extent-io-tree.c
581
u32 bits, u64 end,
fs/btrfs/extent-io-tree.c
585
u32 bits_to_clear = bits & ~EXTENT_CTLBITS;
fs/btrfs/extent-io-tree.c
589
btrfs_clear_delalloc_extent(tree->inode, state, bits);
fs/btrfs/extent-io-tree.c
595
state_wake_up(tree, state, bits);
fs/btrfs/extent-io-tree.c
615
static void set_gfp_mask_from_bits(u32 *bits, gfp_t *mask)
fs/btrfs/extent-io-tree.c
617
*mask = (*bits & EXTENT_NOWAIT ? GFP_NOWAIT : GFP_NOFS);
fs/btrfs/extent-io-tree.c
618
*bits &= EXTENT_NOWAIT - 1;
fs/btrfs/extent-io-tree.c
631
u32 bits, struct extent_state **cached_state,
fs/btrfs/extent-io-tree.c
640
const bool delete = (bits & EXTENT_CLEAR_ALL_BITS);
fs/btrfs/extent-io-tree.c
641
const u32 bits_to_clear = (bits & ~EXTENT_CTLBITS);
fs/btrfs/extent-io-tree.c
644
set_gfp_mask_from_bits(&bits, &mask);
fs/btrfs/extent-io-tree.c
646
trace_btrfs_clear_extent_bit(tree, start, end - start + 1, bits);
fs/btrfs/extent-io-tree.c
649
bits |= ~EXTENT_CTLBITS;
fs/btrfs/extent-io-tree.c
651
if (bits & EXTENT_DELALLOC)
fs/btrfs/extent-io-tree.c
652
bits |= EXTENT_NORESERVE;
fs/btrfs/extent-io-tree.c
654
clear = (bits & (EXTENT_LOCK_BITS | EXTENT_BOUNDARY));
fs/btrfs/extent-io-tree.c
698
if (!(state->state & bits)) {
fs/btrfs/extent-io-tree.c
746
btrfs_clear_delalloc_extent(tree->inode, state, bits);
fs/btrfs/extent-io-tree.c
755
state_wake_up(tree, state, bits);
fs/btrfs/extent-io-tree.c
770
state = clear_state_bit(tree, state, bits, end, changeset);
fs/btrfs/extent-io-tree.c
813
btrfs_clear_delalloc_extent(tree->inode, state, bits);
fs/btrfs/extent-io-tree.c
818
state_wake_up(tree, state, bits);
fs/btrfs/extent-io-tree.c
832
state_wake_up(tree, state, bits);
fs/btrfs/extent-io-tree.c
834
clear_state_bit(tree, prealloc, bits, end, changeset);
fs/btrfs/extent-io-tree.c
840
state = clear_state_bit(tree, state, bits, end, changeset);
fs/btrfs/extent-io-tree.c
868
u32 bits, struct extent_state **cached_state)
fs/btrfs/extent-io-tree.c
898
if (state->state & bits) {
fs/btrfs/extent-io-tree.c
955
u64 start, u32 bits)
fs/btrfs/extent-io-tree.c
965
if (state->state & bits)
fs/btrfs/extent-io-tree.c
981
u64 *start_ret, u64 *end_ret, u32 bits,
fs/btrfs/extent-io-tree.c
992
if (state->state & bits)
fs/btrfs/extent-io-tree.h
144
int btrfs_lock_extent_bits(struct extent_io_tree *tree, u64 start, u64 end, u32 bits,
fs/btrfs/extent-io-tree.h
147
u32 bits, struct extent_state **cached);
fs/btrfs/extent-io-tree.h
166
u64 max_bytes, u32 bits, bool contig,
fs/btrfs/extent-io-tree.h
173
void btrfs_get_range_bits(struct extent_io_tree *tree, u64 start, u64 end, u32 *bits,
fs/btrfs/extent-io-tree.h
176
u32 bits, struct extent_changeset *changeset);
fs/btrfs/extent-io-tree.h
178
u32 bits, struct extent_state **cached,
fs/btrfs/extent-io-tree.h
182
u64 end, u32 bits,
fs/btrfs/extent-io-tree.h
185
return btrfs_clear_extent_bit_changeset(tree, start, end, bits, cached, NULL);
fs/btrfs/extent-io-tree.h
196
u32 bits, struct extent_changeset *changeset);
fs/btrfs/extent-io-tree.h
198
u32 bits, struct extent_state **cached_state);
fs/btrfs/extent-io-tree.h
209
u32 bits, u32 clear_bits,
fs/btrfs/extent-io-tree.h
213
u64 *start_ret, u64 *end_ret, u32 bits,
fs/btrfs/extent-io-tree.h
216
u64 *start_ret, u64 *end_ret, u32 bits);
fs/btrfs/extent-io-tree.h
218
u64 *start_ret, u64 *end_ret, u32 bits);
fs/btrfs/extent-tree.c
66
static int block_group_bits(const struct btrfs_block_group *cache, u64 bits)
fs/btrfs/extent-tree.c
68
return (cache->flags & bits) == bits;
fs/btrfs/free-space-cache.c
1957
unsigned long bits, i;
fs/btrfs/free-space-cache.c
1974
bits = bytes_to_bits(*bytes, unit);
fs/btrfs/free-space-cache.c
1977
if (for_alloc && bits == 1) {
fs/btrfs/free-space-cache.c
1984
if (extent_bits >= bits) {
fs/btrfs/inode.c
2576
u32 bits)
fs/btrfs/inode.c
2582
WARN_ON((bits & EXTENT_DEFRAG) && !(bits & EXTENT_DELALLOC));
fs/btrfs/inode.c
2588
if (!(state->state & EXTENT_DELALLOC) && (bits & EXTENT_DELALLOC)) {
fs/btrfs/inode.c
2606
if (bits & EXTENT_DEFRAG)
fs/btrfs/inode.c
2621
(bits & EXTENT_DELALLOC_NEW)) {
fs/btrfs/inode.c
2633
struct extent_state *state, u32 bits)
fs/btrfs/inode.c
2641
if ((state->state & EXTENT_DEFRAG) && (bits & EXTENT_DEFRAG)) {
fs/btrfs/inode.c
2652
if ((state->state & EXTENT_DELALLOC) && (bits & EXTENT_DELALLOC)) {
fs/btrfs/inode.c
2665
if (bits & EXTENT_CLEAR_META_RESV &&
fs/btrfs/inode.c
2676
(bits & EXTENT_CLEAR_DATA_RESV))
fs/btrfs/inode.c
2700
(bits & EXTENT_DELALLOC_NEW)) {
fs/btrfs/inode.c
2704
if (bits & EXTENT_ADD_INODE_BYTES)
fs/btrfs/send.c
684
#define TLV_PUT_DEFINE_INT(bits) \
fs/btrfs/send.c
685
static int tlv_put_u##bits(struct send_ctx *sctx, \
fs/btrfs/send.c
686
u##bits attr, u##bits value) \
fs/btrfs/send.c
688
__le##bits __tmp = cpu_to_le##bits(value); \
fs/btrfs/send.c
727
#define TLV_PUT_INT(sctx, attrtype, bits, value) \
fs/btrfs/send.c
729
ret = tlv_put_u##bits(sctx, attrtype, value); \
fs/btrfs/super.c
1737
u32 bits = fs_info->sectorsize_bits;
fs/btrfs/super.c
1777
buf->f_blocks >>= bits;
fs/btrfs/super.c
1778
buf->f_bfree = buf->f_blocks - (div_u64(total_used, factor) >> bits);
fs/btrfs/super.c
1783
if (buf->f_bfree >= block_rsv->size >> bits)
fs/btrfs/super.c
1784
buf->f_bfree -= block_rsv->size >> bits;
fs/btrfs/super.c
1794
buf->f_bavail = buf->f_bavail >> bits;
fs/btrfs/volumes.c
5966
static void chunk_map_device_set_bits(struct btrfs_chunk_map *map, unsigned int bits)
fs/btrfs/volumes.c
5974
bits | EXTENT_NOWAIT, NULL);
fs/btrfs/volumes.c
5978
void btrfs_chunk_map_device_clear_bits(struct btrfs_chunk_map *map, unsigned int bits)
fs/btrfs/volumes.c
5986
bits | EXTENT_NOWAIT, NULL);
fs/btrfs/volumes.h
930
void btrfs_chunk_map_device_clear_bits(struct btrfs_chunk_map *map, unsigned int bits);
fs/ceph/caps.c
1038
int bits = 0;
fs/ceph/caps.c
1043
bits |= 1 << RD_SHIFT;
fs/ceph/caps.c
1045
bits |= 1 << RD_SHIFT;
fs/ceph/caps.c
1051
bits |= 1 << WR_SHIFT;
fs/ceph/caps.c
1053
bits |= 1 << WR_SHIFT;
fs/ceph/caps.c
1057
if ((bits & (CEPH_FILE_MODE_RDWR << 1)) &&
fs/ceph/caps.c
1059
bits |= 1 << LAZY_SHIFT;
fs/ceph/caps.c
1061
return bits ? ceph_caps_for_mode(bits >> 1) : 0;
fs/ceph/caps.c
4758
int bits = (fmode << 1) | 1;
fs/ceph/caps.c
4775
if (bits & (1 << i))
fs/ceph/caps.c
4792
int bits = (fmode << 1) | 1;
fs/ceph/caps.c
4801
if (bits & (1 << i)) {
fs/ext2/super.c
731
static loff_t ext2_max_size(int bits)
fs/ext2/super.c
736
unsigned int ppb = 1 << (bits-2);
fs/ext2/super.c
748
upper_limit >>= (bits - 9);
fs/ext2/super.c
751
res += 1LL << (bits-2);
fs/ext2/super.c
752
res += 1LL << (2*(bits-2));
fs/ext2/super.c
753
res += 1LL << (3*(bits-2));
fs/ext2/super.c
781
res <<= bits;
fs/ext4/super.c
3478
static loff_t ext4_max_bitmap_size(int bits, int has_huge_files)
fs/ext4/super.c
3482
unsigned int ppb = 1 << (bits - 2);
fs/ext4/super.c
3501
upper_limit >>= (bits - 9);
fs/ext4/super.c
3545
res <<= bits;
fs/hpfs/super.c
138
unsigned long *bits;
fs/hpfs/super.c
141
bits = hpfs_map_4sectors(s, secno, &qbh, 0);
fs/hpfs/super.c
142
if (!bits)
fs/hpfs/super.c
144
count = bitmap_weight(bits, 2048 * BITS_PER_BYTE);
fs/jffs2/compr_rubin.c
151
static void init_decode(struct rubin_state *rs, int div, int *bits)
fs/jffs2/compr_rubin.c
153
init_rubin(rs, div, bits);
fs/jffs2/compr_rubin.c
168
int c, bits = 0;
fs/jffs2/compr_rubin.c
176
bits++;
fs/jffs2/compr_rubin.c
185
rs->bit_number += bits;
fs/jffs2/compr_rubin.c
196
} while (--bits);
fs/jffs2/compr_rubin.c
237
ret = encode(rs, rs->bit_divider-rs->bits[i],
fs/jffs2/compr_rubin.c
238
rs->bits[i], byte & 1);
fs/jffs2/compr_rubin.c
254
result |= decode(rs, bit_divider - rs->bits[i],
fs/jffs2/compr_rubin.c
255
rs->bits[i]) << i;
fs/jffs2/compr_rubin.c
262
static int rubin_do_compress(int bit_divider, int *bits, unsigned char *data_in,
fs/jffs2/compr_rubin.c
272
init_rubin(&rs, bit_divider, bits);
fs/jffs2/compr_rubin.c
303
int bits[8];
fs/jffs2/compr_rubin.c
318
memset(bits, 0, sizeof(int)*8);
fs/jffs2/compr_rubin.c
321
bits[7] += histo[i];
fs/jffs2/compr_rubin.c
323
bits[6] += histo[i];
fs/jffs2/compr_rubin.c
325
bits[5] += histo[i];
fs/jffs2/compr_rubin.c
327
bits[4] += histo[i];
fs/jffs2/compr_rubin.c
329
bits[3] += histo[i];
fs/jffs2/compr_rubin.c
331
bits[2] += histo[i];
fs/jffs2/compr_rubin.c
333
bits[1] += histo[i];
fs/jffs2/compr_rubin.c
335
bits[0] += histo[i];
fs/jffs2/compr_rubin.c
339
bits[i] = (bits[i] * 256) / mysrclen;
fs/jffs2/compr_rubin.c
340
if (!bits[i]) bits[i] = 1;
fs/jffs2/compr_rubin.c
341
if (bits[i] > 255) bits[i] = 255;
fs/jffs2/compr_rubin.c
342
cpage_out[i] = bits[i];
fs/jffs2/compr_rubin.c
345
ret = rubin_do_compress(256, bits, data_in, cpage_out+8, &mysrclen,
fs/jffs2/compr_rubin.c
363
static void rubin_do_decompress(int bit_divider, int *bits,
fs/jffs2/compr_rubin.c
372
init_decode(&rs, bit_divider, bits);
fs/jffs2/compr_rubin.c
392
int bits[8];
fs/jffs2/compr_rubin.c
396
bits[c] = data_in[c];
fs/jffs2/compr_rubin.c
398
rubin_do_decompress(256, bits, data_in+8, cpage_out, sourcelen-8,
fs/jffs2/compr_rubin.c
44
int bits[8];
fs/jffs2/compr_rubin.c
88
static void init_rubin(struct rubin_state *rs, int div, int *bits)
fs/jffs2/compr_rubin.c
98
rs->bits[c] = bits[c];
fs/minix/bitmap.c
100
u32 bits = sbi->s_nzones - sbi->s_firstdatazone + 1;
fs/minix/bitmap.c
102
return (count_free(sbi->s_zmap, sb->s_blocksize, bits)
fs/minix/bitmap.c
266
u32 bits = sbi->s_ninodes + 1;
fs/minix/bitmap.c
268
return count_free(sbi->s_imap, sb->s_blocksize, bits);
fs/minix/minix.h
100
return DIV_ROUND_UP_POW2(bits, blocksize * 8);
fs/minix/minix.h
98
static inline unsigned minix_blocks_needed(unsigned bits, unsigned blocksize)
fs/nilfs2/page.c
103
unsigned long bits;
fs/nilfs2/page.c
118
bits = sbh->b_state & (BIT(BH_Uptodate) | BIT(BH_Mapped));
fs/nilfs2/page.c
121
bits &= bh->b_state;
fs/nilfs2/page.c
124
if (bits & BIT(BH_Uptodate))
fs/nilfs2/page.c
128
if (bits & BIT(BH_Mapped))
fs/ntfs3/bitmap.c
1331
size_t bits, iw, new_wnd;
fs/ntfs3/bitmap.c
1357
bits = new_bits - old_bits;
fs/ntfs3/bitmap.c
1360
for (iw = old_bits >> (sb->s_blocksize_bits + 3); bits; iw += 1) {
fs/ntfs3/bitmap.c
1369
op = b0 + bits > wbits ? wbits - b0 : bits;
fs/ntfs3/bitmap.c
1394
bits -= op;
fs/ntfs3/bitmap.c
1549
unsigned int ntfs_bitmap_weight_le(const void *bitmap, int bits)
fs/ntfs3/bitmap.c
1552
unsigned int k, lim = bits / BITS_PER_LONG;
fs/ntfs3/bitmap.c
1558
if (bits % BITS_PER_LONG) {
fs/ntfs3/bitmap.c
1560
BITMAP_LAST_WORD_MASK(bits));
fs/ntfs3/bitmap.c
37
static bool wnd_is_free_hlp(struct wnd_bitmap *wnd, size_t bit, size_t bits);
fs/ntfs3/bitmap.c
726
int wnd_set_free(struct wnd_bitmap *wnd, size_t bit, size_t bits)
fs/ntfs3/bitmap.c
736
for (; iw < wnd->nwnd && bits; iw++, bit += op, bits -= op, wbit = 0) {
fs/ntfs3/bitmap.c
740
op = min_t(u32, wbits - wbit, bits);
fs/ntfs3/bitmap.c
768
int wnd_set_used(struct wnd_bitmap *wnd, size_t bit, size_t bits)
fs/ntfs3/bitmap.c
778
for (; iw < wnd->nwnd && bits; iw++, bit += op, bits -= op, wbit = 0) {
fs/ntfs3/bitmap.c
782
op = min_t(u32, wbits - wbit, bits);
fs/ntfs3/bitmap.c
816
int wnd_set_used_safe(struct wnd_bitmap *wnd, size_t bit, size_t bits,
fs/ntfs3/bitmap.c
823
for (i = 0; i < bits; i++) {
fs/ntfs3/bitmap.c
850
static bool wnd_is_free_hlp(struct wnd_bitmap *wnd, size_t bit, size_t bits)
fs/ntfs3/bitmap.c
858
for (; iw < wnd->nwnd && bits; iw++, bits -= op, wbit = 0) {
fs/ntfs3/bitmap.c
862
op = min_t(u32, wbits - wbit, bits);
fs/ntfs3/bitmap.c
887
bool wnd_is_free(struct wnd_bitmap *wnd, size_t bit, size_t bits)
fs/ntfs3/bitmap.c
905
if (bit < end && bit + bits <= end)
fs/ntfs3/bitmap.c
909
ret = wnd_is_free_hlp(wnd, bit, bits);
fs/ntfs3/bitmap.c
919
bool wnd_is_used(struct wnd_bitmap *wnd, size_t bit, size_t bits)
fs/ntfs3/bitmap.c
934
end = bit + bits;
fs/ntfs3/bitmap.c
944
for (; iw < wnd->nwnd && bits; iw++, bits -= op, wbit = 0) {
fs/ntfs3/bitmap.c
948
op = min_t(u32, wbits - wbit, bits);
fs/ntfs3/frecord.c
1759
u8 bits;
fs/ntfs3/frecord.c
1819
bits = 0xc; // 4k
fs/ntfs3/frecord.c
1822
bits = 0xd; // 8k
fs/ntfs3/frecord.c
1825
bits = 0xe; // 16k
fs/ntfs3/frecord.c
1828
bits = 0xf; // 32k
fs/ntfs3/frecord.c
1831
bits = 0x10; // 64k
fs/ntfs3/frecord.c
1834
ni_set_ext_compress_bits(ni, bits);
fs/ntfs3/fslog.c
224
__le32 bits;
fs/ntfs3/fslog.c
3110
u32 nsize, t32, asize, used, esize, off, bits;
fs/ntfs3/fslog.c
3718
bits = le32_to_cpu(((struct BITMAP_RANGE *)data)->bits);
fs/ntfs3/fslog.c
3721
cbo + ((off + bits + 7) / 8) > lco) {
fs/ntfs3/fslog.c
3725
ntfs_bitmap_set_le(Add2Ptr(buffer_le, roff), off, bits);
fs/ntfs3/fslog.c
3731
bits = le32_to_cpu(((struct BITMAP_RANGE *)data)->bits);
fs/ntfs3/fslog.c
3734
cbo + ((off + bits + 7) / 8) > lco) {
fs/ntfs3/fslog.c
3738
ntfs_bitmap_clear_le(Add2Ptr(buffer_le, roff), off, bits);
fs/ntfs3/index.c
360
bool (*fn)(const ulong *buf, u32 bit, u32 bits,
fs/ntfs3/index.c
457
static bool scan_for_free(const ulong *buf, u32 bit, u32 bits, size_t *ret)
fs/ntfs3/index.c
459
size_t pos = find_next_zero_bit_le(buf, bits, bit);
fs/ntfs3/index.c
461
if (pos >= bits)
fs/ntfs3/index.c
505
static bool scan_for_used(const ulong *buf, u32 bit, u32 bits, size_t *ret)
fs/ntfs3/index.c
507
size_t pos = find_next_bit_le(buf, bits, bit);
fs/ntfs3/index.c
509
if (pos >= bits)
fs/ntfs3/lib/decompress_common.h
128
u32 bits = bitstream_peek_bits(is, num_bits);
fs/ntfs3/lib/decompress_common.h
131
return bits;
fs/ntfs3/ntfs_fs.h
1027
static inline size_t ntfs3_bitmap_size(size_t bits)
fs/ntfs3/ntfs_fs.h
1029
return BITS_TO_U64(bits) * sizeof(u64);
fs/ntfs3/ntfs_fs.h
1149
static inline void ni_set_ext_compress_bits(struct ntfs_inode *ni, u8 bits)
fs/ntfs3/ntfs_fs.h
1151
ni->ni_flags |= (bits - 0xb) & NI_FLAG_COMPRESSED_MASK;
fs/ntfs3/ntfs_fs.h
911
int wnd_set_free(struct wnd_bitmap *wnd, size_t bit, size_t bits);
fs/ntfs3/ntfs_fs.h
912
int wnd_set_used(struct wnd_bitmap *wnd, size_t bit, size_t bits);
fs/ntfs3/ntfs_fs.h
913
int wnd_set_used_safe(struct wnd_bitmap *wnd, size_t bit, size_t bits,
fs/ntfs3/ntfs_fs.h
915
bool wnd_is_free(struct wnd_bitmap *wnd, size_t bit, size_t bits);
fs/ntfs3/ntfs_fs.h
916
bool wnd_is_used(struct wnd_bitmap *wnd, size_t bit, size_t bits);
fs/ntfs3/ntfs_fs.h
929
unsigned int ntfs_bitmap_weight_le(const void *bitmap, int bits);
fs/ocfs2/cluster/heartbeat.c
1461
unsigned int bits)
fs/ocfs2/cluster/heartbeat.c
1463
bitmap_copy(map, o2hb_live_node_bitmap, bits);
fs/ocfs2/cluster/heartbeat.c
1469
void o2hb_fill_node_map(unsigned long *map, unsigned int bits)
fs/ocfs2/cluster/heartbeat.c
1475
o2hb_fill_node_map_from_callback(map, bits);
fs/ocfs2/cluster/heartbeat.c
516
unsigned int bits = reg->hr_block_bits;
fs/ocfs2/cluster/heartbeat.c
534
bio->bi_iter.bi_sector = (reg->hr_start_block + cs) << (bits - 9);
fs/ocfs2/cluster/heartbeat.c
538
vec_start = (cs << bits) % PAGE_SIZE;
fs/ocfs2/cluster/heartbeat.h
62
unsigned int bits);
fs/ocfs2/cluster/masklog.h
118
#define __mlog_test_u64(mask, bits) \
fs/ocfs2/cluster/masklog.h
119
( (u32)(mask & 0xffffffff) & bits.words[0] || \
fs/ocfs2/cluster/masklog.h
120
((u64)(mask) >> 32) & bits.words[1] )
fs/ocfs2/cluster/masklog.h
121
#define __mlog_set_u64(mask, bits) do { \
fs/ocfs2/cluster/masklog.h
122
bits.words[0] |= (u32)(mask & 0xffffffff); \
fs/ocfs2/cluster/masklog.h
123
bits.words[1] |= (u64)(mask) >> 32; \
fs/ocfs2/cluster/masklog.h
125
#define __mlog_clear_u64(mask, bits) do { \
fs/ocfs2/cluster/masklog.h
126
bits.words[0] &= ~((u32)(mask & 0xffffffff)); \
fs/ocfs2/cluster/masklog.h
127
bits.words[1] &= ~((u64)(mask) >> 32); \
fs/ocfs2/cluster/masklog.h
138
#define __mlog_test_u64(mask, bits) ((mask) & bits.words[0])
fs/ocfs2/cluster/masklog.h
139
#define __mlog_set_u64(mask, bits) do { \
fs/ocfs2/cluster/masklog.h
140
bits.words[0] |= (mask); \
fs/ocfs2/cluster/masklog.h
142
#define __mlog_clear_u64(mask, bits) do { \
fs/ocfs2/cluster/masklog.h
143
bits.words[0] &= ~(mask); \
fs/ocfs2/cluster/tcp.c
1004
bitmap_zero(map, bits);
fs/ocfs2/cluster/tcp.c
999
void o2net_fill_node_map(unsigned long *map, unsigned int bits)
fs/ocfs2/localalloc.c
1036
unsigned int bits;
fs/ocfs2/localalloc.c
1055
bits = osb->local_alloc_bits >> 1;
fs/ocfs2/localalloc.c
1056
if (bits > ocfs2_megabytes_to_clusters(osb->sb, 1)) {
fs/ocfs2/localalloc.c
1065
osb->local_alloc_bits = bits;
fs/ocfs2/localalloc.c
243
int ocfs2_alloc_should_use_local(struct ocfs2_super *osb, u64 bits)
fs/ocfs2/localalloc.c
258
if (bits > (la_bits / 2))
fs/ocfs2/localalloc.c
264
(unsigned long long)bits, osb->local_alloc_state, la_bits, ret);
fs/ocfs2/localalloc.h
28
u64 bits);
fs/ocfs2/ocfs2.h
840
int bits = OCFS2_SB(sb)->s_clustersize_bits - sb->s_blocksize_bits;
fs/ocfs2/ocfs2.h
844
return (u64)clusters << bits;
fs/ocfs2/reservations.c
43
unsigned int bits;
fs/ocfs2/reservations.c
47
bits = 4 << osb->osb_resv_level;
fs/ocfs2/reservations.c
49
bits = 4 << osb->osb_dir_resv_level;
fs/ocfs2/reservations.c
51
return bits;
fs/select.c
1190
void *bits;
fs/select.c
1212
bits = stack_fds;
fs/select.c
1214
bits = kmalloc_array(6, size, GFP_KERNEL);
fs/select.c
1216
if (!bits)
fs/select.c
1219
fds.in = (unsigned long *) bits;
fs/select.c
1220
fds.out = (unsigned long *) (bits + size);
fs/select.c
1221
fds.ex = (unsigned long *) (bits + 2*size);
fs/select.c
1222
fds.res_in = (unsigned long *) (bits + 3*size);
fs/select.c
1223
fds.res_out = (unsigned long *) (bits + 4*size);
fs/select.c
1224
fds.res_ex = (unsigned long *) (bits + 5*size);
fs/select.c
1250
if (bits != stack_fds)
fs/select.c
1251
kfree(bits);
fs/select.c
625
void *bits;
fs/select.c
650
bits = stack_fds;
fs/select.c
658
bits = kvmalloc(alloc_size, GFP_KERNEL);
fs/select.c
659
if (!bits)
fs/select.c
662
fds.in = bits;
fs/select.c
663
fds.out = bits + size;
fs/select.c
664
fds.ex = bits + 2*size;
fs/select.c
665
fds.res_in = bits + 3*size;
fs/select.c
666
fds.res_out = bits + 4*size;
fs/select.c
667
fds.res_ex = bits + 5*size;
fs/select.c
694
if (bits != stack_fds)
fs/select.c
695
kvfree(bits);
fs/smb/client/cifsacl.c
766
umode_t bits, __u8 access_type,
fs/smb/client/cifsacl.c
775
mode_to_access_flags(nmode, bits, &access_req);
fs/smb/server/smbacl.c
195
umode_t mode, umode_t bits)
fs/smb/server/smbacl.c
203
mode_to_access_flags(mode, bits, &access_req);
fs/ubifs/lpt.c
48
int i, n, bits, per_leb_wastage, max_pnode_cnt;
fs/ubifs/lpt.c
524
int num, bits;
fs/ubifs/lpt.c
528
bits = (col & (UBIFS_LPT_FANOUT - 1));
fs/ubifs/lpt.c
531
num |= bits;
fs/ubifs/lpt.c
80
bits = UBIFS_LPT_CRC_BITS + UBIFS_LPT_TYPE_BITS +
fs/ubifs/lpt.c
83
c->pnode_sz = (bits + 7) / 8;
fs/ubifs/lpt.c
85
bits = UBIFS_LPT_CRC_BITS + UBIFS_LPT_TYPE_BITS +
fs/ubifs/lpt.c
88
c->nnode_sz = (bits + 7) / 8;
fs/ubifs/lpt.c
90
bits = UBIFS_LPT_CRC_BITS + UBIFS_LPT_TYPE_BITS +
fs/ubifs/lpt.c
92
c->ltab_sz = (bits + 7) / 8;
fs/ubifs/lpt.c
94
bits = UBIFS_LPT_CRC_BITS + UBIFS_LPT_TYPE_BITS +
fs/ubifs/lpt.c
96
c->lsave_sz = (bits + 7) / 8;
fs/ufs/super.c
702
int bits = uspi->s_apbshift;
fs/ufs/super.c
705
if (bits > 21)
fs/ufs/super.c
708
res = UFS_NDADDR + (1LL << bits) + (1LL << (2*bits)) +
fs/ufs/super.c
709
(1LL << (3*bits));
include/asm-generic/word-at-a-time.h
101
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
include/asm-generic/word-at-a-time.h
103
return bits;
include/asm-generic/word-at-a-time.h
106
static inline unsigned long create_zero_mask(unsigned long bits)
include/asm-generic/word-at-a-time.h
108
bits = (bits - 1) & ~bits;
include/asm-generic/word-at-a-time.h
109
return bits >> 7;
include/asm-generic/word-at-a-time.h
94
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
include/asm-generic/word-at-a-time.h
97
*bits = mask;
include/clocksource/samsung_pwm.h
22
u8 bits;
include/crypto/aes.h
255
int aes_p8_set_encrypt_key(const u8 *userKey, const int bits,
include/crypto/aes.h
257
int aes_p8_set_decrypt_key(const u8 *userKey, const int bits,
include/drm/drm_print.h
202
const char * const bits[], unsigned int nbits);
include/linux/bitmap.h
227
const unsigned long *old, const unsigned long *new, int bits);
include/linux/bitmap.h
229
const unsigned long *relmap, unsigned int bits);
include/linux/bitmap.h
760
int bitmap_find_free_region(unsigned long *bitmap, unsigned int bits, int order)
include/linux/bitmap.h
764
for (pos = 0; (end = pos + BIT(order)) <= bits; pos = end) {
include/linux/bitops.h
364
#define set_mask_bits(ptr, mask, bits) \
include/linux/bitops.h
366
const typeof(*(ptr)) mask__ = (mask), bits__ = (bits); \
include/linux/clocksource.h
177
#define CLOCKSOURCE_MASK(bits) GENMASK_ULL((bits) - 1, 0)
include/linux/comedi/comedilib.h
50
unsigned int mask, unsigned int *bits,
include/linux/compat.h
957
#define BITS_TO_COMPAT_LONGS(bits) DIV_ROUND_UP(bits, BITS_PER_COMPAT_LONG)
include/linux/cper.h
589
void cper_print_bits(const char *prefix, unsigned int bits,
include/linux/cper.h
591
int cper_bits_to_str(char *buf, int buf_size, unsigned long bits,
include/linux/cpumask.h
137
static __always_inline void cpu_max_bits_warn(unsigned int cpu, unsigned int bits)
include/linux/cpumask.h
140
WARN_ON_ONCE(cpu >= bits);
include/linux/cpumask_types.h
18
#define cpumask_bits(maskp) ((maskp)->bits)
include/linux/cpumask_types.h
9
typedef struct cpumask { DECLARE_BITMAP(bits, NR_CPUS); } cpumask_t;
include/linux/crc4.h
7
extern uint8_t crc4(uint8_t c, uint64_t x, int bits);
include/linux/dim.h
39
#define BIT_GAP(bits, end, start) ((((end) - (start)) + BIT_ULL(bits)) \
include/linux/dim.h
40
& (BIT_ULL(bits) - 1))
include/linux/dmaengine.h
1058
!test_bit(DMA_REPEAT, chan->device->cap_mask.bits))
include/linux/dmaengine.h
1421
set_bit(tx_type, dstp->bits);
include/linux/dmaengine.h
1428
clear_bit(tx_type, dstp->bits);
include/linux/dmaengine.h
1434
bitmap_zero(dstp->bits, DMA_TX_TYPE_END);
include/linux/dmaengine.h
1441
return test_bit(tx_type, srcp->bits);
include/linux/dmaengine.h
1445
for_each_set_bit(cap, mask.bits, DMA_TX_TYPE_END)
include/linux/dmaengine.h
240
typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
include/linux/dynamic_debug.h
127
unsigned long *bits;
include/linux/efi.h
1188
u8 bits[];
include/linux/fb.h
523
#define FB_SHIFT_HIGH(p, val, bits) (fb_be_math(p) ? (val) >> (bits) : \
include/linux/fb.h
524
(val) << (bits))
include/linux/fb.h
525
#define FB_SHIFT_LOW(p, val, bits) (fb_be_math(p) ? (val) << (bits) : \
include/linux/fb.h
526
(val) >> (bits))
include/linux/find.h
502
#define find_first_clump8(clump, bits, size) \
include/linux/find.h
503
find_next_clump8((clump), (bits), (size), 0)
include/linux/find.h
690
#define for_each_set_clump8(start, clump, bits, size) \
include/linux/find.h
691
for ((start) = find_first_clump8(&(clump), (bits), (size)); \
include/linux/find.h
693
(start) = find_next_clump8(&(clump), (bits), (size), (start) + 8))
include/linux/genalloc.h
80
unsigned long bits[]; /* bitmap for allocating memory chunk */
include/linux/gpio/driver.h
428
unsigned long *bits);
include/linux/gpio/driver.h
433
unsigned long *bits);
include/linux/gpio/forwarder.h
31
unsigned long *bits);
include/linux/gpio/forwarder.h
36
unsigned long *bits);
include/linux/gpio/generic.h
103
int bits;
include/linux/hash.h
16
#define hash_long(val, bits) hash_32(val, bits)
include/linux/hash.h
18
#define hash_long(val, bits) hash_64(val, bits)
include/linux/hash.h
65
static inline u32 hash_32(u32 val, unsigned int bits)
include/linux/hash.h
68
return __hash_32(val) >> (32 - bits);
include/linux/hash.h
74
static __always_inline u32 hash_64_generic(u64 val, unsigned int bits)
include/linux/hash.h
78
return val * GOLDEN_RATIO_64 >> (64 - bits);
include/linux/hash.h
81
return hash_32((u32)val ^ __hash_32(val >> 32), bits);
include/linux/hash.h
85
static inline u32 hash_ptr(const void *ptr, unsigned int bits)
include/linux/hash.h
87
return hash_long((unsigned long)ptr, bits);
include/linux/hashtable.h
16
#define DEFINE_HASHTABLE(name, bits) \
include/linux/hashtable.h
17
struct hlist_head name[1 << (bits)] = \
include/linux/hashtable.h
18
{ [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT }
include/linux/hashtable.h
20
#define DEFINE_READ_MOSTLY_HASHTABLE(name, bits) \
include/linux/hashtable.h
21
struct hlist_head name[1 << (bits)] __read_mostly = \
include/linux/hashtable.h
22
{ [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT }
include/linux/hashtable.h
24
#define DECLARE_HASHTABLE(name, bits) \
include/linux/hashtable.h
25
struct hlist_head name[1 << (bits)]
include/linux/hashtable.h
31
#define hash_min(val, bits) \
include/linux/hashtable.h
32
(sizeof(val) <= 4 ? hash_32(val, bits) : hash_long(val, bits))
include/linux/iio/imu/adis.h
460
#define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
include/linux/iio/imu/adis.h
472
.realbits = (bits), \
include/linux/iio/imu/adis.h
478
#define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
include/linux/iio/imu/adis.h
479
ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
include/linux/iio/imu/adis.h
481
#define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
include/linux/iio/imu/adis.h
482
ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
include/linux/iio/imu/adis.h
484
#define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
include/linux/iio/imu/adis.h
496
.realbits = (bits), \
include/linux/iio/imu/adis.h
502
#define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
include/linux/iio/imu/adis.h
514
.realbits = (bits), \
include/linux/iio/imu/adis.h
520
#define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
include/linux/iio/imu/adis.h
521
ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
include/linux/iio/imu/adis.h
523
#define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \
include/linux/iio/imu/adis.h
524
ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
include/linux/iio/imu/adis.h
526
#define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
include/linux/iio/imu/adis.h
527
ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
include/linux/iio/imu/adis.h
529
#define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
include/linux/iio/imu/adis.h
530
ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
include/linux/ipv6.h
273
} bits;
include/linux/ipv6.h
352
inet6_sk(sk)->rxopt.bits.rxinfo)
include/linux/libata.h
1351
extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
include/linux/libata.h
2142
static inline u8 ata_sff_busy_wait(struct ata_port *ap, unsigned int bits,
include/linux/libata.h
2151
} while (status != 0xff && (status & bits) && (max > 0));
include/linux/lp.h
65
unsigned long bits;
include/linux/mfd/abx500/ab8500-sysctrl.h
30
static inline int ab8500_sysctrl_set(u16 reg, u8 bits)
include/linux/mfd/abx500/ab8500-sysctrl.h
32
return ab8500_sysctrl_write(reg, bits, bits);
include/linux/mfd/abx500/ab8500-sysctrl.h
35
static inline int ab8500_sysctrl_clear(u16 reg, u8 bits)
include/linux/mfd/abx500/ab8500-sysctrl.h
37
return ab8500_sysctrl_write(reg, bits, 0);
include/linux/mfd/dbx500-prcmu.h
543
static inline void prcmu_set(unsigned int reg, u32 bits)
include/linux/mfd/dbx500-prcmu.h
545
prcmu_write_masked(reg, bits, bits);
include/linux/mfd/dbx500-prcmu.h
548
static inline void prcmu_clear(unsigned int reg, u32 bits)
include/linux/mfd/dbx500-prcmu.h
550
prcmu_write_masked(reg, bits, 0);
include/linux/mlx4/device.h
664
unsigned long *bits[2];
include/linux/mm.h
1103
size_t count, const vma_flag_t *bits)
include/linux/mm.h
1108
vma_flags_set_flag(&flags, bits[i]);
include/linux/mm_types.h
1439
unsigned long mask, unsigned long bits)
include/linux/mm_types.h
1443
set_mask_bits(bitmap, mask, bits);
include/linux/nodemask.h
112
return m ? m->bits : NULL;
include/linux/nodemask.h
127
set_bit(node, dstp->bits);
include/linux/nodemask.h
133
clear_bit(node, dstp->bits);
include/linux/nodemask.h
139
bitmap_fill(dstp->bits, nbits);
include/linux/nodemask.h
145
bitmap_zero(dstp->bits, nbits);
include/linux/nodemask.h
149
#define node_isset(node, nodemask) test_bit((node), (nodemask).bits)
include/linux/nodemask.h
155
return test_and_set_bit(node, addr->bits);
include/linux/nodemask.h
163
return bitmap_and(dstp->bits, src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
171
bitmap_or(dstp->bits, src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
179
bitmap_xor(dstp->bits, src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
187
return bitmap_andnot(dstp->bits, src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
194
bitmap_copy(dstp->bits, srcp->bits, nbits);
include/linux/nodemask.h
202
bitmap_complement(dstp->bits, srcp->bits, nbits);
include/linux/nodemask.h
210
return bitmap_equal(src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
218
return bitmap_intersects(src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
226
return bitmap_subset(src1p->bits, src2p->bits, nbits);
include/linux/nodemask.h
232
return bitmap_empty(srcp->bits, nbits);
include/linux/nodemask.h
238
return bitmap_full(srcp->bits, nbits);
include/linux/nodemask.h
244
return bitmap_weight(srcp->bits, nbits);
include/linux/nodemask.h
253
return min(MAX_NUMNODES, find_first_bit(srcp->bits, MAX_NUMNODES));
include/linux/nodemask.h
259
return min(MAX_NUMNODES, find_next_bit(srcp->bits, MAX_NUMNODES, n+1));
include/linux/nodemask.h
286
m.bits[0] = 1UL << (node); \
include/linux/nodemask.h
296
return min(MAX_NUMNODES, find_first_zero_bit(maskp->bits, MAX_NUMNODES));
include/linux/nodemask.h
323
#define nodes_addr(src) ((src).bits)
include/linux/nodemask.h
330
return bitmap_parse_user(buf, len, dstp->bits, nbits);
include/linux/nodemask.h
336
return bitmap_parselist(buf, dstp->bits, nbits);
include/linux/nodemask.h
344
return bitmap_bitremap(oldbit, oldp->bits, newp->bits, nbits);
include/linux/nodemask.h
352
bitmap_remap(dstp->bits, srcp->bits, oldp->bits, newp->bits, nbits);
include/linux/nodemask.h
360
bitmap_onto(dstp->bits, origp->bits, relmapp->bits, nbits);
include/linux/nodemask.h
368
bitmap_fold(dstp->bits, origp->bits, sz, nbits);
include/linux/nodemask.h
494
int node = find_random_bit(maskp->bits, MAX_NUMNODES);
include/linux/nodemask_types.h
17
typedef struct { DECLARE_BITMAP(bits, MAX_NUMNODES); } nodemask_t;
include/linux/nsc_gpio.h
25
u32 (*gpio_config) (unsigned iminor, u32 mask, u32 bits);
include/linux/olpc-ec.h
54
extern int olpc_ec_mask_write(u16 bits);
include/linux/phylink.h
781
void phylink_set_port_modes(unsigned long *bits);
include/linux/regmap.h
1423
unsigned int reg, unsigned int bits)
include/linux/regmap.h
1425
return regmap_update_bits_base(map, reg, bits, bits,
include/linux/regmap.h
1430
unsigned int reg, unsigned int bits)
include/linux/regmap.h
1432
return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
include/linux/regmap.h
1436
unsigned int bits, bool value)
include/linux/regmap.h
1439
return regmap_set_bits(map, reg, bits);
include/linux/regmap.h
1441
return regmap_clear_bits(map, reg, bits);
include/linux/regmap.h
1444
int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);
include/linux/regmap.h
1530
unsigned int bits)
include/linux/regmap.h
1532
return regmap_field_update_bits_base(field, bits, bits, NULL, false,
include/linux/regmap.h
1537
unsigned int bits)
include/linux/regmap.h
1539
return regmap_field_update_bits_base(field, bits, 0, NULL, false,
include/linux/regmap.h
1543
int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);
include/linux/regmap.h
1904
unsigned int reg, unsigned int bits)
include/linux/regmap.h
1911
unsigned int reg, unsigned int bits)
include/linux/regmap.h
1918
unsigned int bits, bool value)
include/linux/regmap.h
1925
unsigned int reg, unsigned int bits)
include/linux/regmap.h
2016
unsigned int bits)
include/linux/regmap.h
2023
unsigned int bits)
include/linux/regmap.h
2030
unsigned int bits)
include/linux/sched_clock.h
41
extern void sched_clock_register(u64 (*read)(void), int bits,
include/linux/sched_clock.h
46
static inline void sched_clock_register(u64 (*read)(void), int bits,
include/linux/serial_core.h
1121
void uart_parse_options(const char *options, int *baud, int *parity, int *bits,
include/linux/serial_core.h
1124
int parity, int bits, int flow);
include/linux/spi/spi.h
611
#define SPI_BPW_MASK(bits) BIT((bits) - 1)
include/linux/sunrpc/svcauth.h
179
static inline unsigned long hash_str(char const *name, int bits)
include/linux/sunrpc/svcauth.h
181
return hashlen_hash(hashlen_string(NULL, name)) >> (32 - bits);
include/linux/sunrpc/svcauth.h
184
static inline unsigned long hash_mem(char const *buf, int length, int bits)
include/linux/sunrpc/svcauth.h
186
return full_name_hash(NULL, buf, length) >> (32 - bits);
include/linux/timecounter.h
14
#define CYCLECOUNTER_MASK(bits) (u64)((bits) < 64 ? ((1ULL<<(bits))-1) : -1)
include/linux/turris-omnia-mcu-interface.h
328
unsigned long bits, unsigned long *dst)
include/linux/turris-omnia-mcu-interface.h
333
if (!bits) {
include/linux/turris-omnia-mcu-interface.h
339
omnia_compute_reply_length(bits, false, 0));
include/linux/turris-omnia-mcu-interface.h
343
*dst = le32_to_cpu(reply) & bits;
include/linux/types.h
10
unsigned long name[BITS_TO_LONGS(bits)]
include/linux/types.h
9
#define DECLARE_BITMAP(name,bits) \
include/linux/unwind_deferred.h
37
unsigned long bits = atomic_long_read(&info->unwind_mask);
include/linux/unwind_deferred.h
40
if (likely(!bits))
include/linux/unwind_deferred.h
45
if (bits & UNWIND_PENDING)
include/linux/unwind_deferred.h
47
} while (!atomic_long_try_cmpxchg(&info->unwind_mask, &bits, 0UL));
include/linux/usb/musb.h
60
u8 bits;
include/math-emu/double.h
142
} bits __attribute__((packed));
include/math-emu/double.h
70
} bits __attribute__((packed));
include/math-emu/op-1.h
102
_flo.bits.frac = X##_f; \
include/math-emu/op-1.h
103
_flo.bits.exp = X##_e; \
include/math-emu/op-1.h
104
_flo.bits.sign = X##_s; \
include/math-emu/op-1.h
114
_flo->bits.frac = X##_f; \
include/math-emu/op-1.h
115
_flo->bits.exp = X##_e; \
include/math-emu/op-1.h
116
_flo->bits.sign = X##_s; \
include/math-emu/op-1.h
79
X##_f = _flo.bits.frac; \
include/math-emu/op-1.h
80
X##_e = _flo.bits.exp; \
include/math-emu/op-1.h
81
X##_s = _flo.bits.sign; \
include/math-emu/op-1.h
89
X##_f = _flo->bits.frac; \
include/math-emu/op-1.h
90
X##_e = _flo->bits.exp; \
include/math-emu/op-1.h
91
X##_s = _flo->bits.sign; \
include/math-emu/op-2.h
184
X##_f0 = _flo.bits.frac0; \
include/math-emu/op-2.h
185
X##_f1 = _flo.bits.frac1; \
include/math-emu/op-2.h
186
X##_e = _flo.bits.exp; \
include/math-emu/op-2.h
187
X##_s = _flo.bits.sign; \
include/math-emu/op-2.h
195
X##_f0 = _flo->bits.frac0; \
include/math-emu/op-2.h
196
X##_f1 = _flo->bits.frac1; \
include/math-emu/op-2.h
197
X##_e = _flo->bits.exp; \
include/math-emu/op-2.h
198
X##_s = _flo->bits.sign; \
include/math-emu/op-2.h
210
_flo.bits.frac0 = X##_f0; \
include/math-emu/op-2.h
211
_flo.bits.frac1 = X##_f1; \
include/math-emu/op-2.h
212
_flo.bits.exp = X##_e; \
include/math-emu/op-2.h
213
_flo.bits.sign = X##_s; \
include/math-emu/op-2.h
223
_flo->bits.frac0 = X##_f0; \
include/math-emu/op-2.h
224
_flo->bits.frac1 = X##_f1; \
include/math-emu/op-2.h
225
_flo->bits.exp = X##_e; \
include/math-emu/op-2.h
226
_flo->bits.sign = X##_s; \
include/math-emu/op-4.h
187
X##_f[0] = _flo.bits.frac0; \
include/math-emu/op-4.h
188
X##_f[1] = _flo.bits.frac1; \
include/math-emu/op-4.h
189
X##_f[2] = _flo.bits.frac2; \
include/math-emu/op-4.h
190
X##_f[3] = _flo.bits.frac3; \
include/math-emu/op-4.h
191
X##_e = _flo.bits.exp; \
include/math-emu/op-4.h
192
X##_s = _flo.bits.sign; \
include/math-emu/op-4.h
200
X##_f[0] = _flo->bits.frac0; \
include/math-emu/op-4.h
201
X##_f[1] = _flo->bits.frac1; \
include/math-emu/op-4.h
202
X##_f[2] = _flo->bits.frac2; \
include/math-emu/op-4.h
203
X##_f[3] = _flo->bits.frac3; \
include/math-emu/op-4.h
204
X##_e = _flo->bits.exp; \
include/math-emu/op-4.h
205
X##_s = _flo->bits.sign; \
include/math-emu/op-4.h
211
_flo.bits.frac0 = X##_f[0]; \
include/math-emu/op-4.h
212
_flo.bits.frac1 = X##_f[1]; \
include/math-emu/op-4.h
213
_flo.bits.frac2 = X##_f[2]; \
include/math-emu/op-4.h
214
_flo.bits.frac3 = X##_f[3]; \
include/math-emu/op-4.h
215
_flo.bits.exp = X##_e; \
include/math-emu/op-4.h
216
_flo.bits.sign = X##_s; \
include/math-emu/op-4.h
225
_flo->bits.frac0 = X##_f[0]; \
include/math-emu/op-4.h
226
_flo->bits.frac1 = X##_f[1]; \
include/math-emu/op-4.h
227
_flo->bits.frac2 = X##_f[2]; \
include/math-emu/op-4.h
228
_flo->bits.frac3 = X##_f[3]; \
include/math-emu/op-4.h
229
_flo->bits.exp = X##_e; \
include/math-emu/op-4.h
230
_flo->bits.sign = X##_s; \
include/math-emu/quad.h
149
} bits;
include/math-emu/quad.h
75
} bits __attribute__((packed));
include/math-emu/single.h
59
} bits __attribute__((packed));
include/media/drv-intf/saa7146_vv.h
173
void saa7146_res_free(struct saa7146_dev *dev, unsigned int bits);
include/media/v4l2-vp9.h
137
u32 (*bits)[2][10][2];
include/media/v4l2-vp9.h
35
u8 bits[2][10];
include/net/ip_vs.h
529
int bits; /* size = 1 << bits */
include/net/ipv6.h
1319
inet6_sk(sk)->rxopt.bits.rxinfo = true;
include/net/netfilter/nf_conntrack_labels.h
17
unsigned long bits[NF_CT_LABELS_MAX_SIZE / sizeof(long)];
include/sound/ac97_codec.h
221
unsigned short bits; /* resolution bitmask */
include/sound/cs8403.h
100
bits |= 0x40; break;
include/sound/cs8403.h
105
case IEC958_AES3_CON_FS_44100: bits |= 0x00; break;
include/sound/cs8403.h
106
case IEC958_AES3_CON_FS_48000: bits |= 0x02; break;
include/sound/cs8403.h
107
case IEC958_AES3_CON_FS_32000: bits |= 0x04; break;
include/sound/cs8403.h
110
bits = 0x00; /* professional mode */
include/sound/cs8403.h
112
bits &= ~0x02;
include/sound/cs8403.h
114
bits |= 0x02;
include/sound/cs8403.h
117
case IEC958_AES0_PRO_FS_32000: bits |= 0x00; break;
include/sound/cs8403.h
118
case IEC958_AES0_PRO_FS_44100: bits |= 0x10; break; /* 44.1kHz */
include/sound/cs8403.h
119
case IEC958_AES0_PRO_FS_48000: bits |= 0x08; break; /* 48kHz */
include/sound/cs8403.h
121
case IEC958_AES0_PRO_FS_NOTID: bits |= 0x18; break;
include/sound/cs8403.h
124
case IEC958_AES0_PRO_EMPHASIS_NONE: bits |= 0x20; break;
include/sound/cs8403.h
125
case IEC958_AES0_PRO_EMPHASIS_5015: bits |= 0x40; break;
include/sound/cs8403.h
126
case IEC958_AES0_PRO_EMPHASIS_CCITT: bits |= 0x00; break;
include/sound/cs8403.h
128
case IEC958_AES0_PRO_EMPHASIS_NOTID: bits |= 0x60; break;
include/sound/cs8403.h
132
case IEC958_AES1_PRO_MODE_STEREOPHONIC: bits |= 0x00; break;
include/sound/cs8403.h
133
default: bits |= 0x80; break;
include/sound/cs8403.h
136
return bits;
include/sound/cs8403.h
154
SND_CS8404_DECL void SND_CS8404_DECODE(struct snd_aes_iec958 *diga, unsigned char bits)
include/sound/cs8403.h
156
if (bits & 0x10) { /* consumer */
include/sound/cs8403.h
157
if (!(bits & 0x20))
include/sound/cs8403.h
159
if (!(bits & 0x40))
include/sound/cs8403.h
161
if (!(bits & 0x80))
include/sound/cs8403.h
163
switch (bits & 0x03) {
include/sound/cs8403.h
167
switch (bits & 0x06) {
include/sound/cs8403.h
174
if (!(bits & 0x04))
include/sound/cs8403.h
176
switch (bits & 0x60) {
include/sound/cs8403.h
182
switch (bits & 0x03) {
include/sound/cs8403.h
188
if (!(bits & 0x80))
include/sound/cs8403.h
195
unsigned char bits;
include/sound/cs8403.h
198
bits = 0x10; /* consumer mode */
include/sound/cs8403.h
200
bits |= 0x20;
include/sound/cs8403.h
202
bits |= 0x40;
include/sound/cs8403.h
204
bits |= 0x80;
include/sound/cs8403.h
206
bits |= 0x03;
include/sound/cs8403.h
209
case IEC958_AES3_CON_FS_44100: bits |= 0x06; break;
include/sound/cs8403.h
210
case IEC958_AES3_CON_FS_48000: bits |= 0x04; break;
include/sound/cs8403.h
211
case IEC958_AES3_CON_FS_32000: bits |= 0x02; break;
include/sound/cs8403.h
214
bits = 0x00; /* professional mode */
include/sound/cs8403.h
216
bits |= 0x04;
include/sound/cs8403.h
218
case IEC958_AES0_PRO_FS_32000: bits |= 0x00; break;
include/sound/cs8403.h
219
case IEC958_AES0_PRO_FS_44100: bits |= 0x40; break; /* 44.1kHz */
include/sound/cs8403.h
220
case IEC958_AES0_PRO_FS_48000: bits |= 0x20; break; /* 48kHz */
include/sound/cs8403.h
222
case IEC958_AES0_PRO_FS_NOTID: bits |= 0x00; break;
include/sound/cs8403.h
225
case IEC958_AES0_PRO_EMPHASIS_NONE: bits |= 0x02; break;
include/sound/cs8403.h
226
case IEC958_AES0_PRO_EMPHASIS_5015: bits |= 0x01; break;
include/sound/cs8403.h
227
case IEC958_AES0_PRO_EMPHASIS_CCITT: bits |= 0x00; break;
include/sound/cs8403.h
229
case IEC958_AES0_PRO_EMPHASIS_NOTID: bits |= 0x03; break;
include/sound/cs8403.h
233
case IEC958_AES1_PRO_MODE_STEREOPHONIC: bits |= 0x00; break;
include/sound/cs8403.h
234
default: bits |= 0x80; break;
include/sound/cs8403.h
237
return bits;
include/sound/cs8403.h
24
SND_CS8403_DECL void SND_CS8403_DECODE(struct snd_aes_iec958 *diga, unsigned char bits)
include/sound/cs8403.h
26
if (bits & 0x01) { /* consumer */
include/sound/cs8403.h
27
if (!(bits & 0x02))
include/sound/cs8403.h
29
if (!(bits & 0x08))
include/sound/cs8403.h
31
switch (bits & 0x10) {
include/sound/cs8403.h
35
if (!(bits & 0x80))
include/sound/cs8403.h
37
switch (bits & 0x60) {
include/sound/cs8403.h
43
switch (bits & 0x06) {
include/sound/cs8403.h
50
switch (bits & 0x18) {
include/sound/cs8403.h
56
switch (bits & 0x60) {
include/sound/cs8403.h
62
if (bits & 0x80)
include/sound/cs8403.h
69
unsigned char bits;
include/sound/cs8403.h
72
bits = 0x01; /* consumer mode */
include/sound/cs8403.h
74
bits &= ~0x02;
include/sound/cs8403.h
76
bits |= 0x02;
include/sound/cs8403.h
78
bits &= ~0x08;
include/sound/cs8403.h
80
bits |= 0x08;
include/sound/cs8403.h
83
case IEC958_AES0_CON_EMPHASIS_NONE: bits |= 0x10; break;
include/sound/cs8403.h
84
case IEC958_AES0_CON_EMPHASIS_5015: bits |= 0x00; break;
include/sound/cs8403.h
87
bits &= ~0x80;
include/sound/cs8403.h
89
bits |= 0x80;
include/sound/cs8403.h
91
bits |= 0x60;
include/sound/cs8403.h
95
bits |= 0x00; break;
include/sound/cs8403.h
97
bits |= 0x20; break;
include/sound/hdaudio.h
146
unsigned int snd_hdac_stream_format(unsigned int channels, unsigned int bits, unsigned int rate);
include/sound/hdaudio.h
147
unsigned int snd_hdac_spdif_stream_format(unsigned int channels, unsigned int bits,
include/sound/pcm_params.h
101
v = mask->bits[MASK_OFS(val)] & MASK_BIT(val);
include/sound/pcm_params.h
103
mask->bits[MASK_OFS(val)] = v;
include/sound/pcm_params.h
111
mask->bits[i] &= v->bits[i];
include/sound/pcm_params.h
128
return mask->bits[MASK_OFS(val)] & MASK_BIT(val);
include/sound/pcm_params.h
142
if (! mask->bits[i])
include/sound/pcm_params.h
144
if (mask->bits[i] & (mask->bits[i] - 1))
include/sound/pcm_params.h
40
if (mask->bits[i])
include/sound/pcm_params.h
49
if (mask->bits[i])
include/sound/pcm_params.h
50
return __ffs(mask->bits[i]) + (i << 5);
include/sound/pcm_params.h
59
if (mask->bits[i])
include/sound/pcm_params.h
60
return __fls(mask->bits[i]) + (i << 5);
include/sound/pcm_params.h
67
mask->bits[MASK_OFS(val)] |= MASK_BIT(val);
include/sound/pcm_params.h
79
mask->bits[MASK_OFS(val)] &= ~MASK_BIT(val);
include/sound/pcm_params.h
87
mask->bits[MASK_OFS(i)] |= MASK_BIT(i);
include/sound/pcm_params.h
95
mask->bits[MASK_OFS(i)] &= ~MASK_BIT(i);
include/sound/vx_core.h
313
void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
include/trace/events/fsi_master_ast_cf.h
32
__field(u8, bits)
include/trace/events/fsi_master_ast_cf.h
38
__entry->bits = cmd->bits;
include/trace/events/fsi_master_ast_cf.h
43
__entry->bits, __entry->rbits
include/trace/events/fsi_master_gpio.h
12
TP_PROTO(const struct fsi_master_gpio *master, int bits, uint64_t msg),
include/trace/events/fsi_master_gpio.h
13
TP_ARGS(master, bits, msg),
include/trace/events/fsi_master_gpio.h
16
__field(int, bits)
include/trace/events/fsi_master_gpio.h
21
__entry->bits = bits;
include/trace/events/fsi_master_gpio.h
22
__entry->msg = msg & ((1ull<<bits) - 1);
include/trace/events/fsi_master_gpio.h
26
(__entry->bits + 3) / 4,
include/trace/events/fsi_master_gpio.h
28
__entry->bits
include/trace/events/fsi_master_gpio.h
33
TP_PROTO(const struct fsi_master_gpio *master, int bits, uint64_t msg),
include/trace/events/fsi_master_gpio.h
34
TP_ARGS(master, bits, msg),
include/trace/events/fsi_master_gpio.h
37
__field(int, bits)
include/trace/events/fsi_master_gpio.h
42
__entry->bits = bits;
include/trace/events/fsi_master_gpio.h
43
__entry->msg = msg & ((1ull<<bits) - 1);
include/trace/events/fsi_master_gpio.h
47
(__entry->bits + 3) / 4,
include/trace/events/fsi_master_gpio.h
49
__entry->bits
include/trace/events/sched.h
796
memcpy(__entry->mem_allowed, mem_allowed_ptr->bits,
include/uapi/drm/vc4_drm.h
72
__u16 bits;
include/uapi/linux/gpio.h
97
__aligned_u64 bits;
include/uapi/linux/v4l2-controls.h
2843
__u8 bits[2][10];
include/uapi/linux/v4l2-controls.h
3122
__u8 bits;
include/uapi/sound/asound.h
405
__u32 bits[(SNDRV_MASK_MAX+31)/32];
include/uapi/sound/emu10k1.h
25
#define __EMU10K1_DECLARE_BITMAP(name,bits) \
include/uapi/sound/emu10k1.h
26
unsigned long name[(bits) / (sizeof(unsigned long) * 8)]
io_uring/io_uring.c
193
static int io_alloc_hash_table(struct io_hash_table *table, unsigned bits)
io_uring/io_uring.c
199
hash_buckets = 1U << bits;
io_uring/io_uring.c
204
if (bits == 1)
io_uring/io_uring.c
206
bits--;
io_uring/io_uring.c
209
table->hash_bits = bits;
kernel/bpf/btf.c
181
#define BITS_PER_BYTE_MASKED(bits) ((bits) & BITS_PER_BYTE_MASK)
kernel/bpf/btf.c
182
#define BITS_ROUNDDOWN_BYTES(bits) ((bits) >> 3)
kernel/bpf/btf.c
183
#define BITS_ROUNDUP_BYTES(bits) \
kernel/bpf/btf.c
184
(BITS_ROUNDDOWN_BYTES(bits) + !!BITS_PER_BYTE_MASKED(bits))
kernel/bpf/helpers.c
3476
__u64 *bits;
kernel/bpf/helpers.c
3496
static void swap_ulong_in_u64(u64 *bits, unsigned int nr)
kernel/bpf/helpers.c
3502
bits[i] = (bits[i] >> 32) | ((u64)(u32)bits[i] << 32);
kernel/bpf/helpers.c
3558
kit->bits = bpf_mem_alloc(&bpf_global_ma, nr_bytes);
kernel/bpf/helpers.c
3559
if (!kit->bits)
kernel/bpf/helpers.c
3562
err = bpf_probe_read_kernel_common(kit->bits, nr_bytes, unsafe_ptr__ign);
kernel/bpf/helpers.c
3564
bpf_mem_free(&bpf_global_ma, kit->bits);
kernel/bpf/helpers.c
3568
swap_ulong_in_u64(kit->bits, nr_words);
kernel/bpf/helpers.c
3587
const void *bits;
kernel/bpf/helpers.c
3592
bits = nr_bits == 64 ? &kit->bits_copy : kit->bits;
kernel/bpf/helpers.c
3593
bit = find_next_bit(bits, nr_bits, bit + 1);
kernel/bpf/helpers.c
3615
bpf_mem_free(&bpf_global_ma, kit->bits);
kernel/bpf/tnum.c
25
u8 bits = fls64(chi);
kernel/bpf/tnum.c
28
if (bits > 63)
kernel/bpf/tnum.c
34
delta = (1ULL << bits) - 1;
kernel/futex/core.c
400
node = find_next_bit_wrap(node_possible_map.bits, nr_node_ids, node);
kernel/futex/futex.h
107
int bits = 8 * futex_size(flags);
kernel/futex/futex.h
110
max >>= 64 - bits;
kernel/futex/futex.h
120
int bits = 8 * futex_size(flags);
kernel/futex/futex.h
122
if (bits < 64 && (val >> bits))
kernel/irq/ipi-mux.c
138
ipis = atomic_fetch_andnot(en, &icpu->bits) & en;
kernel/irq/ipi-mux.c
22
atomic_t bits;
kernel/irq/ipi-mux.c
50
if (atomic_read(&icpu->bits) & ibit)
kernel/irq/ipi-mux.c
71
pending = atomic_fetch_or_release(ibit, &icpu->bits);
kernel/kcsan/core.c
1170
#define DEFINE_TSAN_ATOMIC_LOAD_STORE(bits) \
kernel/kcsan/core.c
1171
u##bits __tsan_atomic##bits##_load(const u##bits *ptr, int memorder); \
kernel/kcsan/core.c
1172
u##bits __tsan_atomic##bits##_load(const u##bits *ptr, int memorder) \
kernel/kcsan/core.c
1176
check_access(ptr, bits / BITS_PER_BYTE, KCSAN_ACCESS_ATOMIC, _RET_IP_); \
kernel/kcsan/core.c
1180
EXPORT_SYMBOL(__tsan_atomic##bits##_load); \
kernel/kcsan/core.c
1181
void __tsan_atomic##bits##_store(u##bits *ptr, u##bits v, int memorder); \
kernel/kcsan/core.c
1182
void __tsan_atomic##bits##_store(u##bits *ptr, u##bits v, int memorder) \
kernel/kcsan/core.c
1186
check_access(ptr, bits / BITS_PER_BYTE, \
kernel/kcsan/core.c
1191
EXPORT_SYMBOL(__tsan_atomic##bits##_store)
kernel/kcsan/core.c
1193
#define DEFINE_TSAN_ATOMIC_RMW(op, bits, suffix) \
kernel/kcsan/core.c
1194
u##bits __tsan_atomic##bits##_##op(u##bits *ptr, u##bits v, int memorder); \
kernel/kcsan/core.c
1195
u##bits __tsan_atomic##bits##_##op(u##bits *ptr, u##bits v, int memorder) \
kernel/kcsan/core.c
1199
check_access(ptr, bits / BITS_PER_BYTE, \
kernel/kcsan/core.c
1205
EXPORT_SYMBOL(__tsan_atomic##bits##_##op)
kernel/kcsan/core.c
1224
#define DEFINE_TSAN_ATOMIC_CMPXCHG(bits, strength, weak) \
kernel/kcsan/core.c
1225
int __tsan_atomic##bits##_compare_exchange_##strength(u##bits *ptr, u##bits *exp, \
kernel/kcsan/core.c
1226
u##bits val, int mo, int fail_mo); \
kernel/kcsan/core.c
1227
int __tsan_atomic##bits##_compare_exchange_##strength(u##bits *ptr, u##bits *exp, \
kernel/kcsan/core.c
1228
u##bits val, int mo, int fail_mo) \
kernel/kcsan/core.c
1232
check_access(ptr, bits / BITS_PER_BYTE, \
kernel/kcsan/core.c
1238
EXPORT_SYMBOL(__tsan_atomic##bits##_compare_exchange_##strength)
kernel/kcsan/core.c
1240
#define DEFINE_TSAN_ATOMIC_CMPXCHG_VAL(bits) \
kernel/kcsan/core.c
1241
u##bits __tsan_atomic##bits##_compare_exchange_val(u##bits *ptr, u##bits exp, u##bits val, \
kernel/kcsan/core.c
1243
u##bits __tsan_atomic##bits##_compare_exchange_val(u##bits *ptr, u##bits exp, u##bits val, \
kernel/kcsan/core.c
1248
check_access(ptr, bits / BITS_PER_BYTE, \
kernel/kcsan/core.c
1255
EXPORT_SYMBOL(__tsan_atomic##bits##_compare_exchange_val)
kernel/kcsan/core.c
1257
#define DEFINE_TSAN_ATOMIC_OPS(bits) \
kernel/kcsan/core.c
1258
DEFINE_TSAN_ATOMIC_LOAD_STORE(bits); \
kernel/kcsan/core.c
1259
DEFINE_TSAN_ATOMIC_RMW(exchange, bits, _n); \
kernel/kcsan/core.c
1260
DEFINE_TSAN_ATOMIC_RMW(fetch_add, bits, ); \
kernel/kcsan/core.c
1261
DEFINE_TSAN_ATOMIC_RMW(fetch_sub, bits, ); \
kernel/kcsan/core.c
1262
DEFINE_TSAN_ATOMIC_RMW(fetch_and, bits, ); \
kernel/kcsan/core.c
1263
DEFINE_TSAN_ATOMIC_RMW(fetch_or, bits, ); \
kernel/kcsan/core.c
1264
DEFINE_TSAN_ATOMIC_RMW(fetch_xor, bits, ); \
kernel/kcsan/core.c
1265
DEFINE_TSAN_ATOMIC_RMW(fetch_nand, bits, ); \
kernel/kcsan/core.c
1266
DEFINE_TSAN_ATOMIC_CMPXCHG(bits, strong, 0); \
kernel/kcsan/core.c
1267
DEFINE_TSAN_ATOMIC_CMPXCHG(bits, weak, 1); \
kernel/kcsan/core.c
1268
DEFINE_TSAN_ATOMIC_CMPXCHG_VAL(bits)
kernel/power/snapshot.c
931
unsigned long bits, pfn, pages;
kernel/power/snapshot.c
936
bits = min(pages - bm->cur.node_pfn, BM_BITS_PER_BLOCK);
kernel/power/snapshot.c
937
bit = find_next_bit(bm->cur.node->data, bits,
kernel/power/snapshot.c
939
if (bit < bits) {
kernel/sched/ext/arena.c
47
for_each_set_bitrange(b, e, chunk->bits, end_bit)
kernel/sched/ext/cid.c
227
memset(m->bits, 0, nr_words * sizeof(u64));
kernel/sched/ext/cid.c
243
memset(m->bits, 0xff, nr_words * sizeof(u64));
kernel/sched/ext/cid.c
248
m->bits[0] &= ~((1ULL << head_bits) - 1);
kernel/sched/ext/cid.c
253
m->bits[nr_words - 1] &= (1ULL << tail_bits) - 1;
kernel/sched/ext/cid.c
549
cmask_walk_op2(dst->bits, dst->base, dst->nr_cids,
kernel/sched/ext/cid.c
550
src->bits, src->base, src->nr_cids, CMASK_OP2_AND);
kernel/sched/ext/cid.c
555
cmask_walk_op2(dst->bits, dst->base, dst->nr_cids,
kernel/sched/ext/cid.c
556
src->bits, src->base, src->nr_cids, CMASK_OP2_OR);
kernel/sched/ext/cid.c
568
cmask_walk_op2(dst->bits, dst->base, dst->nr_cids,
kernel/sched/ext/cid.c
569
src->bits, src->base, src->nr_cids, CMASK_OP2_OR_RACY);
kernel/sched/ext/cid.c
574
cmask_walk_op2(dst->bits, dst->base, dst->nr_cids,
kernel/sched/ext/cid.c
575
src->bits, src->base, src->nr_cids, CMASK_OP2_COPY);
kernel/sched/ext/cid.c
588
cmask_walk_op2(dst->bits, dst->base, dst->nr_cids,
kernel/sched/ext/cid.c
589
src->bits, src->base, src->nr_cids, CMASK_OP2_COPY_RACY);
kernel/sched/ext/cid.c
594
cmask_walk_op2(dst->bits, dst->base, dst->nr_cids,
kernel/sched/ext/cid.c
595
src->bits, src->base, src->nr_cids, CMASK_OP2_ANDNOT);
kernel/sched/ext/cid.c
606
return cmask_walk_op1(&cm->bits[lo / 64 - cm->base / 64], lo, hi - lo,
kernel/sched/ext/cid.c
634
return !cmask_walk_op2((u64 *)super->bits, super->base, super->nr_cids,
kernel/sched/ext/cid.c
635
sub->bits, sub->base, sub->nr_cids, CMASK_OP2_SUBSET);
kernel/sched/ext/cid.c
640
return cmask_walk_op2((u64 *)a->bits, a->base, a->nr_cids,
kernel/sched/ext/cid.c
641
b->bits, b->base, b->nr_cids, CMASK_OP2_INTERSECTS);
kernel/sched/ext/cid.h
160
return (u64 *)&m->bits[cid / 64 - m->base / 64];
kernel/sched/ext/cid.h
182
memset(m->bits, 0, m->alloc_words * sizeof(u64));
kernel/sched/ext/cid.h
215
m->bits[0] = 0;
kernel/sched/ext/cid.h
216
m->bits[last_word] = 0;
kernel/sched/ext/cid.h
269
for (u64 __w = READ_ONCE((m)->bits[__wi]); \
kernel/sched/ext/ext.c
4906
size_t size = struct_size_t(struct scx_cmask, bits,
kernel/sched/ext/ext.c
4930
size_t size = struct_size_t(struct scx_cmask, bits,
kernel/sched/ext/types.h
119
_DEFINE_FLEX(struct scx_cmask, NAME, bits, SCX_CMASK_NR_WORDS(ALLOC_CIDS), \
kernel/sched/ext/types.h
94
u64 bits[] __counted_by(alloc_words);
kernel/sys.c
2437
static inline int prctl_set_mdwe(unsigned long bits, unsigned long arg3,
kernel/sys.c
2445
if (bits & ~(PR_MDWE_REFUSE_EXEC_GAIN | PR_MDWE_NO_INHERIT))
kernel/sys.c
2449
if (bits & PR_MDWE_NO_INHERIT && !(bits & PR_MDWE_REFUSE_EXEC_GAIN))
kernel/sys.c
2460
if (current_bits && current_bits != bits)
kernel/sys.c
2463
if (bits & PR_MDWE_NO_INHERIT)
kernel/sys.c
2465
if (bits & PR_MDWE_REFUSE_EXEC_GAIN)
kernel/time/sched_clock.c
177
void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate)
kernel/time/sched_clock.c
194
new_mask = CLOCKSOURCE_MASK(bits);
kernel/time/sched_clock.c
239
bits, r, r_unit, res, wrap);
kernel/trace/ftrace.c
1461
int bits = 0;
kernel/trace/ftrace.c
1468
bits = fls(size / 2);
kernel/trace/ftrace.c
1471
if (bits > FTRACE_HASH_MAX_BITS)
kernel/trace/ftrace.c
1472
bits = FTRACE_HASH_MAX_BITS;
kernel/trace/ftrace.c
1474
new_hash = alloc_ftrace_hash(bits);
kernel/trace/ring_buffer.c
4509
static const char *show_irq_str(int bits)
kernel/trace/ring_buffer.c
4522
return type[bits];
kernel/trace/ring_buffer.c
4529
int bits = 0;
kernel/trace/ring_buffer.c
4537
bits |= 1;
kernel/trace/ring_buffer.c
4540
bits |= 2;
kernel/trace/ring_buffer.c
4543
bits |= 4;
kernel/trace/ring_buffer.c
4545
return show_irq_str(bits);
kernel/trace/trace_syscalls.c
157
int bits, len;
kernel/trace/trace_syscalls.c
191
bits = trace->args[2];
kernel/trace/trace_syscalls.c
196
if (!(bits & (O_CREAT|O_TMPFILE)))
kernel/trace/trace_syscalls.c
199
if (!(bits & O_ACCMODE)) {
kernel/trace/trace_syscalls.c
200
if (!bits) {
kernel/trace/trace_syscalls.c
207
trace_print_flags_seq(s, "|", bits, __flags, ARRAY_SIZE(__flags));
kernel/unwind/deferred.c
153
unsigned long bits;
kernel/unwind/deferred.c
160
bits = atomic_long_fetch_andnot(UNWIND_PENDING,
kernel/unwind/deferred.c
172
bits &= ~(info->cache->unwind_completed);
kernel/unwind/deferred.c
179
if (test_bit(work->bit, &bits)) {
kernel/unwind/deferred.c
233
unsigned long old, bits;
kernel/unwind/deferred.c
278
bits = UNWIND_PENDING | bit;
kernel/unwind/deferred.c
279
old = atomic_long_fetch_or(bits, &info->unwind_mask);
kernel/unwind/deferred.c
280
if (old & bits) {
kernel/workqueue.c
3928
unsigned long *bits = work_data_bits(target);
kernel/workqueue.c
3932
work_flags |= *bits & WORK_STRUCT_LINKED;
kernel/workqueue.c
3933
work_color = get_work_color(*bits);
kernel/workqueue.c
3934
__set_bit(WORK_STRUCT_LINKED_BIT, bits);
kernel/workqueue.c
914
static unsigned long shift_and_mask(unsigned long v, u32 shift, u32 bits)
kernel/workqueue.c
916
return (v >> shift) & ((1U << bits) - 1);
lib/842/842_compress.c
169
int b = p->bit, bits = b + n, s = round_up(bits, 8) - bits;
lib/842/842_compress.c
181
if (bits > 64)
lib/842/842_compress.c
183
else if (p->olen < 8 && bits > 32 && bits <= 56)
lib/842/842_compress.c
185
else if (p->olen < 4 && bits > 16 && bits <= 24)
lib/842/842_compress.c
188
if (DIV_ROUND_UP(bits, 8) > p->olen)
lib/842/842_compress.c
194
if (bits <= 8)
lib/842/842_compress.c
196
else if (bits <= 16)
lib/842/842_compress.c
198
else if (bits <= 24)
lib/842/842_compress.c
200
else if (bits <= 32)
lib/842/842_compress.c
202
else if (bits <= 40)
lib/842/842_compress.c
204
else if (bits <= 48)
lib/842/842_compress.c
206
else if (bits <= 56)
lib/842/842_decompress.c
101
else if (p->ilen < 8 && bits > 32 && bits <= 56)
lib/842/842_decompress.c
103
else if (p->ilen < 4 && bits > 16 && bits <= 24)
lib/842/842_decompress.c
106
if (DIV_ROUND_UP(bits, 8) > p->ilen)
lib/842/842_decompress.c
109
if (bits <= 8)
lib/842/842_decompress.c
110
*d = *in >> (8 - bits);
lib/842/842_decompress.c
111
else if (bits <= 16)
lib/842/842_decompress.c
112
*d = be16_to_cpu(get_unaligned((__be16 *)in)) >> (16 - bits);
lib/842/842_decompress.c
113
else if (bits <= 32)
lib/842/842_decompress.c
114
*d = be32_to_cpu(get_unaligned((__be32 *)in)) >> (32 - bits);
lib/842/842_decompress.c
116
*d = be64_to_cpu(get_unaligned((__be64 *)in)) >> (64 - bits);
lib/842/842_decompress.c
163
static int __do_index(struct sw842_param *p, u8 size, u8 bits, u64 fsize)
lib/842/842_decompress.c
168
ret = next_bits(p, &index, bits);
lib/842/842_decompress.c
89
u8 *in = p->in, b = p->bit, bits = b + n;
lib/842/842_decompress.c
99
if (bits > 64)
lib/bitmap.c
231
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
234
unsigned int lim = bits/BITS_PER_LONG;
lib/bitmap.c
239
if (bits % BITS_PER_LONG)
lib/bitmap.c
241
BITMAP_LAST_WORD_MASK(bits));
lib/bitmap.c
247
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
250
unsigned int nr = BITS_TO_LONGS(bits);
lib/bitmap.c
258
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
261
unsigned int nr = BITS_TO_LONGS(bits);
lib/bitmap.c
269
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
272
unsigned int lim = bits/BITS_PER_LONG;
lib/bitmap.c
277
if (bits % BITS_PER_LONG)
lib/bitmap.c
279
BITMAP_LAST_WORD_MASK(bits));
lib/bitmap.c
297
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
299
unsigned int k, lim = bits/BITS_PER_LONG;
lib/bitmap.c
304
if (bits % BITS_PER_LONG)
lib/bitmap.c
305
if ((bitmap1[k] & bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits))
lib/bitmap.c
312
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
314
unsigned int k, lim = bits/BITS_PER_LONG;
lib/bitmap.c
319
if (bits % BITS_PER_LONG)
lib/bitmap.c
320
if ((bitmap1[k] & ~bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits))
lib/bitmap.c
326
#define BITMAP_WEIGHT(FETCH, bits) \
lib/bitmap.c
328
unsigned int __bits = (bits), idx, w = 0; \
lib/bitmap.c
339
unsigned int __bitmap_weight(const unsigned long *bitmap, unsigned int bits)
lib/bitmap.c
341
return BITMAP_WEIGHT(bitmap[idx], bits);
lib/bitmap.c
346
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
348
return BITMAP_WEIGHT(bitmap1[idx] & bitmap2[idx], bits);
lib/bitmap.c
353
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
355
return BITMAP_WEIGHT(bitmap1[idx] & ~bitmap2[idx], bits);
lib/bitmap.c
360
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
362
return BITMAP_WEIGHT(({dst[idx] = bitmap1[idx] | bitmap2[idx]; dst[idx]; }), bits);
lib/bitmap.c
367
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
369
return BITMAP_WEIGHT(({dst[idx] = bitmap1[idx] ^ bitmap2[idx]; dst[idx]; }), bits);
lib/bitmap.c
38
const unsigned long *bitmap2, unsigned int bits)
lib/bitmap.c
40
unsigned int k, lim = bits/BITS_PER_LONG;
lib/bitmap.c
45
if (bits % BITS_PER_LONG)
lib/bitmap.c
46
if ((bitmap1[k] ^ bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits))
lib/bitmap.c
56
unsigned int bits)
lib/bitmap.c
561
const unsigned long *new, int bits)
lib/bitmap.c
563
int w = bitmap_weight(new, bits);
lib/bitmap.c
564
int n = bitmap_pos_to_ord(old, oldbit, bits);
lib/bitmap.c
568
return find_nth_bit(new, bits, n % w);
lib/bitmap.c
58
unsigned int k, lim = bits / BITS_PER_LONG;
lib/bitmap.c
66
if (!(bits % BITS_PER_LONG))
lib/bitmap.c
680
const unsigned long *relmap, unsigned int bits)
lib/bitmap.c
686
bitmap_zero(dst, bits);
lib/bitmap.c
699
for_each_set_bit(n, relmap, bits) {
lib/bitmap.c
70
return (tmp & BITMAP_LAST_WORD_MASK(bits)) == 0;
lib/bitmap.c
74
void __bitmap_complement(unsigned long *dst, const unsigned long *src, unsigned int bits)
lib/bitmap.c
76
unsigned int k, lim = BITS_TO_LONGS(bits);
lib/crc/crc4.c
26
uint8_t crc4(uint8_t c, uint64_t x, int bits)
lib/crc/crc4.c
31
x &= (1ull << bits) - 1;
lib/crc/crc4.c
34
bits = (bits + 3) & ~0x3;
lib/crc/crc4.c
37
for (i = bits - 4; i >= 0; i -= 4)
lib/crc/tests/crc_kunit.c
282
.bits = 7,
lib/crc/tests/crc_kunit.c
305
.bits = 16,
lib/crc/tests/crc_kunit.c
329
.bits = 16,
lib/crc/tests/crc_kunit.c
356
.bits = 32,
lib/crc/tests/crc_kunit.c
380
.bits = 32,
lib/crc/tests/crc_kunit.c
404
.bits = 32,
lib/crc/tests/crc_kunit.c
42
int bits;
lib/crc/tests/crc_kunit.c
431
.bits = 64,
lib/crc/tests/crc_kunit.c
456
.bits = 64,
lib/crc/tests/crc_kunit.c
62
return (u64)-1 >> (64 - v->bits);
lib/crc/tests/crc_kunit.c
78
(v->bits - 1);
lib/crc/tests/crc_kunit.c
79
if (crc & (1ULL << (v->bits - 1)))
lib/decompress_bunzip2.c
118
unsigned int bits = 0;
lib/decompress_bunzip2.c
138
bits = bd->inbufBits & ((1ULL << bd->inbufBitCount) - 1);
lib/decompress_bunzip2.c
140
bits <<= bits_wanted;
lib/decompress_bunzip2.c
149
bits |= (bd->inbufBits >> bd->inbufBitCount) & ((1ULL << bits_wanted) - 1);
lib/decompress_bunzip2.c
151
return bits;
lib/dynamic_debug.c
653
curr_bits = old_bits = *dcp->bits;
lib/dynamic_debug.c
684
totct += ddebug_apply_class_bitmap(dcp, &curr_bits, dcp->bits);
lib/dynamic_debug.c
685
*dcp->bits = curr_bits;
lib/dynamic_debug.c
757
totct += ddebug_apply_class_bitmap(dcp, &inrep, dcp->bits);
lib/dynamic_debug.c
758
*dcp->bits = inrep;
lib/dynamic_debug.c
799
return scnprintf(buffer, PAGE_SIZE, "0x%lx\n", *dcp->bits);
lib/genalloc.c
254
bit = find_first_bit(chunk->bits, end_bit);
lib/genalloc.c
304
start_bit = algo(chunk->bits, end_bit, start_bit,
lib/genalloc.c
308
remain = bitmap_set_ll(chunk->bits, start_bit, nbits);
lib/genalloc.c
310
remain = bitmap_clear_ll(chunk->bits, start_bit,
lib/genalloc.c
507
remain = bitmap_clear_ll(chunk->bits, start_bit, nbits);
lib/list_sort.c
209
size_t bits;
lib/list_sort.c
213
for (bits = count; bits & 1; bits >>= 1)
lib/list_sort.c
216
if (likely(bits)) {
lib/sbitmap.c
417
unsigned int bits = min(8 - byte_bits, word_bits);
lib/sbitmap.c
419
byte |= (word & (BIT(bits) - 1)) << byte_bits;
lib/sbitmap.c
420
byte_bits += bits;
lib/sbitmap.c
427
word >>= bits;
lib/sbitmap.c
428
word_bits -= bits;
lib/test_bitmap.c
761
DECLARE_BITMAP(bits, CLUMP_EXP_NUMBITS);
lib/test_bitmap.c
766
bitmap_zero(bits, CLUMP_EXP_NUMBITS);
lib/test_bitmap.c
767
bitmap_set(bits, 0, 1); /* 0x01 */
lib/test_bitmap.c
768
bitmap_set(bits, 9, 1); /* 0x02 */
lib/test_bitmap.c
769
bitmap_set(bits, 27, 3); /* 0x28 */
lib/test_bitmap.c
770
bitmap_set(bits, 35, 3); /* 0x28 */
lib/test_bitmap.c
771
bitmap_set(bits, 40, 4); /* 0x0F */
lib/test_bitmap.c
772
bitmap_set(bits, 48, 8); /* 0xFF */
lib/test_bitmap.c
773
bitmap_set(bits, 56, 1); /* 0x05 - part 1 */
lib/test_bitmap.c
774
bitmap_set(bits, 58, 1); /* 0x05 - part 2 */
lib/test_bitmap.c
776
for_each_set_clump8(start, clump, bits, CLUMP_EXP_NUMBITS)
lib/test_bpf.c
654
int bits = (flags & F_ALU32) ? 32 : 64;
lib/test_bpf.c
655
int len = (2 + 7 * bits) * ARRAY_SIZE(regs) + 3;
lib/test_bpf.c
671
for (imm = 0; imm < bits; imm++) {
lib/test_bpf.c
787
int bits = (flags & F_ALU32) ? 32 : 64;
lib/test_bpf.c
788
int len = 3 + 6 * bits;
lib/test_bpf.c
799
for (val = 0; val < bits; val++) {
lib/test_context-analysis.c
359
unsigned long bits;
lib/test_context-analysis.c
360
int counter __guarded_by(__bitlock(3, &bits));
lib/test_context-analysis.c
369
bit_spin_lock(3, &d->bits);
lib/test_context-analysis.c
371
bit_spin_unlock(3, &d->bits);
lib/test_context-analysis.c
373
bit_spin_lock(3, &d->bits);
lib/test_context-analysis.c
375
__bit_spin_unlock(3, &d->bits);
lib/test_context-analysis.c
377
if (bit_spin_trylock(3, &d->bits)) {
lib/test_context-analysis.c
379
bit_spin_unlock(3, &d->bits);
lib/test_dynamic_debug.c
45
.bits = &bits_##_model, \
lib/tests/printf_kunit.c
586
unsigned long *bits = bitmap_zalloc(nbits, GFP_KERNEL);
lib/tests/printf_kunit.c
587
if (!bits)
lib/tests/printf_kunit.c
590
bitmap_set(bits, 1, 20);
lib/tests/printf_kunit.c
591
bitmap_set(bits, 60000, 15);
lib/tests/printf_kunit.c
592
test("1-20,60000-60014", "%*pbl", nbits, bits);
lib/tests/printf_kunit.c
593
bitmap_free(bits);
lib/tests/printf_kunit.c
599
DECLARE_BITMAP(bits, 20);
lib/tests/printf_kunit.c
603
bitmap_zero(bits, 20);
lib/tests/printf_kunit.c
604
test("00000|00000", "%20pb|%*pb", bits, 20, bits);
lib/tests/printf_kunit.c
605
test("|", "%20pbl|%*pbl", bits, 20, bits);
lib/tests/printf_kunit.c
608
set_bit(primes[i], bits);
lib/tests/printf_kunit.c
609
test("a28ac|a28ac", "%20pb|%*pb", bits, 20, bits);
lib/tests/printf_kunit.c
610
test("2-3,5,7,11,13,17,19|2-3,5,7,11,13,17,19", "%20pbl|%*pbl", bits, 20, bits);
lib/tests/printf_kunit.c
612
bitmap_fill(bits, 20);
lib/tests/printf_kunit.c
613
test("fffff|fffff", "%20pb|%*pb", bits, 20, bits);
lib/tests/printf_kunit.c
614
test("0-19|0-19", "%20pbl|%*pbl", bits, 20, bits);
lib/ubsan.c
155
unsigned bits = type_bit_width(type);
lib/ubsan.c
159
return bits <= inline_bits;
lib/zlib_deflate/deftree.c
175
int bits; /* bit counter */
lib/zlib_deflate/deftree.c
218
for (bits = 0; bits <= MAX_BITS; bits++) bl_count[bits] = 0;
lib/zlib_deflate/deftree.c
366
int bits; /* bit length */
lib/zlib_deflate/deftree.c
371
for (bits = 0; bits <= MAX_BITS; bits++) s->bl_count[bits] = 0;
lib/zlib_deflate/deftree.c
380
bits = tree[tree[n].Dad].Len + 1;
lib/zlib_deflate/deftree.c
381
if (bits > max_length) bits = max_length, overflow++;
lib/zlib_deflate/deftree.c
382
tree[n].Len = (ush)bits;
lib/zlib_deflate/deftree.c
387
s->bl_count[bits]++;
lib/zlib_deflate/deftree.c
391
s->opt_len += (ulg)f * (bits + xbits);
lib/zlib_deflate/deftree.c
401
bits = max_length-1;
lib/zlib_deflate/deftree.c
402
while (s->bl_count[bits] == 0) bits--;
lib/zlib_deflate/deftree.c
403
s->bl_count[bits]--; /* move one leaf down the tree */
lib/zlib_deflate/deftree.c
404
s->bl_count[bits+1] += 2; /* move one overflow item as its brother */
lib/zlib_deflate/deftree.c
417
for (bits = max_length; bits != 0; bits--) {
lib/zlib_deflate/deftree.c
418
n = s->bl_count[bits];
lib/zlib_deflate/deftree.c
422
if (tree[m].Len != (unsigned) bits) {
lib/zlib_deflate/deftree.c
423
Trace((stderr,"code %d bits %d->%d\n", m, tree[m].Len, bits));
lib/zlib_deflate/deftree.c
424
s->opt_len += ((long)bits - (long)tree[m].Len)
lib/zlib_deflate/deftree.c
426
tree[m].Len = (ush)bits;
lib/zlib_deflate/deftree.c
449
int bits; /* bit index */
lib/zlib_deflate/deftree.c
455
for (bits = 1; bits <= MAX_BITS; bits++) {
lib/zlib_deflate/deftree.c
456
next_code[bits] = code = (code + bl_count[bits-1]) << 1;
lib/zlib_dfltcc/dfltcc_inflate.c
110
if (state->bits != 0) {
lib/zlib_dfltcc/dfltcc_inflate.c
113
state->bits = 0;
lib/zlib_dfltcc/dfltcc_inflate.c
129
param->sbb = state->bits;
lib/zlib_dfltcc/dfltcc_inflate.c
142
state->bits = param->sbb;
lib/zlib_dfltcc/dfltcc_util.h
102
const char *bits,
lib/zlib_dfltcc/dfltcc_util.h
106
return bits[n / 8] & (1 << (7 - (n % 8)));
lib/zlib_dfltcc/dfltcc_util.h
110
char *bits,
lib/zlib_dfltcc/dfltcc_util.h
114
bits[n / 8] &= ~(1 << (7 - (n % 8)));
lib/zlib_inflate/inffast.c
110
bits = state->bits;
lib/zlib_inflate/inffast.c
119
if (bits < 15) {
lib/zlib_inflate/inffast.c
120
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
121
bits += 8;
lib/zlib_inflate/inffast.c
122
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
123
bits += 8;
lib/zlib_inflate/inffast.c
127
op = (unsigned)(this.bits);
lib/zlib_inflate/inffast.c
129
bits -= op;
lib/zlib_inflate/inffast.c
138
if (bits < op) {
lib/zlib_inflate/inffast.c
139
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
140
bits += 8;
lib/zlib_inflate/inffast.c
144
bits -= op;
lib/zlib_inflate/inffast.c
146
if (bits < 15) {
lib/zlib_inflate/inffast.c
147
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
148
bits += 8;
lib/zlib_inflate/inffast.c
149
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
150
bits += 8;
lib/zlib_inflate/inffast.c
154
op = (unsigned)(this.bits);
lib/zlib_inflate/inffast.c
156
bits -= op;
lib/zlib_inflate/inffast.c
161
if (bits < op) {
lib/zlib_inflate/inffast.c
162
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
163
bits += 8;
lib/zlib_inflate/inffast.c
164
if (bits < op) {
lib/zlib_inflate/inffast.c
165
hold += (unsigned long)(*in++) << bits;
lib/zlib_inflate/inffast.c
166
bits += 8;
lib/zlib_inflate/inffast.c
178
bits -= op;
lib/zlib_inflate/inffast.c
311
len = bits >> 3;
lib/zlib_inflate/inffast.c
313
bits -= len << 3;
lib/zlib_inflate/inffast.c
314
hold &= (1U << bits) - 1;
lib/zlib_inflate/inffast.c
323
state->bits = bits;
lib/zlib_inflate/inffast.c
83
unsigned bits; /* local strm->bits */
lib/zlib_inflate/inflate.c
172
if (state->mode == STORED && state->bits == 0) {
lib/zlib_inflate/inflate.c
192
bits = state->bits; \
lib/zlib_inflate/inflate.c
203
state->bits = bits; \
lib/zlib_inflate/inflate.c
210
bits = 0; \
lib/zlib_inflate/inflate.c
219
hold += (unsigned long)(*next++) << bits; \
lib/zlib_inflate/inflate.c
220
bits += 8; \
lib/zlib_inflate/inflate.c
227
while (bits < (unsigned)(n)) \
lib/zlib_inflate/inflate.c
239
bits -= (unsigned)(n); \
lib/zlib_inflate/inflate.c
245
hold >>= bits & 7; \
lib/zlib_inflate/inflate.c
246
bits -= bits & 7; \
lib/zlib_inflate/inflate.c
338
unsigned bits; /* bits in bit buffer */
lib/zlib_inflate/inflate.c
47
state->bits = 0;
lib/zlib_inflate/inflate.c
509
if ((unsigned)(this.bits) <= bits) break;
lib/zlib_inflate/inflate.c
513
NEEDBITS(this.bits);
lib/zlib_inflate/inflate.c
514
DROPBITS(this.bits);
lib/zlib_inflate/inflate.c
519
NEEDBITS(this.bits + 2);
lib/zlib_inflate/inflate.c
520
DROPBITS(this.bits);
lib/zlib_inflate/inflate.c
531
NEEDBITS(this.bits + 3);
lib/zlib_inflate/inflate.c
532
DROPBITS(this.bits);
lib/zlib_inflate/inflate.c
538
NEEDBITS(this.bits + 7);
lib/zlib_inflate/inflate.c
539
DROPBITS(this.bits);
lib/zlib_inflate/inflate.c
588
if ((unsigned)(this.bits) <= bits) break;
lib/zlib_inflate/inflate.c
595
(BITS(last.bits + last.op) >> last.bits)];
lib/zlib_inflate/inflate.c
596
if ((unsigned)(last.bits + this.bits) <= bits) break;
lib/zlib_inflate/inflate.c
599
DROPBITS(last.bits);
lib/zlib_inflate/inflate.c
601
DROPBITS(this.bits);
lib/zlib_inflate/inflate.c
630
if ((unsigned)(this.bits) <= bits) break;
lib/zlib_inflate/inflate.c
637
(BITS(last.bits + last.op) >> last.bits)];
lib/zlib_inflate/inflate.c
638
if ((unsigned)(last.bits + this.bits) <= bits) break;
lib/zlib_inflate/inflate.c
641
DROPBITS(last.bits);
lib/zlib_inflate/inflate.c
643
DROPBITS(this.bits);
lib/zlib_inflate/inflate.c
757
strm->data_type = state->bits + (state->last ? 64 : 0) +
lib/zlib_inflate/inflate.h
92
unsigned bits; /* number of bits in "in" */
lib/zlib_inflate/inftrees.c
105
this.bits = (unsigned char)1;
lib/zlib_inflate/inftrees.c
109
*bits = 1;
lib/zlib_inflate/inftrees.c
204
this.bits = (unsigned char)(len - drop);
lib/zlib_inflate/inftrees.c
24
code **table, unsigned *bits, unsigned short *work)
lib/zlib_inflate/inftrees.c
272
(*table)[low].bits = (unsigned char)root;
lib/zlib_inflate/inftrees.c
285
this.bits = (unsigned char)(len - drop);
lib/zlib_inflate/inftrees.c
293
this.bits = (unsigned char)len;
lib/zlib_inflate/inftrees.c
313
*bits = root;
lib/zlib_inflate/inftrees.c
99
root = *bits;
lib/zlib_inflate/inftrees.h
29
unsigned char bits; /* bits in this part of the code */
lib/zlib_inflate/inftrees.h
58
unsigned *bits, unsigned short *work);
lib/zstd/decompress/huf_decompress.c
1523
U64 bits[4];
lib/zstd/decompress/huf_decompress.c
1531
ZSTD_memcpy(&bits, &args->bits, sizeof(bits));
lib/zstd/decompress/huf_decompress.c
1605
int const index = (int)(bits[(_stream)] >> 53); \
lib/zstd/decompress/huf_decompress.c
1608
bits[(_stream)] <<= (entry.nbBits) & 0x3F; \
lib/zstd/decompress/huf_decompress.c
1617
int const ctz = ZSTD_countTrailingZeros64(bits[(_stream)]); \
lib/zstd/decompress/huf_decompress.c
1621
bits[(_stream)] = MEM_read64(ip[(_stream)]) | 1; \
lib/zstd/decompress/huf_decompress.c
1622
bits[(_stream)] <<= nbBits; \
lib/zstd/decompress/huf_decompress.c
1657
ZSTD_memcpy(&args->bits, &bits, sizeof(bits));
lib/zstd/decompress/huf_decompress.c
173
U64 bits[4];
lib/zstd/decompress/huf_decompress.c
260
args->bits[0] = HUF_initFastDStream(args->ip[0]);
lib/zstd/decompress/huf_decompress.c
261
args->bits[1] = HUF_initFastDStream(args->ip[1]);
lib/zstd/decompress/huf_decompress.c
262
args->bits[2] = HUF_initFastDStream(args->ip[2]);
lib/zstd/decompress/huf_decompress.c
263
args->bits[3] = HUF_initFastDStream(args->ip[3]);
lib/zstd/decompress/huf_decompress.c
294
bit->bitsConsumed = ZSTD_countTrailingZeros64(args->bits[stream]);
lib/zstd/decompress/huf_decompress.c
720
U64 bits[4];
lib/zstd/decompress/huf_decompress.c
728
ZSTD_memcpy(&bits, &args->bits, sizeof(bits));
lib/zstd/decompress/huf_decompress.c
786
int const index = (int)(bits[(_stream)] >> 53); \
lib/zstd/decompress/huf_decompress.c
788
bits[(_stream)] <<= (entry & 0x3F); \
lib/zstd/decompress/huf_decompress.c
794
int const ctz = ZSTD_countTrailingZeros64(bits[(_stream)]); \
lib/zstd/decompress/huf_decompress.c
799
bits[(_stream)] = MEM_read64(ip[(_stream)]) | 1; \
lib/zstd/decompress/huf_decompress.c
800
bits[(_stream)] <<= nbBits; \
lib/zstd/decompress/huf_decompress.c
825
ZSTD_memcpy(&args->bits, &bits, sizeof(bits));
mm/kasan/kasan_test_c.c
1769
long *bits;
mm/kasan/kasan_test_c.c
1778
bits = kzalloc(sizeof(*bits) + 1, GFP_KERNEL);
mm/kasan/kasan_test_c.c
1779
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, bits);
mm/kasan/kasan_test_c.c
1786
kasan_bitops_modify(test, BITS_PER_LONG, bits);
mm/kasan/kasan_test_c.c
1791
kasan_bitops_test_and_modify(test, BITS_PER_LONG + BITS_PER_BYTE, bits);
mm/kasan/kasan_test_c.c
1793
kfree(bits);
mm/kasan/kasan_test_c.c
1798
long *bits;
mm/kasan/kasan_test_c.c
1804
bits = kzalloc(48, GFP_KERNEL);
mm/kasan/kasan_test_c.c
1805
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, bits);
mm/kasan/kasan_test_c.c
1808
kasan_bitops_modify(test, BITS_PER_LONG, (void *)bits + 48);
mm/kasan/kasan_test_c.c
1809
kasan_bitops_test_and_modify(test, BITS_PER_LONG + BITS_PER_BYTE, (void *)bits + 48);
mm/kasan/kasan_test_c.c
1811
kfree(bits);
mm/mempolicy.c
1674
unsigned long bits = min_t(unsigned long, maxnode, BITS_PER_LONG);
mm/mempolicy.c
1677
if (get_bitmap(&t, &nmask[(maxnode - 1) / BITS_PER_LONG], bits))
mm/mempolicy.c
1680
if (maxnode - bits >= MAX_NUMNODES) {
mm/mempolicy.c
1681
maxnode -= bits;
mm/mm_init.c
1769
highest = find_last_bit(node_possible_map.bits, MAX_NUMNODES);
mm/percpu.c
1073
static bool pcpu_is_populated(struct pcpu_chunk *chunk, int bit_off, int bits,
mm/percpu.c
1079
end = PFN_UP((bit_off + bits) * PCPU_MIN_ALLOC_SIZE);
mm/percpu.c
1114
int bit_off, bits, next_off;
mm/percpu.c
1125
bits = 0;
mm/percpu.c
1126
pcpu_for_each_fit_region(chunk, alloc_bits, align, bit_off, bits) {
mm/percpu.c
1127
if (!pop_only || pcpu_is_populated(chunk, bit_off, bits,
mm/percpu.c
1132
bits = 0;
mm/percpu.c
1279
int bit_off, bits, end, oslot, freed;
mm/percpu.c
1295
bits = end - bit_off;
mm/percpu.c
1296
bitmap_clear(chunk->alloc_map, bit_off, bits);
mm/percpu.c
1298
freed = bits * PCPU_MIN_ALLOC_SIZE;
mm/percpu.c
1306
pcpu_block_update_hint_free(chunk, bit_off, bits);
mm/percpu.c
1749
size_t bits, bit_align;
mm/percpu.c
1767
bits = size >> PCPU_MIN_ALLOC_SHIFT;
mm/percpu.c
1800
off = pcpu_find_block_fit(chunk, bits, bit_align, is_atomic);
mm/percpu.c
1806
off = pcpu_alloc_area(chunk, bits, bit_align, off);
mm/percpu.c
1819
off = pcpu_find_block_fit(chunk, bits, bit_align,
mm/percpu.c
1827
off = pcpu_alloc_area(chunk, bits, bit_align, off);
mm/percpu.c
317
static bool pcpu_check_block_hint(struct pcpu_block_md *block, int bits,
mm/percpu.c
323
return bit_off + bits <= block->contig_hint;
mm/percpu.c
366
int *bits)
mm/percpu.c
372
*bits = 0;
mm/percpu.c
376
if (*bits) {
mm/percpu.c
377
*bits += block->left_free;
mm/percpu.c
391
*bits = block->contig_hint;
mm/percpu.c
392
if (*bits && block->contig_hint_start >= block_off &&
mm/percpu.c
393
*bits + block->contig_hint_start < PCPU_BITMAP_BLOCK_BITS) {
mm/percpu.c
401
*bits = block->right_free;
mm/percpu.c
421
int align, int *bit_off, int *bits)
mm/percpu.c
427
*bits = 0;
mm/percpu.c
431
if (*bits) {
mm/percpu.c
432
*bits += block->left_free;
mm/percpu.c
433
if (*bits >= alloc_bits)
mm/percpu.c
440
*bits = ALIGN(block->contig_hint_start, align) -
mm/percpu.c
448
block->contig_hint >= *bits + alloc_bits) {
mm/percpu.c
451
*bits += alloc_bits + block->contig_hint_start -
mm/percpu.c
461
*bits = PCPU_BITMAP_BLOCK_BITS - *bit_off;
mm/percpu.c
463
if (*bits >= alloc_bits)
mm/percpu.c
477
#define pcpu_for_each_md_free_region(chunk, bit_off, bits) \
mm/percpu.c
478
for (pcpu_next_md_free_region((chunk), &(bit_off), &(bits)); \
mm/percpu.c
480
(bit_off) += (bits) + 1, \
mm/percpu.c
481
pcpu_next_md_free_region((chunk), &(bit_off), &(bits)))
mm/percpu.c
483
#define pcpu_for_each_fit_region(chunk, alloc_bits, align, bit_off, bits) \
mm/percpu.c
485
&(bits)); \
mm/percpu.c
487
(bit_off) += (bits), \
mm/percpu.c
489
&(bits)))
mm/percpu.c
713
int bits)
mm/percpu.c
716
int e_off = s_off + bits;
mm/percpu.c
748
int bit_off, bits;
mm/percpu.c
761
bits = 0;
mm/percpu.c
762
pcpu_for_each_md_free_region(chunk, bit_off, bits)
mm/percpu.c
763
pcpu_block_update(chunk_md, bit_off, bit_off + bits);
mm/percpu.c
809
int bits)
mm/percpu.c
824
e_index = pcpu_off_to_block_index(bit_off + bits - 1);
mm/percpu.c
826
e_off = pcpu_off_to_block_off(bit_off + bits - 1) + 1;
mm/percpu.c
846
s_off + bits);
mm/percpu.c
851
s_off + bits))
mm/percpu.c
858
s_off + bits)) {
mm/percpu.c
929
bit_off + bits))
mm/percpu.c
941
bit_off + bits))
mm/percpu.c
964
int bits)
mm/percpu.c
979
e_index = pcpu_off_to_block_index(bit_off + bits - 1);
mm/percpu.c
981
e_off = pcpu_off_to_block_off(bit_off + bits - 1) + 1;
net/ceph/crush/mapper.c
265
int bits = __builtin_clz(x & 0x1FFFF) - 16;
net/ceph/crush/mapper.c
266
x <<= bits;
net/ceph/crush/mapper.c
267
iexpon = 15 - bits;
net/core/flow_dissector.c
360
memcpy(key->ct_labels, cl->bits, sizeof(key->ct_labels));
net/ethtool/bitset.c
271
struct nlattr *bits;
net/ethtool/bitset.c
274
bits = nla_nest_start(skb, ETHTOOL_A_BITSET_BITS);
net/ethtool/bitset.c
275
if (!bits)
net/ethtool/bitset.c
295
nla_nest_end(skb, bits);
net/ipv4/fib_trie.c
118
#define IS_TNODE(n) ((n)->bits)
net/ipv4/fib_trie.c
119
#define IS_LEAF(n) (!(n)->bits)
net/ipv4/fib_trie.c
124
unsigned char bits; /* 2log(KEYLENGTH) bits needed */
net/ipv4/fib_trie.c
140
#define tn_bits kv[0].bits
net/ipv4/fib_trie.c
1464
if (index >= (1ul << n->bits))
net/ipv4/fib_trie.c
1768
if (cindex >> pn->bits)
net/ipv4/fib_trie.c
1784
if (cindex >= (1ul << pn->bits)) {
net/ipv4/fib_trie.c
1852
cindex = 1ul << n->bits;
net/ipv4/fib_trie.c
1970
cindex = 1ul << n->bits;
net/ipv4/fib_trie.c
2041
cindex = 1ul << n->bits;
net/ipv4/fib_trie.c
2114
cindex = 1ul << n->bits;
net/ipv4/fib_trie.c
216
return (1ul << tn->bits) & ~(1ul);
net/ipv4/fib_trie.c
2516
if (n->bits < MAX_STAT_DEPTH)
net/ipv4/fib_trie.c
2517
s->nodesizes[n->bits]++;
net/ipv4/fib_trie.c
2782
&prf, KEYLENGTH - n->pos - n->bits, n->bits,
net/ipv4/fib_trie.c
315
static struct tnode *tnode_alloc(int bits)
net/ipv4/fib_trie.c
320
if (bits > TNODE_VMALLOC_MAX)
net/ipv4/fib_trie.c
324
size = TNODE_SIZE(1ul << bits);
net/ipv4/fib_trie.c
361
l->bits = 0;
net/ipv4/fib_trie.c
371
static struct key_vector *tnode_new(t_key key, int pos, int bits)
net/ipv4/fib_trie.c
373
unsigned int shift = pos + bits;
net/ipv4/fib_trie.c
378
BUG_ON(!bits || (shift > KEYLENGTH));
net/ipv4/fib_trie.c
380
tnode = tnode_alloc(bits);
net/ipv4/fib_trie.c
385
sizeof(struct key_vector *) << bits);
net/ipv4/fib_trie.c
387
if (bits == KEYLENGTH)
net/ipv4/fib_trie.c
390
tnode->empty_children = 1ul << bits;
net/ipv4/fib_trie.c
395
tn->bits = bits;
net/ipv4/fib_trie.c
406
return n && ((n->pos + n->bits) == tn->pos) && IS_TNODE(n);
net/ipv4/fib_trie.c
490
tnode_free_size += TNODE_SIZE(1ul << tn->bits);
net/ipv4/fib_trie.c
540
tn = tnode_new(oldtnode->key, oldtnode->pos - 1, oldtnode->bits + 1);
net/ipv4/fib_trie.c
571
if (inode->bits == 1) {
net/ipv4/fib_trie.c
591
node1 = tnode_new(inode->key | m, inode->pos, inode->bits - 1);
net/ipv4/fib_trie.c
594
node0 = tnode_new(inode->key, inode->pos, inode->bits - 1);
net/ipv4/fib_trie.c
635
tn = tnode_new(oldtnode->key, oldtnode->pos + 1, oldtnode->bits - 1);
net/ipv4/fib_trie.c
713
slen_max = min_t(unsigned char, tn->pos + tn->bits - 1, tn->slen);
net/ipv4/fib_trie.c
824
return (used > 1) && (tn->bits > 1) && ((100 * used) < threshold);
net/ipv4/fib_trie.c
834
if ((tn->bits == KEYLENGTH) && tn_info(tn)->full_children)
net/ipv4/fib_trie.c
959
if (index >= (1ul << n->bits)) {
net/ipv4/inet_diag.c
439
static int bitstring_match(const __be32 *a1, const __be32 *a2, int bits)
net/ipv4/inet_diag.c
441
int words = bits >> 5;
net/ipv4/inet_diag.c
443
bits &= 0x1f;
net/ipv4/inet_diag.c
449
if (bits) {
net/ipv4/inet_diag.c
456
mask = htonl((0xffffffff) << (32 - bits));
net/ipv6/af_inet6.c
849
(np->rxopt.bits.hopopts || np->rxopt.bits.ohopopts)) ||
net/ipv6/af_inet6.c
851
np->rxopt.bits.rxflow) ||
net/ipv6/af_inet6.c
852
(opt->srcrt && (np->rxopt.bits.srcrt ||
net/ipv6/af_inet6.c
853
np->rxopt.bits.osrcrt)) ||
net/ipv6/af_inet6.c
855
(np->rxopt.bits.dstopts || np->rxopt.bits.odstopts)))
net/ipv6/datagram.c
392
if (!np->rxopt.bits.rxpmtu)
net/ipv6/datagram.c
601
if (np->rxopt.bits.rxinfo) {
net/ipv6/datagram.c
639
if (np->rxopt.bits.rxhlim) {
net/ipv6/datagram.c
644
if (np->rxopt.bits.rxtclass) {
net/ipv6/datagram.c
649
if (np->rxopt.bits.rxflow) {
net/ipv6/datagram.c
656
if (np->rxopt.bits.hopopts && (opt->flags & IP6SKB_HOPBYHOP)) {
net/ipv6/datagram.c
665
(np->rxopt.bits.dstopts || np->rxopt.bits.srcrt)) {
net/ipv6/datagram.c
691
if (np->rxopt.bits.dstopts)
net/ipv6/datagram.c
699
if (np->rxopt.bits.srcrt)
net/ipv6/datagram.c
721
if (np->rxopt.bits.rxoinfo) {
net/ipv6/datagram.c
728
if (np->rxopt.bits.rxohlim) {
net/ipv6/datagram.c
732
if (np->rxopt.bits.ohopopts && (opt->flags & IP6SKB_HOPBYHOP)) {
net/ipv6/datagram.c
739
if (np->rxopt.bits.odstopts && opt->dst0) {
net/ipv6/datagram.c
746
if (np->rxopt.bits.osrcrt && opt->srcrt) {
net/ipv6/datagram.c
753
if (np->rxopt.bits.odstopts && opt->dst1) {
net/ipv6/datagram.c
760
if (np->rxopt.bits.rxorigdstaddr) {
net/ipv6/datagram.c
782
if (np->rxopt.bits.recvfragsize && opt->frag_max_size) {
net/ipv6/ipv6_sockglue.c
1127
if (np->rxopt.bits.rxinfo) {
net/ipv6/ipv6_sockglue.c
1136
if (np->rxopt.bits.rxhlim) {
net/ipv6/ipv6_sockglue.c
1141
if (np->rxopt.bits.rxtclass) {
net/ipv6/ipv6_sockglue.c
1146
if (np->rxopt.bits.rxoinfo) {
net/ipv6/ipv6_sockglue.c
1156
if (np->rxopt.bits.rxohlim) {
net/ipv6/ipv6_sockglue.c
1161
if (np->rxopt.bits.rxflow) {
net/ipv6/ipv6_sockglue.c
1190
val = np->rxopt.bits.rxinfo;
net/ipv6/ipv6_sockglue.c
1194
val = np->rxopt.bits.rxoinfo;
net/ipv6/ipv6_sockglue.c
1198
val = np->rxopt.bits.rxhlim;
net/ipv6/ipv6_sockglue.c
1202
val = np->rxopt.bits.rxohlim;
net/ipv6/ipv6_sockglue.c
1206
val = np->rxopt.bits.srcrt;
net/ipv6/ipv6_sockglue.c
1210
val = np->rxopt.bits.osrcrt;
net/ipv6/ipv6_sockglue.c
1232
val = np->rxopt.bits.hopopts;
net/ipv6/ipv6_sockglue.c
1236
val = np->rxopt.bits.ohopopts;
net/ipv6/ipv6_sockglue.c
1240
val = np->rxopt.bits.dstopts;
net/ipv6/ipv6_sockglue.c
1244
val = np->rxopt.bits.odstopts;
net/ipv6/ipv6_sockglue.c
1252
val = np->rxopt.bits.rxtclass;
net/ipv6/ipv6_sockglue.c
1256
val = np->rxopt.bits.rxflow;
net/ipv6/ipv6_sockglue.c
1260
val = np->rxopt.bits.rxpmtu;
net/ipv6/ipv6_sockglue.c
1299
val = np->rxopt.bits.rxorigdstaddr;
net/ipv6/ipv6_sockglue.c
1417
val = np->rxopt.bits.recvfragsize;
net/ipv6/ipv6_sockglue.c
641
np->rxopt.bits.rxinfo = valbool;
net/ipv6/ipv6_sockglue.c
648
np->rxopt.bits.rxoinfo = valbool;
net/ipv6/ipv6_sockglue.c
655
np->rxopt.bits.rxhlim = valbool;
net/ipv6/ipv6_sockglue.c
662
np->rxopt.bits.rxohlim = valbool;
net/ipv6/ipv6_sockglue.c
669
np->rxopt.bits.srcrt = valbool;
net/ipv6/ipv6_sockglue.c
676
np->rxopt.bits.osrcrt = valbool;
net/ipv6/ipv6_sockglue.c
683
np->rxopt.bits.hopopts = valbool;
net/ipv6/ipv6_sockglue.c
690
np->rxopt.bits.ohopopts = valbool;
net/ipv6/ipv6_sockglue.c
697
np->rxopt.bits.dstopts = valbool;
net/ipv6/ipv6_sockglue.c
704
np->rxopt.bits.odstopts = valbool;
net/ipv6/ipv6_sockglue.c
730
np->rxopt.bits.rxtclass = valbool;
net/ipv6/ipv6_sockglue.c
737
np->rxopt.bits.rxflow = valbool;
net/ipv6/ipv6_sockglue.c
744
np->rxopt.bits.rxpmtu = valbool;
net/ipv6/ipv6_sockglue.c
772
np->rxopt.bits.rxorigdstaddr = valbool;
net/ipv6/ipv6_sockglue.c
939
np->rxopt.bits.recvfragsize = valbool;
net/ipv6/raw.c
450
if (np->rxopt.bits.rxpmtu && READ_ONCE(np->rxpmtu))
net/ipv6/syncookies.c
215
np->rxopt.bits.rxinfo || np->rxopt.bits.rxoinfo ||
net/ipv6/syncookies.c
216
np->rxopt.bits.rxhlim || np->rxopt.bits.rxohlim) {
net/ipv6/tcp_ipv6.c
1685
if (np->rxopt.bits.rxinfo || np->rxopt.bits.rxoinfo)
net/ipv6/tcp_ipv6.c
1687
if (np->rxopt.bits.rxhlim || np->rxopt.bits.rxohlim)
net/ipv6/tcp_ipv6.c
1690
if (np->rxopt.bits.rxflow || np->rxopt.bits.rxtclass)
net/ipv6/tcp_ipv6.c
797
np->rxopt.bits.rxinfo ||
net/ipv6/tcp_ipv6.c
798
np->rxopt.bits.rxoinfo || np->rxopt.bits.rxhlim ||
net/ipv6/tcp_ipv6.c
799
np->rxopt.bits.rxohlim || inet6_test_bit(REPFLOW, sk_listener))) {
net/ipv6/udp.c
478
if (np->rxopt.bits.rxpmtu && READ_ONCE(np->rxpmtu))
net/mac80211/mesh.c
1145
unsigned long bits[] = { BITMAP_FROM_U64(changed) };
net/mac80211/mesh.c
1152
for_each_set_bit(bit, bits, sizeof(changed) * BITS_PER_BYTE)
net/mac80211/tests/s1g_tim.c
101
oct, i, bits, sub);
net/mac80211/tests/s1g_tim.c
34
char bits[9];
net/mac80211/tests/s1g_tim.c
49
byte_to_bitstr(ctrl, bits);
net/mac80211/tests/s1g_tim.c
51
bits, ctrl);
net/mac80211/tests/s1g_tim.c
58
byte_to_bitstr(blkmap, bits);
net/mac80211/tests/s1g_tim.c
60
oct, bits, blkmap);
net/mac80211/tests/s1g_tim.c
68
byte_to_bitstr(sub, bits);
net/mac80211/tests/s1g_tim.c
72
oct, sb, bits, sub);
net/mac80211/tests/s1g_tim.c
80
byte_to_bitstr(single, bits);
net/mac80211/tests/s1g_tim.c
82
oct, bits, single);
net/mac80211/tests/s1g_tim.c
89
byte_to_bitstr(len, bits);
net/mac80211/tests/s1g_tim.c
91
oct, len, bits, len);
net/mac80211/tests/s1g_tim.c
97
byte_to_bitstr(sub, bits);
net/netfilter/ipset/ip_set_bitmap_ip.c
238
range_to_mask(u32 from, u32 to, u8 *bits)
net/netfilter/ipset/ip_set_bitmap_ip.c
242
*bits = 32;
net/netfilter/ipset/ip_set_bitmap_ip.c
243
while (--(*bits) > 0 && mask && (to & mask) != from)
net/netfilter/ipvs/ip_vs_core.c
217
t->bits = order_base_2(buckets);
net/netfilter/ipvs/ip_vs_ctl.c
3173
t ? t->size : 0, t ? t->bits : 0, t ? t->lfactor : 0);
net/netfilter/ipvs/ip_vs_ctl.c
3239
t ? t->size : 0, t ? t->bits : 0, t ? t->lfactor : 0);
net/netfilter/nf_conntrack_h323_asn1.c
163
static int nf_h323_error_boundary(struct bitstr *bs, size_t bytes, size_t bits)
net/netfilter/nf_conntrack_h323_asn1.c
165
bits += bs->bit;
net/netfilter/nf_conntrack_h323_asn1.c
166
bytes += bits / BITS_PER_BYTE;
net/netfilter/nf_conntrack_h323_asn1.c
167
if (bits % BITS_PER_BYTE > 0)
net/netfilter/nf_conntrack_labels.c
41
size = sizeof(labels->bits);
net/netfilter/nf_conntrack_labels.c
45
dst = (u32 *) labels->bits;
net/netfilter/nf_conntrack_labels.c
59
int nf_connlabels_get(struct net *net, unsigned int bits)
net/netfilter/nf_conntrack_labels.c
63
if (BIT_WORD(bits) >= NF_CT_LABELS_MAX_SIZE / sizeof(long))
net/netfilter/nf_conntrack_netlink.c
409
return nla_total_size(sizeof(labels->bits));
net/netfilter/nf_conntrack_netlink.c
424
if (labels->bits[i] != 0)
net/netfilter/nf_conntrack_netlink.c
425
return nla_put(skb, CTA_LABELS, sizeof(labels->bits),
net/netfilter/nf_conntrack_netlink.c
426
labels->bits);
net/netfilter/nf_conntrack_netlink.c
428
} while (i < ARRAY_SIZE(labels->bits));
net/netfilter/nft_ct.c
120
memcpy(dest, labels->bits, NF_CT_LABELS_MAX_SIZE);
net/netfilter/xt_connlabel.c
36
if (test_bit(info->bit, labels->bits))
net/netfilter/xt_connlabel.c
40
if (!test_and_set_bit(info->bit, labels->bits))
net/openvswitch/conntrack.c
179
memcpy(labels, cl->bits, OVS_CT_LABELS_LEN);
net/openvswitch/conntrack.c
403
u32 *dst = (u32 *)cl->bits;
net/openvswitch/conntrack.c
417
memcpy(&key->ct.labels, cl->bits, OVS_CT_LABELS_LEN);
net/openvswitch/conntrack.c
439
memcpy(&key->ct.labels, cl->bits, OVS_CT_LABELS_LEN);
net/sched/act_ct.c
199
memcpy(act_ct_labels, ct_labels->bits, NF_CT_LABELS_MAX_SIZE);
net/xfrm/xfrm_hash.h
32
static inline u32 __bits2mask32(__u8 bits)
net/xfrm/xfrm_hash.h
36
if (bits == 0)
net/xfrm/xfrm_hash.h
38
else if (bits < 32)
net/xfrm/xfrm_hash.h
39
mask32 <<= (32 - bits);
samples/vfs/test-statx.c
157
unsigned char bits, mbits;
samples/vfs/test-statx.c
175
bits = stx->stx_attributes >> byte;
samples/vfs/test-statx.c
182
else if (bits & 0x80)
samples/vfs/test-statx.c
186
bits <<= 1;
scripts/dtc/data.c
158
struct data data_append_integer(struct data d, uint64_t value, int bits)
scripts/dtc/data.c
165
switch (bits) {
scripts/dtc/data.c
183
die("Invalid literal size (%d)\n", bits);
scripts/dtc/dtc-parser.y
374
unsigned long long bits;
scripts/dtc/dtc-parser.y
377
bits = $2;
scripts/dtc/dtc-parser.y
379
switch (bits) {
scripts/dtc/dtc-parser.y
387
bits = 32;
scripts/dtc/dtc-parser.y
391
$$.bits = bits;
scripts/dtc/dtc-parser.y
396
$$.bits = 32;
scripts/dtc/dtc-parser.y
42
int bits;
scripts/dtc/dtc.h
179
struct data data_append_integer(struct data d, uint64_t word, int bits);
scripts/kconfig/menu.c
808
unsigned long long bits = 0;
scripts/kconfig/menu.c
814
if (bits & (1ULL << i)) {
scripts/kconfig/menu.c
850
bits <<= 1;
scripts/kconfig/menu.c
853
bits |= 1;
scripts/kconfig/menu.c
855
bits &= ~1;
scripts/kconfig/menu.c
862
bits >>= 1;
scripts/kconfig/menu.c
869
bits |= 1;
scripts/kconfig/menu.c
871
bits &= ~1;
sound/core/oss/pcm_plugin.c
277
if (formats.bits[0] & lower_32_bits(linfmts))
sound/core/oss/pcm_plugin.c
278
formats.bits[0] |= lower_32_bits(linfmts);
sound/core/oss/pcm_plugin.c
279
if (formats.bits[1] & upper_32_bits(linfmts))
sound/core/oss/pcm_plugin.c
280
formats.bits[1] |= upper_32_bits(linfmts);
sound/core/pcm_dmaengine.c
451
int bits = snd_pcm_format_physical_width(i);
sound/core/pcm_dmaengine.c
457
switch (bits) {
sound/core/pcm_dmaengine.c
463
if (addr_widths & (1 << (bits / 8)))
sound/core/pcm_dmaengine.c
59
int bits;
sound/core/pcm_dmaengine.c
61
bits = params_physical_width(params);
sound/core/pcm_dmaengine.c
62
if (bits < 8 || bits > 64)
sound/core/pcm_dmaengine.c
64
else if (bits == 8)
sound/core/pcm_dmaengine.c
66
else if (bits == 16)
sound/core/pcm_dmaengine.c
68
else if (bits == 24)
sound/core/pcm_dmaengine.c
70
else if (bits <= 32)
sound/core/pcm_drm_eld.c
238
#define GRAB_BITS(buf, byte, lowbit, bits) \
sound/core/pcm_drm_eld.c
241
BUILD_BUG_ON(bits > 8); \
sound/core/pcm_drm_eld.c
242
BUILD_BUG_ON(bits <= 0); \
sound/core/pcm_drm_eld.c
244
(buf[byte] >> (lowbit)) & ((1 << (bits)) - 1); \
sound/core/pcm_drm_eld.c
414
static const unsigned int bits[] = { 8, 16, 20, 24, 32 };
sound/core/pcm_drm_eld.c
417
for (i = 0, j = 0; i < ARRAY_SIZE(bits); i++)
sound/core/pcm_drm_eld.c
419
j += scnprintf(buf + j, buflen - j, " %d", bits[i]);
sound/core/pcm_lib.c
1224
*maskp->bits &= mask;
sound/core/pcm_lib.c
1225
memset(maskp->bits + 1, 0, (SNDRV_MASK_MAX-32) / 8); /* clear rest */
sound/core/pcm_lib.c
1226
if (*maskp->bits == 0)
sound/core/pcm_lib.c
1246
maskp->bits[0] &= (u_int32_t)mask;
sound/core/pcm_lib.c
1247
maskp->bits[1] &= (u_int32_t)(mask >> 32);
sound/core/pcm_lib.c
1248
memset(maskp->bits + 2, 0, (SNDRV_MASK_MAX-64) / 8); /* clear rest */
sound/core/pcm_lib.c
1249
if (! maskp->bits[0] && ! maskp->bits[1])
sound/core/pcm_native.c
2457
int bits;
sound/core/pcm_native.c
2460
bits = snd_pcm_format_physical_width(k);
sound/core/pcm_native.c
2461
if (bits <= 0)
sound/core/pcm_native.c
2463
if ((unsigned)bits < i->min || (unsigned)bits > i->max)
sound/core/pcm_native.c
2480
int bits;
sound/core/pcm_native.c
2483
bits = snd_pcm_format_physical_width(k);
sound/core/pcm_native.c
2484
if (bits <= 0)
sound/core/pcm_native.c
2486
if (t.min > (unsigned)bits)
sound/core/pcm_native.c
2487
t.min = bits;
sound/core/pcm_native.c
2488
if (t.max < (unsigned)bits)
sound/core/pcm_native.c
2489
t.max = bits;
sound/core/pcm_native.c
2553
m.bits[0] |= *subformats;
sound/core/pcm_native.c
4125
params->masks[i].bits[0] = oparams->masks[i];
sound/core/pcm_native.c
4144
oparams->masks[i] = params->masks[i].bits[0];
sound/core/pcm_native.c
786
unsigned int bits;
sound/core/pcm_native.c
856
bits = snd_pcm_format_physical_width(runtime->format);
sound/core/pcm_native.c
857
runtime->sample_bits = bits;
sound/core/pcm_native.c
858
bits *= runtime->channels;
sound/core/pcm_native.c
859
runtime->frame_bits = bits;
sound/core/pcm_native.c
861
while (bits % 8 != 0) {
sound/core/pcm_native.c
862
bits *= 2;
sound/core/pcm_native.c
865
runtime->byte_align = bits / 8;
sound/core/pcm_param_trace.h
50
memcpy(__entry->prev_bits, prev->bits, sizeof(__u32) * 8);
sound/core/pcm_param_trace.h
51
memcpy(__entry->curr_bits, curr->bits, sizeof(__u32) * 8);
sound/drivers/aloop.c
998
m.bits[0] = (u_int32_t)cable->hw.formats;
sound/drivers/aloop.c
999
m.bits[1] = (u_int32_t)(cable->hw.formats >> 32);
sound/drivers/vx/vx_uer.c
214
void vx_set_iec958_status(struct vx_core *chip, unsigned int bits)
sound/drivers/vx/vx_uer.c
222
vx_write_one_cbit(chip, i, bits & (1 << i));
sound/firewire/dice/dice-transaction.c
138
u32 bits;
sound/firewire/dice/dice-transaction.c
149
bits = be32_to_cpup(data);
sound/firewire/dice/dice-transaction.c
152
dice->notification_bits |= bits;
sound/firewire/dice/dice-transaction.c
157
if (bits & NOTIFY_CLOCK_ACCEPTED)
sound/hda/common/codec.c
1267
int dir, unsigned int bits)
sound/hda/common/codec.c
1272
if (query_amp_caps(codec, nid, dir) & bits)
sound/hda/common/codec.c
4089
static const unsigned int bits[] = { 8, 16, 20, 24, 32 };
sound/hda/common/codec.c
4092
for (i = 0, j = 0; i < ARRAY_SIZE(bits); i++)
sound/hda/common/codec.c
4094
j += scnprintf(buf + j, buflen - j, " %d", bits[i]);
sound/hda/common/controller.c
161
unsigned int format_val, stream_tag, bits;
sound/hda/common/controller.c
173
bits = snd_hdac_stream_format_bits(runtime->format, SNDRV_PCM_SUBFORMAT_STD, hinfo->maxbps);
sound/hda/common/controller.c
175
format_val = snd_hdac_spdif_stream_format(runtime->channels, bits, runtime->rate, ctls);
sound/hda/common/hda_local.h
555
int dir, unsigned int bits);
sound/hda/core/device.c
762
unsigned int bits;
sound/hda/core/device.c
770
bits = snd_pcm_hw_params_bits(¶ms);
sound/hda/core/device.c
772
return min(bits, maxbits);
sound/hda/core/device.c
773
return bits;
sound/hda/core/device.c
785
unsigned int snd_hdac_stream_format(unsigned int channels, unsigned int bits, unsigned int rate)
sound/hda/core/device.c
804
switch (bits) {
sound/hda/core/device.c
837
unsigned int snd_hdac_spdif_stream_format(unsigned int channels, unsigned int bits,
sound/hda/core/device.c
840
unsigned int val = snd_hdac_stream_format(channels, bits, rate);
sound/isa/ad1816a/ad1816a_lib.c
368
unsigned short bits;
sound/isa/ad1816a/ad1816a_lib.c
372
bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
sound/isa/ad1816a/ad1816a_lib.c
374
if (!(bits & AD1816A_TIMER_ENABLE)) {
sound/isa/es1688/es1688_lib.c
296
unsigned int bits, divider;
sound/isa/es1688/es1688_lib.c
299
bits = 256 - runtime->rate_den;
sound/isa/es1688/es1688_lib.c
301
bits = 128 - runtime->rate_den;
sound/isa/es1688/es1688_lib.c
305
snd_es1688_write(chip, 0xa1, bits);
sound/isa/es18xx.c
384
unsigned int bits, div0;
sound/isa/es18xx.c
388
bits = 128 - runtime->rate_den;
sound/isa/es18xx.c
390
bits = 256 - runtime->rate_den;
sound/isa/es18xx.c
393
bits = 256 - runtime->rate_den;
sound/isa/es18xx.c
395
bits = 128 - runtime->rate_den;
sound/isa/es18xx.c
402
snd_es18xx_mixer_write(chip, 0x70, bits);
sound/isa/es18xx.c
410
snd_es18xx_write(chip, 0xA1, bits);
sound/isa/wavefront/wavefront_synth.c
1852
int bits;
sound/isa/wavefront/wavefront_synth.c
1856
bits = 0x00;
sound/isa/wavefront/wavefront_synth.c
1859
bits = 0x08;
sound/isa/wavefront/wavefront_synth.c
1862
bits = 0x10;
sound/isa/wavefront/wavefront_synth.c
1865
bits = 0x18;
sound/isa/wavefront/wavefront_synth.c
1870
bits = -1;
sound/isa/wavefront/wavefront_synth.c
1873
return bits;
sound/isa/wavefront/wavefront_synth.c
1899
int bits;
sound/isa/wavefront/wavefront_synth.c
1904
bits = snd_wavefront_interrupt_bits(dev, dev->irq);
sound/isa/wavefront/wavefront_synth.c
1946
outb (0x80 | 0x40 | bits, dev->data_port);
sound/mips/ad1843.c
252
int w, m, mask, bits;
sound/mips/ad1843.c
255
bits = 0;
sound/mips/ad1843.c
268
bits |= (value << fp->lo_bit) & m;
sound/mips/ad1843.c
276
w = (w & ~mask) | bits;
sound/pci/ac97/ac97_codec.c
1073
*lo_max = tbl->bits & 0xff;
sound/pci/ac97/ac97_codec.c
1074
*hi_max = (tbl->bits >> 8) & 0xff;
sound/pci/ac97/ac97_codec.c
2469
unsigned int power_up, bits;
sound/pci/ac97/ac97_codec.c
2494
bits = 0;
sound/pci/ac97/ac97_codec.c
2496
bits = power_regs[i].mask;
sound/pci/ac97/ac97_codec.c
2498
power_regs[i].mask, bits);
sound/pci/ac97/ac97_pcm.c
161
unsigned short old, bits, reg, mask;
sound/pci/ac97/ac97_pcm.c
170
case 48000: bits = 0; break;
sound/pci/ac97/ac97_pcm.c
171
case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
sound/pci/ac97/ac97_pcm.c
184
case 44100: bits = AC97_SC_SPSR_44K; break;
sound/pci/ac97/ac97_pcm.c
185
case 48000: bits = AC97_SC_SPSR_48K; break;
sound/pci/ac97/ac97_pcm.c
186
case 32000: bits = AC97_SC_SPSR_32K; break;
sound/pci/ac97/ac97_pcm.c
197
if (old != bits) {
sound/pci/ac97/ac97_pcm.c
199
snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
sound/pci/au88x0/au88x0_core.c
2815
vortex_translateformat(vortex_t * vortex, char bits, char nch, int encod)
sound/pci/au88x0/au88x0_core.c
2819
if ((bits != 8) && (bits != 16))
sound/pci/au88x0/au88x0_core.c
2824
if (bits == 0x10)
sound/pci/au88x0/au88x0_core.c
2828
if (bits == 8)
sound/pci/au88x0/au88x0_core.c
2855
static void vortex_cdmacore_setformat(vortex_t * vortex, int bits, int nch)
sound/pci/au88x0/au88x0_core.c
2859
d = ((bits >> 3) * nch);
sound/pci/ca0106/ca0106_main.c
921
u32 bits;
sound/pci/ca0106/ca0106_main.c
953
bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
sound/pci/ca0106/ca0106_main.c
954
bits |= extended;
sound/pci/ca0106/ca0106_main.c
955
snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
sound/pci/ca0106/ca0106_main.c
956
bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
sound/pci/ca0106/ca0106_main.c
957
bits |= basic;
sound/pci/ca0106/ca0106_main.c
958
snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
sound/pci/ca0106/ca0106_main.c
962
bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
sound/pci/ca0106/ca0106_main.c
963
bits &= ~basic;
sound/pci/ca0106/ca0106_main.c
964
snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
sound/pci/ca0106/ca0106_main.c
965
bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
sound/pci/ca0106/ca0106_main.c
966
bits &= ~extended;
sound/pci/ca0106/ca0106_main.c
967
snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
sound/pci/ca0106/ca0106_mixer.c
317
static void decode_spdif_bits(unsigned char *status, unsigned int bits)
sound/pci/ca0106/ca0106_mixer.c
319
status[0] = (bits >> 0) & 0xff;
sound/pci/ca0106/ca0106_mixer.c
320
status[1] = (bits >> 8) & 0xff;
sound/pci/ca0106/ca0106_mixer.c
321
status[2] = (bits >> 16) & 0xff;
sound/pci/ca0106/ca0106_mixer.c
322
status[3] = (bits >> 24) & 0xff;
sound/pci/echoaudio/echoaudio.c
109
fmt.bits[0] &= ~SNDRV_PCM_FMTBIT_S32_BE;
sound/pci/echoaudio/echoaudio.c
115
fmt.bits[0] &= ~(SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_BE);
sound/pci/echoaudio/echoaudio.c
135
if (f->bits[0] == SNDRV_PCM_FMTBIT_S32_BE) {
sound/pci/echoaudio/echoaudio.c
146
if (f->bits[0] == SNDRV_PCM_FMTBIT_U8) {
sound/pci/echoaudio/echoaudio.c
168
fmask = fmt.bits[0] + ((u64)fmt.bits[1] << 32);
sound/pci/echoaudio/echoaudio.c
186
fmt.bits[0] &= (u32)fmask;
sound/pci/echoaudio/echoaudio.c
187
fmt.bits[1] &= (u32)(fmask >> 32);
sound/pci/echoaudio/echoaudio.c
204
fmask = f->bits[0] + ((u64)f->bits[1] << 32);
sound/pci/emu10k1/emupcm.c
1520
unsigned int nval[2], bits;
sound/pci/emu10k1/emupcm.c
1525
for (idx = 0, bits = 0; idx < nefx; idx++)
sound/pci/emu10k1/emupcm.c
1528
bits++;
sound/pci/emu10k1/emupcm.c
1531
if (bits == 9 || bits == 11 || bits == 13 || bits == 15 || bits > 16)
sound/pci/emu10k1/emupcm.c
1691
unsigned int bits;
sound/pci/emu10k1/emupcm.c
1692
bits = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
sound/pci/emu10k1/emupcm.c
1695
snd_emu10k1_ptr_write(emu, SPCS0 + i, 0, bits);
sound/pci/es1938.c
438
unsigned int bits, div0;
sound/pci/es1938.c
441
bits = 128 - runtime->rate_den;
sound/pci/es1938.c
443
bits = 256 - runtime->rate_den;
sound/pci/es1938.c
449
snd_es1938_mixer_write(chip, 0x70, bits);
sound/pci/es1938.c
452
snd_es1938_write(chip, 0xA1, bits);
sound/pci/ice1712/aureon.c
470
static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
sound/pci/ice1712/aureon.c
496
for (i = bits - 1; i >= 0; i--) {
sound/pci/ice1712/aureon.c
524
unsigned int data, int bits, unsigned char *buffer, int size)
sound/pci/ice1712/aureon.c
535
for (i = bits-1; i >= 0; i--) {
sound/pci/ice1712/delta.c
170
static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
sound/pci/ice1712/delta.c
181
if (bits & (1 << idx))
sound/pci/ice1712/ews.c
218
static void snd_ice1712_ews_cs8404_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
sound/pci/ice1712/ews.c
229
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_CS8404], &bits, 1)
sound/pci/ice1712/ews.c
237
if (bits != bytes[1]) {
sound/pci/ice1712/ews.c
238
bytes[1] = bits;
sound/pci/ice1712/ice1712.h
395
static inline void snd_ice1712_gpio_set_dir(struct snd_ice1712 *ice, unsigned int bits)
sound/pci/ice1712/ice1712.h
397
ice->gpio.set_dir(ice, bits);
sound/pci/ice1712/ice1712.h
405
static inline void snd_ice1712_gpio_set_mask(struct snd_ice1712 *ice, unsigned int bits)
sound/pci/ice1712/ice1712.h
407
ice->gpio.set_mask(ice, bits);
sound/pci/ice1712/ice1712.h
454
unsigned int mask, unsigned int bits)
sound/pci/ice1712/ice1712.h
462
val |= mask & bits;
sound/pci/ice1712/maya44.c
281
unsigned int bits)
sound/pci/ice1712/maya44.c
285
if ((data & mask) == bits)
sound/pci/ice1712/maya44.c
287
snd_ice1712_gpio_write(ice, (data & ~mask) | bits);
sound/pci/ice1712/phase.c
198
unsigned int data, int bits)
sound/pci/ice1712/phase.c
212
for (i = bits - 1; i >= 0; i--) {
sound/pci/ice1712/psc724.c
108
u32 st, bits;
sound/pci/ice1712/psc724.c
116
bits = snd_ice1712_gpio_read(ice) & ~PSC724_SPI_MASK;
sound/pci/ice1712/psc724.c
117
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/psc724.c
121
bits &= ~PSC724_SPI_CLK;
sound/pci/ice1712/psc724.c
125
bits |= PSC724_SPI_DATA;
sound/pci/ice1712/psc724.c
127
bits &= ~PSC724_SPI_DATA;
sound/pci/ice1712/psc724.c
128
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/psc724.c
131
bits |= PSC724_SPI_CLK;
sound/pci/ice1712/psc724.c
132
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/psc724.c
136
bits |= PSC724_SPI_LOAD;
sound/pci/ice1712/psc724.c
137
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/psc724.c
140
bits |= (PSC724_SPI_DATA | PSC724_SPI_CLK);
sound/pci/ice1712/psc724.c
141
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/psc724.c
157
unsigned int bits = snd_ice1712_gpio_read(ice);
sound/pci/ice1712/psc724.c
162
bits &= ~(GPIO_MUTE_ALL | GPIO_MUTE_SUR);
sound/pci/ice1712/psc724.c
164
bits |= GPIO_MUTE_ALL | GPIO_MUTE_SUR;
sound/pci/ice1712/psc724.c
165
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/se.c
123
unsigned int bits;
sound/pci/ice1712/se.c
135
bits = snd_ice1712_gpio_read(ice) & ~ALL_MASK;
sound/pci/ice1712/se.c
137
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/se.c
140
bits &= ~CLOCK;
sound/pci/ice1712/se.c
143
bits |= DATA;
sound/pci/ice1712/se.c
145
bits &= ~DATA;
sound/pci/ice1712/se.c
147
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/se.c
150
bits |= CLOCK;
sound/pci/ice1712/se.c
151
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/se.c
155
bits |= LOAD;
sound/pci/ice1712/se.c
156
snd_ice1712_gpio_write(ice, bits);
sound/pci/ice1712/se.c
159
bits |= (DATA | CLOCK);
sound/pci/ice1712/se.c
160
snd_ice1712_gpio_write(ice, bits);
sound/pci/lola/lola.h
484
void lola_pcm_update(struct lola *chip, struct lola_pcm *pcm, unsigned int bits);
sound/pci/lola/lola_pcm.c
553
void lola_pcm_update(struct lola *chip, struct lola_pcm *pcm, unsigned int bits)
sound/pci/lola/lola_pcm.c
558
for (i = 0; bits && i < num_streams; i++) {
sound/pci/lola/lola_pcm.c
559
if (bits & (1 << i)) {
sound/pci/lola/lola_pcm.c
563
bits &= ~(1 << i);
sound/pci/oxygen/oxygen_mixer.c
293
static void oxygen_to_iec958(u32 bits, struct snd_ctl_elem_value *value)
sound/pci/oxygen/oxygen_mixer.c
296
bits & (OXYGEN_SPDIF_NONAUDIO | OXYGEN_SPDIF_C |
sound/pci/oxygen/oxygen_mixer.c
299
bits >> OXYGEN_SPDIF_CATEGORY_SHIFT;
sound/pci/oxygen/oxygen_mixer.c
304
u32 bits;
sound/pci/oxygen/oxygen_mixer.c
306
bits = value->value.iec958.status[0] &
sound/pci/oxygen/oxygen_mixer.c
309
bits |= value->value.iec958.status[1] << OXYGEN_SPDIF_CATEGORY_SHIFT;
sound/pci/oxygen/oxygen_mixer.c
310
if (bits & OXYGEN_SPDIF_NONAUDIO)
sound/pci/oxygen/oxygen_mixer.c
311
bits |= OXYGEN_SPDIF_V;
sound/pci/oxygen/oxygen_mixer.c
312
return bits;
sound/pci/oxygen/oxygen_mixer.c
315
static inline void write_spdif_bits(struct oxygen *chip, u32 bits)
sound/pci/oxygen/oxygen_mixer.c
317
oxygen_write32_masked(chip, OXYGEN_SPDIF_OUTPUT_BITS, bits,
sound/pci/oxygen/oxygen_mixer.c
406
u32 bits;
sound/pci/oxygen/oxygen_mixer.c
408
bits = oxygen_read32(chip, OXYGEN_SPDIF_INPUT_BITS);
sound/pci/oxygen/oxygen_mixer.c
409
value->value.iec958.status[0] = bits;
sound/pci/oxygen/oxygen_mixer.c
410
value->value.iec958.status[1] = bits >> 8;
sound/pci/oxygen/oxygen_mixer.c
411
value->value.iec958.status[2] = bits >> 16;
sound/pci/oxygen/oxygen_mixer.c
412
value->value.iec958.status[3] = bits >> 24;
sound/soc/amd/acp/acp63.c
153
clk_pll.bits.fb_mult_int = 0x31;
sound/soc/amd/acp/acp63.c
154
clk_pll.bits.pll_spine_div = 0;
sound/soc/amd/acp/acp63.c
155
clk_pll.bits.gb_mult_frac = 0x26E9;
sound/soc/amd/acp/acp63.c
51
} bitfields, bits;
sound/soc/amd/vangogh/acp5x.h
132
} bitfields, bits;
sound/soc/amd/vangogh/acp5x.h
215
mclkgen.bits.i2stdm_master_mode = 0x1;
sound/soc/amd/vangogh/acp5x.h
217
mclkgen.bits.i2stdm_format_mode = 0x01;
sound/soc/amd/vangogh/acp5x.h
219
mclkgen.bits.i2stdm_format_mode = 0x00;
sound/soc/amd/vangogh/acp5x.h
221
mclkgen.bits.i2stdm_bclk_div_val = rtd->bclk_div;
sound/soc/amd/vangogh/acp5x.h
222
mclkgen.bits.i2stdm_lrclk_div_val = rtd->lrclk_div;
sound/soc/atmel/atmel-pdmic.c
365
int bits = params_width(params);
sound/soc/atmel/atmel-pdmic.c
384
switch (bits) {
sound/soc/atmel/atmel_ssc_dai.c
466
int dir, channels, bits;
sound/soc/atmel/atmel_ssc_dai.c
533
bits = 8;
sound/soc/atmel/atmel_ssc_dai.c
537
bits = 16;
sound/soc/atmel/atmel_ssc_dai.c
541
bits = 24;
sound/soc/atmel/atmel_ssc_dai.c
545
bits = 32;
sound/soc/atmel/atmel_ssc_dai.c
557
fslen_ext = (bits - 1) / 16;
sound/soc/atmel/atmel_ssc_dai.c
558
fslen = (bits - 1) % 16;
sound/soc/atmel/atmel_ssc_dai.c
648
| SSC_BF(RFMR_DATLEN, (bits - 1));
sound/soc/atmel/atmel_ssc_dai.c
658
| SSC_BF(TFMR_DATLEN, (bits - 1));
sound/soc/atmel/atmel_ssc_dai.c
662
bits);
sound/soc/codecs/ak5558.c
176
u8 bits;
sound/soc/codecs/ak5558.c
181
bits = AK5558_DIF_24BIT_MODE;
sound/soc/codecs/ak5558.c
184
bits = AK5558_DIF_32BIT_MODE;
sound/soc/codecs/ak5558.c
190
snd_soc_component_update_bits(component, AK5558_02_CONTROL1, AK5558_BITS, bits);
sound/soc/codecs/da732x.c
330
unsigned int bits;
sound/soc/codecs/da732x.c
334
bits = DA732X_HPF_DIS;
sound/soc/codecs/da732x.c
337
bits = DA732X_HPF_VOICE_EN;
sound/soc/codecs/da732x.c
340
bits = DA732X_HPF_MUSIC_EN;
sound/soc/codecs/da732x.c
346
snd_soc_component_update_bits(component, reg, DA732X_HPF_MASK, bits);
sound/soc/codecs/hda-dai.c
79
unsigned int bits;
sound/soc/codecs/hda-dai.c
86
bits = snd_hdac_stream_format_bits(runtime->format, runtime->subformat,
sound/soc/codecs/hda-dai.c
88
format = snd_hdac_stream_format(runtime->channels, bits, runtime->rate);
sound/soc/codecs/hdac_hda.c
221
unsigned int bits;
sound/soc/codecs/hdac_hda.c
227
bits = snd_hdac_stream_format_bits(params_format(params), SNDRV_PCM_SUBFORMAT_STD, maxbps);
sound/soc/codecs/hdac_hda.c
230
format_val = snd_hdac_stream_format(params_channels(params), bits, params_rate(params));
sound/soc/codecs/hdac_hdmi.c
470
unsigned int bits;
sound/soc/codecs/hdac_hdmi.c
475
bits = snd_hdac_stream_format_bits(params_format(hparams), SNDRV_PCM_SUBFORMAT_STD,
sound/soc/codecs/hdac_hdmi.c
477
format = snd_hdac_stream_format(params_channels(hparams), bits, params_rate(hparams));
sound/soc/codecs/max98388.c
695
int addr, bits;
sound/soc/codecs/max98388.c
763
bits = cnt % 8;
sound/soc/codecs/max98388.c
764
regmap_update_bits(max98388->regmap, addr, bits, bits);
sound/soc/codecs/tlv320aic31xx.c
388
unsigned int bits;
sound/soc/codecs/tlv320aic31xx.c
390
int ret = regmap_read(aic31xx->regmap, reg, &bits);
sound/soc/codecs/tlv320aic31xx.c
392
while ((bits & mask) != wbits && counter && !ret) {
sound/soc/codecs/tlv320aic31xx.c
394
ret = regmap_read(aic31xx->regmap, reg, &bits);
sound/soc/codecs/tlv320aic31xx.c
397
if ((bits & mask) != wbits) {
sound/soc/codecs/tlv320aic31xx.c
400
__func__, reg, bits, wbits, ret, mask,
sound/soc/codecs/wm8996.c
1736
int bits, i, bclk_rate, best;
sound/soc/codecs/wm8996.c
1780
bits = params_width(params);
sound/soc/codecs/wm8996.c
1781
if (bits < 0)
sound/soc/codecs/wm8996.c
1782
return bits;
sound/soc/codecs/wm8996.c
1783
aifdata |= (bits << WM8996_AIF1TX_WL_SHIFT) | bits;
sound/soc/codecs/zl38060.c
43
#define CFG_CLK_PCLK(bits) ((bits - 1) << CFG_CLK_PCLK_SHIFT)
sound/soc/hisilicon/hi6210-i2s.c
256
u32 bits = 0, rate = 0, signed_data = 0, fmt = 0;
sound/soc/hisilicon/hi6210-i2s.c
265
bits = HII2S_BITS_16;
sound/soc/hisilicon/hi6210-i2s.c
271
bits = HII2S_BITS_24;
sound/soc/hisilicon/hi6210-i2s.c
310
switch (bits) {
sound/soc/hisilicon/hi6210-i2s.c
312
i2s->bits = 32;
sound/soc/hisilicon/hi6210-i2s.c
316
i2s->bits = 16;
sound/soc/hisilicon/hi6210-i2s.c
322
i2s->channel_length = i2s->channels * i2s->bits;
sound/soc/hisilicon/hi6210-i2s.c
448
val |= (bits << HII2S_I2S_CFG__S2_CODEC_IO_WORDLENGTH_SHIFT);
sound/soc/hisilicon/hi6210-i2s.c
47
u8 bits;
sound/soc/intel/avs/pcm.c
456
unsigned int bits;
sound/soc/intel/avs/pcm.c
467
bits = snd_hdac_stream_format_bits(params_format(p), params_subformat(p),
sound/soc/intel/avs/pcm.c
469
format_val = snd_hdac_stream_format(params_channels(p), bits, params_rate(p));
sound/soc/intel/avs/pcm.c
752
unsigned int bits;
sound/soc/intel/avs/pcm.c
768
bits = snd_hdac_stream_format_bits(runtime->format, runtime->subformat,
sound/soc/intel/avs/pcm.c
770
format_val = snd_hdac_stream_format(runtime->channels, bits, runtime->rate);
sound/soc/intel/boards/bytcht_es8316.c
284
int ret, bits;
sound/soc/intel/boards/bytcht_es8316.c
293
bits = 16;
sound/soc/intel/boards/bytcht_es8316.c
297
bits = 24;
sound/soc/intel/boards/bytcht_es8316.c
315
ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
sound/soc/intel/boards/bytcr_rt5640.c
1521
int ret, bits;
sound/soc/intel/boards/bytcr_rt5640.c
1531
bits = 16;
sound/soc/intel/boards/bytcr_rt5640.c
1535
bits = 24;
sound/soc/intel/boards/bytcr_rt5640.c
1552
ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
sound/soc/intel/boards/bytcr_rt5651.c
702
int ret, bits;
sound/soc/intel/boards/bytcr_rt5651.c
712
bits = 16;
sound/soc/intel/boards/bytcr_rt5651.c
716
bits = 24;
sound/soc/intel/boards/bytcr_rt5651.c
735
ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
sound/soc/intel/boards/bytcr_wm5102.c
385
int ret, bits;
sound/soc/intel/boards/bytcr_wm5102.c
396
bits = 24;
sound/soc/intel/boards/bytcr_wm5102.c
400
bits = 16;
sound/soc/intel/boards/bytcr_wm5102.c
417
ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
sound/soc/intel/boards/cht_bsw_rt5672.c
272
int ret, bits;
sound/soc/intel/boards/cht_bsw_rt5672.c
281
bits = 16;
sound/soc/intel/boards/cht_bsw_rt5672.c
285
bits = 24;
sound/soc/intel/boards/cht_bsw_rt5672.c
310
ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
sound/soc/loongson/loongson_i2s.c
101
val |= bits;
sound/soc/loongson/loongson_i2s.c
67
u32 bits = params_width(params);
sound/soc/loongson/loongson_i2s.c
77
(bits * chans * fs * 2)) - 1;
sound/soc/loongson/loongson_i2s.c
81
val |= (bits << 24);
sound/soc/loongson/loongson_i2s.c
82
val |= (bits << 16);
sound/soc/loongson/loongson_i2s.c
90
(bits * chans * fs * 2)) - 1;
sound/soc/loongson/loongson_i2s.c
96
val |= (bits << 24);
sound/soc/loongson/loongson_i2s.c
99
val |= (bits << 16);
sound/soc/pxa/mmp-sspa.c
218
int bits;
sound/soc/pxa/mmp-sspa.c
223
bits = 8;
sound/soc/pxa/mmp-sspa.c
227
bits = 16;
sound/soc/pxa/mmp-sspa.c
231
bits = 24;
sound/soc/pxa/mmp-sspa.c
235
bits = 32;
sound/soc/pxa/mmp-sspa.c
259
sspa->sp |= SSPA_SP_FWID(bits - 1);
sound/soc/pxa/mmp-sspa.c
262
sspa->sp |= SSPA_TXSP_FPER(bits * 2 - 1);
sound/soc/pxa/mmp-sspa.c
266
params_channels(params) * bits);
sound/soc/renesas/rcar/dma.c
159
int bits = snd_pcm_format_physical_width(runtime->format);
sound/soc/renesas/rcar/dma.c
161
switch (bits) {
sound/soc/renesas/rcar/dma.c
172
dev_err(dev, "invalid format width %d\n", bits);
sound/soc/renesas/ssi.c
134
unsigned int bits, channels, swl, recv, i;
sound/soc/renesas/ssi.c
137
bits = params->msbits;
sound/soc/renesas/ssi.c
141
pr_debug("bits: %u channels: %u\n", bits, channels);
sound/soc/renesas/ssi.c
159
switch (bits) {
sound/soc/renesas/ssi.c
182
if ((bits > 16) && (bits <= 24)) {
sound/soc/renesas/ssi.c
183
bits = 24; /* these are padded by the SSI */
sound/soc/renesas/ssi.c
187
swl = (bits * channels) / 2;
sound/soc/sdca/sdca_asoc.c
1212
static u64 width_find_mask(unsigned int bits)
sound/soc/sdca/sdca_asoc.c
1214
switch (bits) {
sound/soc/soc-pcm.c
638
static void soc_pcm_set_msb(struct snd_pcm_substream *substream, int bits)
sound/soc/soc-pcm.c
643
if (!bits)
sound/soc/soc-pcm.c
646
ret = snd_pcm_hw_constraint_msbits(substream->runtime, 0, 0, bits);
sound/soc/soc-pcm.c
649
bits, ret);
sound/soc/soc-pcm.c
659
unsigned int bits = 0, cpu_bits = 0;
sound/soc/soc-pcm.c
665
bits = 0;
sound/soc/soc-pcm.c
668
bits = max(pcm_codec->sig_bits, bits);
sound/soc/soc-pcm.c
681
soc_pcm_set_msb(substream, bits);
sound/soc/sof/amd/acp.c
175
adata->dscr_info[desc_count].tx_cnt.bits.count = ACP_PAGE_SIZE;
sound/soc/sof/amd/acp.c
177
adata->dscr_info[desc_count].tx_cnt.bits.count = dsp_data_size;
sound/soc/sof/amd/acp.h
140
} bitfields, bits;
sound/soc/sof/intel/hda-dai-ops.c
198
unsigned int bits;
sound/soc/sof/intel/hda-dai-ops.c
205
bits = snd_hdac_stream_format_bits(params_format(params), SNDRV_PCM_SUBFORMAT_STD,
sound/soc/sof/intel/hda-dai-ops.c
207
format_val = snd_hdac_stream_format(params_channels(params), bits, params_rate(params));
sound/soc/sof/intel/hda-dai-ops.c
230
unsigned int bits;
sound/soc/sof/intel/hda-dai-ops.c
232
bits = snd_hdac_stream_format_bits(params_format(params), SNDRV_PCM_SUBFORMAT_STD,
sound/soc/sof/intel/hda-dai-ops.c
234
format_val = snd_hdac_stream_format(params_channels(params), bits, params_rate(params));
sound/soc/sof/intel/hda-dai-ops.c
250
unsigned int bits;
sound/soc/sof/intel/hda-dai-ops.c
262
bits = snd_hdac_stream_format_bits(format, SNDRV_PCM_SUBFORMAT_STD, width);
sound/soc/sof/intel/hda-dai-ops.c
263
format_val = snd_hdac_stream_format(channels, bits, params_rate(params));
sound/soc/sof/intel/hda-pcm.c
122
u32 bits = hda_dsp_get_bits(sdev, params_width(params));
sound/soc/sof/intel/hda-pcm.c
124
hstream->format_val = rate | bits | (params_channels(params) - 1);
sound/soc/sof/intel/hda-probes.c
78
u32 bits, rate;
sound/soc/sof/intel/hda-probes.c
86
bits = hda_dsp_get_bits(sdev, bps);
sound/soc/sof/intel/hda-probes.c
89
hstream->format_val = rate | bits | (params->codec.ch_out - 1);
sound/soc/sti/sti_uniperif.c
199
maskp->bits[0] &= (u_int32_t)format;
sound/soc/sti/sti_uniperif.c
200
maskp->bits[1] &= (u_int32_t)(format >> 32);
sound/soc/sti/sti_uniperif.c
202
memset(maskp->bits + 2, 0, (SNDRV_MASK_MAX - 64) / 8);
sound/soc/sti/sti_uniperif.c
204
if (!maskp->bits[0] && !maskp->bits[1])
sound/sparc/dbri.c
2010
fmt.bits[0] &= SNDRV_PCM_FMTBIT_S16_BE;
sound/sparc/dbri.c
2025
if (!(f->bits[0] & SNDRV_PCM_FMTBIT_S16_BE)) {
sound/usb/pcm.c
767
check_fmts.bits[0] = (u32)fp->formats;
sound/usb/pcm.c
768
check_fmts.bits[1] = (u32)(fp->formats >> 32);
sound/usb/pcm.c
936
oldbits[0] = fmt->bits[0];
sound/usb/pcm.c
937
oldbits[1] = fmt->bits[1];
sound/usb/pcm.c
938
fmt->bits[0] &= (u32)fbits;
sound/usb/pcm.c
939
fmt->bits[1] &= (u32)(fbits >> 32);
sound/usb/pcm.c
940
if (!fmt->bits[0] && !fmt->bits[1]) {
sound/usb/pcm.c
944
changed = (oldbits[0] != fmt->bits[0] || oldbits[1] != fmt->bits[1]);
sound/usb/pcm.c
945
hwc_debug(" --> %x:%x (changed = %d)\n", fmt->bits[0], fmt->bits[1], changed);
sound/usb/pcm.c
959
hwc_debug("hw_rule_format: %x:%x\n", fmt->bits[0], fmt->bits[1]);
sound/usb/stream.c
240
static struct snd_pcm_chmap_elem *convert_chmap(int channels, unsigned int bits,
sound/usb/stream.c
303
if (bits) {
sound/usb/stream.c
304
for (; bits && *maps; maps++, bits >>= 1) {
sound/usb/stream.c
305
if (bits & 1)
sound/xen/xen_snd_front_alsa.c
277
req.formats = to_sndif_formats_mask((u64)formats->bits[0] |
sound/xen/xen_snd_front_alsa.c
278
(u64)(formats->bits[1]) << 32);
sound/xen/xen_snd_front_alsa.c
306
mask.bits[0] = (u32)sndif_formats;
sound/xen/xen_snd_front_alsa.c
307
mask.bits[1] = (u32)(sndif_formats >> 32);
tools/arch/x86/include/uapi/asm/kvm.h
90
__u64 bits;
tools/bpf/bpftool/btf_dumper.c
19
#define BITS_PER_BYTE_MASKED(bits) ((bits) & BITS_PER_BYTE_MASK)
tools/bpf/bpftool/btf_dumper.c
20
#define BITS_ROUNDDOWN_BYTES(bits) ((bits) >> 3)
tools/bpf/bpftool/btf_dumper.c
21
#define BITS_ROUNDUP_BYTES(bits) \
tools/bpf/bpftool/btf_dumper.c
22
(BITS_ROUNDDOWN_BYTES(bits) + !!BITS_PER_BYTE_MASKED(bits))
tools/dma/dma_map_benchmark.c
125
map.dma_bits = bits;
tools/dma/dma_map_benchmark.c
37
int bits = 32, xdelay = 0, dir = DMA_MAP_BIDIRECTIONAL;
tools/dma/dma_map_benchmark.c
55
bits = atoi(optarg);
tools/dma/dma_map_benchmark.c
99
if (bits < 20 || bits > 64) {
tools/firewire/nosy-dump.c
708
uint32_t bits;
tools/firewire/nosy-dump.c
710
bits = get_bits(packet, offset, f->width);
tools/firewire/nosy-dump.c
711
printf("%s", f->value_names[bits]);
tools/firewire/nosy-dump.c
717
unsigned long long bits;
tools/firewire/nosy-dump.c
725
bits = get_bits(packet, offset, high_width);
tools/firewire/nosy-dump.c
726
bits = (bits << low_width) |
tools/firewire/nosy-dump.c
729
bits = get_bits(packet, offset, f->width);
tools/firewire/nosy-dump.c
732
printf("%s=0x%0*llx", f->name, (f->width + 3) / 4, bits);
tools/firewire/nosy-dump.c
735
data_length = bits;
tools/gpio/gpio-event-mon.c
60
values.bits = 0;
tools/gpio/gpio-event-mon.c
74
gpiotools_test_bit(values.bits, 0));
tools/gpio/gpio-event-mon.c
81
gpiotools_test_bit(values.bits, 0));
tools/gpio/gpio-event-mon.c
84
gpiotools_test_bit(values.bits, i));
tools/gpio/gpio-event-mon.c
86
gpiotools_test_bit(values.bits, i));
tools/gpio/gpio-hammer.c
47
values.bits = 0;
tools/gpio/gpio-hammer.c
63
fprintf(stdout, "%d", gpiotools_test_bit(values.bits, i));
tools/gpio/gpio-hammer.c
74
gpiotools_change_bit(&values.bits, i);
tools/gpio/gpio-hammer.c
93
gpiotools_test_bit(values.bits, i));
tools/gpio/gpio-utils.c
227
values[i] = gpiotools_test_bit(lv.bits, i);
tools/include/linux/bitmap.h
13
#define DECLARE_BITMAP(name,bits) \
tools/include/linux/bitmap.h
14
unsigned long name[BITS_TO_LONGS(bits)]
tools/include/linux/bitmap.h
16
unsigned int __bitmap_weight(const unsigned long *bitmap, int bits);
tools/include/linux/bitmap.h
18
const unsigned long *bitmap2, int bits);
tools/include/linux/bitmap.h
20
const unsigned long *bitmap2, unsigned int bits);
tools/include/linux/bitmap.h
22
const unsigned long *bitmap2, unsigned int bits);
tools/include/linux/bitmap.h
26
const unsigned long *bitmap2, unsigned int bits);
tools/include/linux/hash.h
16
#define hash_long(val, bits) hash_32(val, bits)
tools/include/linux/hash.h
18
#define hash_long(val, bits) hash_64(val, bits)
tools/include/linux/hash.h
65
static inline u32 hash_32(u32 val, unsigned int bits)
tools/include/linux/hash.h
68
return __hash_32(val) >> (32 - bits);
tools/include/linux/hash.h
74
static __always_inline u32 hash_64_generic(u64 val, unsigned int bits)
tools/include/linux/hash.h
78
return val * GOLDEN_RATIO_64 >> (64 - bits);
tools/include/linux/hash.h
81
return hash_32((u32)val ^ __hash_32(val >> 32), bits);
tools/include/linux/hash.h
85
static inline u32 hash_ptr(const void *ptr, unsigned int bits)
tools/include/linux/hash.h
87
return hash_long((unsigned long)ptr, bits);
tools/include/linux/hashtable.h
17
#define DEFINE_HASHTABLE(name, bits) \
tools/include/linux/hashtable.h
18
struct hlist_head name[1 << (bits)] = \
tools/include/linux/hashtable.h
19
{ [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT }
tools/include/linux/hashtable.h
21
#define DECLARE_HASHTABLE(name, bits) \
tools/include/linux/hashtable.h
22
struct hlist_head name[1 << (bits)]
tools/include/linux/hashtable.h
28
#define hash_min(val, bits) \
tools/include/linux/hashtable.h
29
(sizeof(val) <= 4 ? hash_32(val, bits) : hash_long(val, bits))
tools/lib/bitmap.c
10
unsigned int k, w = 0, lim = bits/BITS_PER_LONG;
tools/lib/bitmap.c
145
const unsigned long *bitmap2, unsigned int bits)
tools/lib/bitmap.c
148
unsigned int lim = bits/BITS_PER_LONG;
tools/lib/bitmap.c
15
if (bits % BITS_PER_LONG)
tools/lib/bitmap.c
153
if (bits % BITS_PER_LONG)
tools/lib/bitmap.c
155
BITMAP_LAST_WORD_MASK(bits));
tools/lib/bitmap.c
16
w += hweight_long(bitmap[k] & BITMAP_LAST_WORD_MASK(bits));
tools/lib/bitmap.c
160
const unsigned long *bitmap2, unsigned int bits)
tools/lib/bitmap.c
162
unsigned int k, lim = bits/BITS_PER_LONG;
tools/lib/bitmap.c
167
if (bits % BITS_PER_LONG)
tools/lib/bitmap.c
168
if ((bitmap1[k] & ~bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits))
tools/lib/bitmap.c
174
const unsigned long *bitmap2, unsigned int bits)
tools/lib/bitmap.c
177
unsigned int nr = BITS_TO_LONGS(bits);
tools/lib/bitmap.c
22
const unsigned long *bitmap2, int bits)
tools/lib/bitmap.c
25
int nr = BITS_TO_LONGS(bits);
tools/lib/bitmap.c
61
const unsigned long *bitmap2, unsigned int bits)
tools/lib/bitmap.c
64
unsigned int lim = bits/BITS_PER_LONG;
tools/lib/bitmap.c
69
if (bits % BITS_PER_LONG)
tools/lib/bitmap.c
71
BITMAP_LAST_WORD_MASK(bits));
tools/lib/bitmap.c
76
const unsigned long *bitmap2, unsigned int bits)
tools/lib/bitmap.c
78
unsigned int k, lim = bits/BITS_PER_LONG;
tools/lib/bitmap.c
8
unsigned int __bitmap_weight(const unsigned long *bitmap, int bits)
tools/lib/bitmap.c
83
if (bits % BITS_PER_LONG)
tools/lib/bitmap.c
84
if ((bitmap1[k] ^ bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits))
tools/lib/bitmap.c
91
const unsigned long *bitmap2, unsigned int bits)
tools/lib/bitmap.c
93
unsigned int k, lim = bits/BITS_PER_LONG;
tools/lib/bitmap.c
98
if (bits % BITS_PER_LONG)
tools/lib/bitmap.c
99
if ((bitmap1[k] & bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits))
tools/lib/bpf/btf_dump.c
870
int bits;
tools/lib/bpf/btf_dump.c
874
int new_off = 0, pad_bits = 0, bits, i;
tools/lib/bpf/btf_dump.c
899
pad_bits = pads[i].bits;
tools/lib/bpf/btf_dump.c
933
bits = min(next_off - cur_off, pad_bits);
tools/lib/bpf/btf_dump.c
934
if (bits == pad_bits) {
tools/lib/bpf/btf_dump.c
936
cur_off += bits;
tools/lib/bpf/btf_dump.c
947
pad_bits = pads[i].bits;
tools/lib/bpf/btf_dump.c
948
if (pad_bits < bits)
tools/lib/bpf/btf_dump.c
951
btf_dump_printf(d, "\n%s%s: %d;", pfx(lvl), pad_type, bits);
tools/lib/bpf/btf_dump.c
952
cur_off += bits;
tools/lib/bpf/hashmap.h
15
static inline size_t hash_bits(size_t h, int bits)
tools/lib/bpf/hashmap.h
18
if (bits == 0)
tools/lib/bpf/hashmap.h
23
return (h * 11400714819323198485llu) >> (__SIZEOF_LONG_LONG__ * 8 - bits);
tools/lib/bpf/hashmap.h
25
return (h * 2654435769lu) >> (__SIZEOF_LONG__ * 8 - bits);
tools/lib/bpf/libbpf_internal.h
741
static inline __u32 ror32(__u32 v, int bits)
tools/lib/bpf/libbpf_internal.h
743
return (v >> bits) | (v << (32 - bits));
tools/lib/bpf/libbpf_internal.h
84
#define BTF_TYPE_INT_ENC(name, encoding, bits_offset, bits, sz) \
tools/lib/bpf/libbpf_internal.h
86
BTF_INT_ENC(encoding, bits_offset, bits)
tools/lib/list_sort.c
202
size_t bits;
tools/lib/list_sort.c
206
for (bits = count; bits & 1; bits >>= 1)
tools/lib/list_sort.c
209
if (likely(bits)) {
tools/mm/page-types.c
1160
static void add_bits_filter(uint64_t mask, uint64_t bits)
tools/mm/page-types.c
1166
opt_bits[nr_bit_filters] = bits;
tools/mm/page-types.c
1212
uint64_t bits;
tools/mm/page-types.c
1218
bits = parse_flag_names(p + 1, 0);
tools/mm/page-types.c
1221
bits = parse_flag_names(p + 1, 0);
tools/mm/page-types.c
1224
bits = parse_flag_names(optarg, 0);
tools/mm/page-types.c
1227
bits = KPF_ALL_BITS;
tools/mm/page-types.c
1230
add_bits_filter(mask, bits);
tools/perf/arch/x86/util/intel-pt.c
100
static u64 intel_pt_masked_bits(u64 mask, u64 bits)
tools/perf/arch/x86/util/intel-pt.c
109
if (bits & top_bit)
tools/perf/arch/x86/util/intel-pt.c
113
bits <<= 1;
tools/perf/arch/x86/util/intel-pt.c
171
static int intel_pt_pick_bit(int bits, int target)
tools/perf/arch/x86/util/intel-pt.c
175
for (pos = 0; bits; bits >>= 1, pos++) {
tools/perf/arch/x86/util/intel-pt.c
176
if (bits & 1) {
tools/perf/arch/x86/util/intel-pt.c
501
u64 bits;
tools/perf/arch/x86/util/intel-pt.c
513
bits = perf_pmu__format_bits(intel_pt_pmu, name);
tools/perf/arch/x86/util/intel-pt.c
515
config &= bits;
tools/perf/arch/x86/util/intel-pt.c
517
for (shift = 0; bits && !(bits & 1); shift++)
tools/perf/arch/x86/util/intel-pt.c
518
bits >>= 1;
tools/perf/builtin-record.c
1072
thread_data->nr_mmaps = bitmap_weight(thread_data->mask->maps.bits,
tools/perf/builtin-record.c
1091
test_bit(perf_cpu_map__cpu(cpus, m).cpu, thread_data->mask->maps.bits)) {
tools/perf/builtin-record.c
1580
!bitmap_equal(thread->mask->affinity.bits, map->affinity_mask.bits,
tools/perf/builtin-record.c
1582
bitmap_zero(thread->mask->affinity.bits, thread->mask->affinity.nbits);
tools/perf/builtin-record.c
1583
bitmap_or(thread->mask->affinity.bits, thread->mask->affinity.bits,
tools/perf/builtin-record.c
1584
map->affinity_mask.bits, thread->mask->affinity.nbits);
tools/perf/builtin-record.c
1586
(cpu_set_t *)thread->mask->affinity.bits);
tools/perf/builtin-record.c
2355
(cpu_set_t *)(thread_data[t].mask->affinity.bits));
tools/perf/builtin-record.c
2375
(cpu_set_t *)thread->mask->affinity.bits);
tools/perf/builtin-record.c
3077
mask->bits = bitmap_zalloc(mask->nbits);
tools/perf/builtin-record.c
3078
if (!mask->bits)
tools/perf/builtin-record.c
3086
bitmap_free(mask->bits);
tools/perf/builtin-record.c
3087
mask->bits = NULL;
tools/perf/builtin-record.c
3097
mask->affinity.bits = NULL;
tools/perf/builtin-record.c
3104
mask->maps.bits = NULL;
tools/perf/builtin-record.c
3679
__set_bit(cpu.cpu, mask->bits);
tools/perf/builtin-record.c
3693
bitmap_zero(mask->bits, mask->nbits);
tools/perf/builtin-record.c
3751
__set_bit(perf_cpu_map__cpu(cpus, t).cpu, rec->thread_masks[t].maps.bits);
tools/perf/builtin-record.c
3752
__set_bit(perf_cpu_map__cpu(cpus, t).cpu, rec->thread_masks[t].affinity.bits);
tools/perf/builtin-record.c
3810
if (!bitmap_and(thread_mask.maps.bits, thread_mask.maps.bits,
tools/perf/builtin-record.c
3811
cpus_mask.bits, thread_mask.maps.nbits)) {
tools/perf/builtin-record.c
3816
if (!bitmap_and(thread_mask.affinity.bits, thread_mask.affinity.bits,
tools/perf/builtin-record.c
3817
cpus_mask.bits, thread_mask.affinity.nbits)) {
tools/perf/builtin-record.c
3824
if (bitmap_intersects(thread_mask.maps.bits, full_mask.maps.bits,
tools/perf/builtin-record.c
3830
if (bitmap_intersects(thread_mask.affinity.bits, full_mask.affinity.bits,
tools/perf/builtin-record.c
3837
bitmap_or(full_mask.maps.bits, full_mask.maps.bits,
tools/perf/builtin-record.c
3838
thread_mask.maps.bits, full_mask.maps.nbits);
tools/perf/builtin-record.c
3839
bitmap_or(full_mask.affinity.bits, full_mask.affinity.bits,
tools/perf/builtin-record.c
3840
thread_mask.affinity.bits, full_mask.maps.nbits);
tools/perf/builtin-trace.c
271
#define TP_UINT_FIELD(bits) \
tools/perf/builtin-trace.c
272
static u64 tp_field__u##bits(struct tp_field *field, struct perf_sample *sample) \
tools/perf/builtin-trace.c
274
u##bits value; \
tools/perf/builtin-trace.c
284
#define TP_UINT_FIELD__SWAPPED(bits) \
tools/perf/builtin-trace.c
285
static u64 tp_field__swapped_u##bits(struct tp_field *field, struct perf_sample *sample) \
tools/perf/builtin-trace.c
287
u##bits value; \
tools/perf/builtin-trace.c
289
return bswap_##bits(value);\
tools/perf/trace/beauty/include/uapi/sound/asound.h
405
__u32 bits[(SNDRV_MASK_MAX+31)/32];
tools/perf/util/auxtrace.c
2087
unsigned int bits;
tools/perf/util/auxtrace.c
2090
struct auxtrace_cache *auxtrace_cache__new(unsigned int bits, size_t entry_size,
tools/perf/util/auxtrace.c
2101
sz = 1UL << bits;
tools/perf/util/auxtrace.c
2114
c->bits = bits;
tools/perf/util/auxtrace.c
2170
hlist_add_head(&entry->hash, &c->hashtable[hash_32(key, c->bits)]);
tools/perf/util/auxtrace.c
2185
hlist = &c->hashtable[hash_32(key, c->bits)];
tools/perf/util/auxtrace.c
2211
hlist = &c->hashtable[hash_32(key, c->bits)];
tools/perf/util/auxtrace.h
558
struct auxtrace_cache *auxtrace_cache__new(unsigned int bits, size_t entry_size,
tools/perf/util/cpumap.c
756
unsigned char bits = bitmap[cpu / 8];
tools/perf/util/cpumap.c
759
bits >>= 4;
tools/perf/util/cpumap.c
761
bits &= 0xf;
tools/perf/util/cpumap.c
763
*ptr++ = hex_char(bits);
tools/perf/util/evsel.c
1447
for_each_set_bit(fbit, format->bits, PERF_PMU_FORMAT_BITS)
tools/perf/util/evsel.c
1452
perf_pmu__format_pack(format->bits, val, vp, /*zero=*/true);
tools/perf/util/evsel.c
1459
return format && !bitmap_empty(format->bits, PERF_PMU_FORMAT_BITS);
tools/perf/util/evsel.c
1467
if (!format || bitmap_empty(format->bits, PERF_PMU_FORMAT_BITS)) {
tools/perf/util/evsel.c
1475
*val = perf_pmu__format_unpack(format->bits,
tools/perf/util/evsel.c
1479
*val = perf_pmu__format_unpack(format->bits,
tools/perf/util/evsel.c
1483
*val = perf_pmu__format_unpack(format->bits,
tools/perf/util/evsel.c
1487
*val = perf_pmu__format_unpack(format->bits,
tools/perf/util/evsel.c
1491
*val = perf_pmu__format_unpack(format->bits,
tools/perf/util/hashmap.h
15
static inline size_t hash_bits(size_t h, int bits)
tools/perf/util/hashmap.h
18
if (bits == 0)
tools/perf/util/hashmap.h
23
return (h * 11400714819323198485llu) >> (__SIZEOF_LONG_LONG__ * 8 - bits);
tools/perf/util/hashmap.h
25
return (h * 2654435769lu) >> (__SIZEOF_LONG__ * 8 - bits);
tools/perf/util/intel-pt.c
601
unsigned int bits;
tools/perf/util/intel-pt.c
606
bits = intel_pt_cache_size(dso, machine);
tools/perf/util/intel-pt.c
609
c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
tools/perf/util/mmap.c
240
bitmap_free(map->affinity_mask.bits);
tools/perf/util/mmap.c
241
map->affinity_mask.bits = NULL;
tools/perf/util/mmap.c
267
__set_bit(cpu.cpu, mask->bits);
tools/perf/util/mmap.c
275
map->affinity_mask.bits = bitmap_zalloc(map->affinity_mask.nbits);
tools/perf/util/mmap.c
276
if (!map->affinity_mask.bits)
tools/perf/util/mmap.c
282
__set_bit(map->core.cpu.cpu, map->affinity_mask.bits);
tools/perf/util/mmap.c
35
len = bitmap_scnprintf(mask->bits, mask->nbits, buf, MASK_SIZE);
tools/perf/util/mmap.h
17
unsigned long *bits;
tools/perf/util/parse-events.c
1312
u64 bits = 0;
tools/perf/util/parse-events.c
1320
bits |= perf_pmu__format_bits(pmu, term->config);
tools/perf/util/parse-events.c
1322
bits = ~(u64)0;
tools/perf/util/parse-events.c
1326
if (bits) {
tools/perf/util/parse-events.c
1329
new_term = add_config_term(new_term_type, head_terms, false, NULL, bits);
tools/perf/util/perf_event_attr_fprintf.c
19
static void __p_bits(char *buf, size_t size, u64 value, struct bit_names *bits)
tools/perf/util/perf_event_attr_fprintf.c
25
if (value & bits[i].bit) {
tools/perf/util/perf_event_attr_fprintf.c
26
buf += scnprintf(buf, size, "%s%s", first_bit ? "" : "|", bits[i].name);
tools/perf/util/perf_event_attr_fprintf.c
29
} while (bits[++i].name != NULL);
tools/perf/util/perf_event_attr_fprintf.c
35
struct bit_names bits[] = {
tools/perf/util/perf_event_attr_fprintf.c
47
__p_bits(buf, size, value, bits);
tools/perf/util/perf_event_attr_fprintf.c
53
struct bit_names bits[] = {
tools/perf/util/perf_event_attr_fprintf.c
64
__p_bits(buf, size, value, bits);
tools/perf/util/perf_event_attr_fprintf.c
70
struct bit_names bits[] = {
tools/perf/util/perf_event_attr_fprintf.c
76
__p_bits(buf, size, value, bits);
tools/perf/util/pmu.c
1383
__u64 bits = 0;
tools/perf/util/pmu.c
1389
for_each_set_bit(fbit, format->bits, PERF_PMU_FORMAT_BITS)
tools/perf/util/pmu.c
1390
bits |= 1ULL << fbit;
tools/perf/util/pmu.c
1392
return bits;
tools/perf/util/pmu.c
141
void perf_pmu_format__set_value(void *vformat, int config, unsigned long *bits)
tools/perf/util/pmu.c
146
memcpy(format->bits, bits, sizeof(format->bits));
tools/perf/util/pmu.c
1518
DECLARE_BITMAP(bits, PERF_PMU_FORMAT_BITS);
tools/perf/util/pmu.c
1523
bitmap_fill(bits, PERF_PMU_FORMAT_BITS);
tools/perf/util/pmu.c
1528
perf_pmu__format_pack(bits, term->val.num, &attr->config, zero);
tools/perf/util/pmu.c
1532
perf_pmu__format_pack(bits, term->val.num, &attr->config1, zero);
tools/perf/util/pmu.c
1536
perf_pmu__format_pack(bits, term->val.num, &attr->config2, zero);
tools/perf/util/pmu.c
1540
perf_pmu__format_pack(bits, term->val.num, &attr->config3, zero);
tools/perf/util/pmu.c
1544
perf_pmu__format_pack(bits, term->val.num, &attr->config4, zero);
tools/perf/util/pmu.c
1634
bitmap_weight(format->bits, PERF_PMU_FORMAT_BITS) > 1) {
tools/perf/util/pmu.c
1663
max_val = pmu_format_max_value(format->bits);
tools/perf/util/pmu.c
1682
perf_pmu__format_pack(format->bits, val, vp, zero);
tools/perf/util/pmu.c
2018
ret = cb(state, format->name, (int)format->value, format->bits);
tools/perf/util/pmu.c
2625
for_each_set_bit(i, format->bits, PERF_PMU_FORMAT_BITS)
tools/perf/util/pmu.c
2635
__u64 bits;
tools/perf/util/pmu.c
2646
bits = config & ~pmu->config_masks[config_num];
tools/perf/util/pmu.c
2647
if (bits == 0)
tools/perf/util/pmu.c
2650
bitmap_scnprintf((unsigned long *)&bits, sizeof(bits) * 8, buf, sizeof(buf));
tools/perf/util/pmu.h
248
DECLARE_BITMAP(bits, PERF_PMU_FORMAT_BITS);
tools/perf/util/pmu.h
263
const unsigned long *bits);
tools/perf/util/pmu.h
286
void perf_pmu_format__set_value(void *format, int config, unsigned long *bits);
tools/perf/util/pmu.y
29
static void perf_pmu__set_format(unsigned long *bits, long from, long to)
tools/perf/util/pmu.y
36
memset(bits, 0, BITS_TO_BYTES(PERF_PMU_FORMAT_BITS));
tools/perf/util/pmu.y
38
__set_bit(b, bits);
tools/perf/util/pmu.y
46
%type <bits> bit_term
tools/perf/util/pmu.y
47
%type <bits> bits
tools/perf/util/pmu.y
52
DECLARE_BITMAP(bits, PERF_PMU_FORMAT_BITS);
tools/perf/util/pmu.y
63
PP_CONFIG ':' bits
tools/perf/util/pmu.y
68
PP_CONFIG PP_VALUE ':' bits
tools/perf/util/pmu.y
73
bits:
tools/perf/util/pmu.y
74
bits ',' bit_term
tools/perf/util/pmus.c
697
const unsigned long *bits)
tools/perf/util/pmus.c
710
num_bits = bits ? bitmap_weight(bits, PERF_PMU_FORMAT_BITS) : 0;
tools/perf/util/sharded_mutex.c
10
unsigned int bits;
tools/perf/util/sharded_mutex.c
12
for (bits = 0; ((size_t)1 << bits) < num_shards; bits++)
tools/perf/util/sharded_mutex.c
15
size = sizeof(*result) + sizeof(struct mutex) * (1 << bits);
tools/perf/util/sharded_mutex.c
20
result->cap_bits = bits;
tools/perf/util/sharded_mutex.c
21
for (size_t i = 0; i < ((size_t)1 << bits); i++)
tools/perf/util/svghelper.c
690
#define cpumask_bits(maskp) ((maskp)->bits)
tools/perf/util/svghelper.c
691
typedef struct { DECLARE_BITMAP(bits, MAX_NR_CPUS); } cpumask_t;
tools/power/x86/turbostat/turbostat.c
8221
int bits = platform->tcc_offset_bits;
tools/power/x86/turbostat/turbostat.c
8224
if (bits && !get_msr(master_cpu, MSR_PLATFORM_INFO, &enabled))
tools/power/x86/turbostat/turbostat.c
8227
if (bits && enabled) {
tools/power/x86/turbostat/turbostat.c
8228
tcc_offset = (msr >> 24) & GENMASK(bits - 1, 0);
tools/sched_ext/include/scx/cid.bpf.h
118
m->bits[0] = 0;
tools/sched_ext/include/scx/cid.bpf.h
119
m->bits[last_word] = 0;
tools/sched_ext/include/scx/cid.bpf.h
278
m->bits[i] = 0;
tools/sched_ext/include/scx/cid.bpf.h
298
u64 dv = dst->bits[di];
tools/sched_ext/include/scx/cid.bpf.h
299
u64 sv = src->bits[si];
tools/sched_ext/include/scx/cid.bpf.h
311
dst->bits[di] = (dv & ~mask) | (rv & mask);
tools/sched_ext/include/scx/cid.bpf.h
401
if (a->bits[i] != b->bits[i])
tools/sched_ext/include/scx/cid.bpf.h
439
word = m->bits[wi];
tools/sched_ext/include/scx/cid.bpf.h
50
return (u64 __arena *)&m->bits[cid / 64 - m->base / 64];
tools/sched_ext/include/scx/cid.bpf.h
503
if (a->bits[w - a_wbase] & ~b->bits[w - b_wbase])
tools/sched_ext/include/scx/cid.bpf.h
526
count += __builtin_popcountll(m->bits[i]);
tools/sched_ext/include/scx/cid.bpf.h
568
av = a->bits[w - a_base] & mask;
tools/sched_ext/include/scx/cid.bpf.h
569
bv = b->bits[w - b_base] & mask;
tools/sched_ext/include/scx/cid.bpf.h
614
word = a->bits[abs_wi - a_wbase] & b->bits[abs_wi - b_wbase];
tools/sched_ext/include/scx/cid.bpf.h
82
m->bits[i] = 0;
tools/sched_ext/scx_qmap.bpf.c
170
struct_size_t(struct task_ctx, cpus_allowed.bits, \
tools/spi/spidev_fdx.c
103
name, mode, bits, lsb ? "(lsb first) " : "", speed);
tools/spi/spidev_fdx.c
82
__u8 lsb, bits;
tools/spi/spidev_fdx.c
93
if (ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits) < 0) {
tools/spi/spidev_test.c
130
.bits_per_word = bits,
tools/spi/spidev_test.c
264
bits = atoi(optarg);
tools/spi/spidev_test.c
40
static uint8_t bits = 8;
tools/spi/spidev_test.c
483
ret = ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits);
tools/spi/spidev_test.c
487
ret = ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits);
tools/spi/spidev_test.c
503
printf("bits per word: %u\n", bits);
tools/testing/selftests/arm64/fp/fp-ptrace.c
873
int bits, i;
tools/testing/selftests/arm64/fp/fp-ptrace.c
882
bits = random() % (__SVE_FFR_SIZE(vq) * 8);
tools/testing/selftests/arm64/fp/fp-ptrace.c
883
for (i = 0; i < bits / 8; i++)
tools/testing/selftests/arm64/fp/fp-ptrace.c
885
if (bits / 8 != __SVE_FFR_SIZE(vq))
tools/testing/selftests/arm64/fp/fp-ptrace.c
886
lbuf[i] = (1 << (bits % 8)) - 1;
tools/testing/selftests/bpf/progs/cpumask_failure.c
231
u64 bits;
tools/testing/selftests/bpf/progs/cpumask_failure.c
234
ret = bpf_cpumask_populate((struct cpumask *)invalid, &bits, sizeof(bits));
tools/testing/selftests/bpf/progs/cpumask_success.c
801
u64 bits[CPUMASK_TEST_MASKLEN / 8 + 1];
tools/testing/selftests/bpf/progs/cpumask_success.c
825
src = &((char *)bits)[1];
tools/testing/selftests/bpf/progs/cpumask_success.c
849
__builtin_memset(bits, 0xaa, CPUMASK_TEST_MASKLEN);
tools/testing/selftests/bpf/progs/cpumask_success.c
858
ret = bpf_cpumask_populate((struct cpumask *)mask, bits, CPUMASK_TEST_MASKLEN);
tools/testing/selftests/bpf/progs/syscall.c
33
#define BTF_TYPE_INT_ENC(name, encoding, bits_offset, bits, sz) \
tools/testing/selftests/bpf/progs/syscall.c
35
BTF_INT_ENC(encoding, bits_offset, bits)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
112
bpf_for_each(bits, bit, &data, 1) {
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
130
bpf_for_each(bits, bit, &data[0], 512) /* Be greater than 511 */
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
144
bpf_for_each(bits, bit, &data[0], 1)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
158
bpf_for_each(bits, bit, &data[0], 0)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
172
bpf_for_each(bits, bit, &data[0], 67108865)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
188
bpf_for_each(bits, bit, bits_array, 511) {
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
215
bpf_for_each(bits, bit, bad_addr, 1)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
226
bpf_for_each(bits, bit, bad_addr, 4)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
69
bpf_for_each(bits, bit, NULL, 1)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
83
bpf_for_each(bits, bit, &data, 1)
tools/testing/selftests/bpf/progs/verifier_bits_iter.c
98
bpf_for_each(bits, bit, &data[0], ARRAY_SIZE(data))
tools/testing/selftests/bpf/test_btf.h
17
#define BTF_TYPE_INT_ENC(name, encoding, bits_offset, bits, sz) \
tools/testing/selftests/bpf/test_btf.h
19
BTF_INT_ENC(encoding, bits_offset, bits)
tools/testing/selftests/gpio/gpio-mockup-cdev.c
56
return vals.bits & 0x1;
tools/testing/selftests/kvm/access_tracking_perf_test.c
144
u64 bits = pread_u64(page_idle_fd, "page_idle", pfn / 64);
tools/testing/selftests/kvm/access_tracking_perf_test.c
146
return !!((bits >> (pfn % 64)) & 1);
tools/testing/selftests/kvm/access_tracking_perf_test.c
151
u64 bits = 1ULL << (pfn % 64);
tools/testing/selftests/kvm/access_tracking_perf_test.c
153
TEST_ASSERT(pwrite(page_idle_fd, &bits, 8, 8 * (pfn / 64)) == 8,
tools/testing/selftests/kvm/arm64/set_id_regs.c
661
for (const struct reg_ftr_bits *bits = reg->ftr_bits; bits->type != FTR_END; bits++) {
tools/testing/selftests/kvm/arm64/set_id_regs.c
662
if (bits->mutable) {
tools/testing/selftests/kvm/arm64/set_id_regs.c
663
val &= ~bits->mask;
tools/testing/selftests/kvm/arm64/set_id_regs.c
664
val |= bits->safe_val << bits->shift;
tools/testing/selftests/kvm/s390/memop.c
513
unsigned int bits = size * 8;
tools/testing/selftests/kvm/s390/memop.c
515
amount = (amount + bits) % bits;
tools/testing/selftests/kvm/s390/memop.c
519
return (val << (bits - amount)) | (val >> amount);
tools/testing/selftests/powerpc/dexcr/lsdexcr.c
24
static void print_dexcr(char *name, unsigned int bits)
tools/testing/selftests/powerpc/dexcr/lsdexcr.c
29
printf("%s: 0x%08x", name, bits);
tools/testing/selftests/powerpc/dexcr/lsdexcr.c
31
if (bits == 0) {
tools/testing/selftests/powerpc/dexcr/lsdexcr.c
39
if (bits & mask) {
tools/testing/selftests/powerpc/dexcr/lsdexcr.c
41
bits &= ~mask;
tools/testing/selftests/powerpc/dexcr/lsdexcr.c
45
if (bits)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
127
static inline unsigned long create_zero_mask(unsigned long bits)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
129
bits = (bits - 1) & ~bits;
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
130
return bits >> 7;
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
139
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
142
*bits = mask;
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
146
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
148
return bits;
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
60
static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
66
*bits = ret;
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
71
static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
73
return bits;
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
77
static inline unsigned long create_zero_mask(unsigned long bits)
tools/testing/selftests/powerpc/primitives/word-at-a-time.h
86
: "b" (bits));
tools/testing/selftests/resctrl/cat_test.c
218
int n = uparams->bits;
tools/testing/selftests/resctrl/cat_test.c
69
int bits;
tools/testing/selftests/resctrl/cat_test.c
89
bits = count_bits(current_mask);
tools/testing/selftests/resctrl/cat_test.c
91
ret = show_results_info(sum_llc_perf_miss, bits,
tools/testing/selftests/resctrl/cmt_test.c
148
int n = uparams->bits ? : 5;
tools/testing/selftests/resctrl/resctrl.h
227
unsigned int bits = count_bits(full_cache_mask);
tools/testing/selftests/resctrl/resctrl.h
233
if (!bits)
tools/testing/selftests/resctrl/resctrl.h
236
return cache_size * count_bits(portion_mask) / bits;
tools/testing/selftests/resctrl/resctrl.h
87
int bits;
tools/testing/selftests/resctrl/resctrl_tests.c
247
uparams->bits = 0;
tools/testing/selftests/resctrl/resctrl_tests.c
315
uparams.bits = atoi(optarg);
tools/testing/selftests/resctrl/resctrl_tests.c
316
if (uparams.bits <= 0) {
tools/testing/selftests/seccomp/seccomp_benchmark.c
185
long ret, bits;
tools/testing/selftests/seccomp/seccomp_benchmark.c
279
bits = compare("native", "≤", "1 filter", native, le, filter1,
tools/testing/selftests/seccomp/seccomp_benchmark.c
281
if (bits)
tools/testing/selftests/seccomp/seccomp_benchmark.c
287
bits = compare("1 bitmapped", "≈", "2 bitmapped",
tools/testing/selftests/seccomp/seccomp_benchmark.c
289
if (bits) {
tools/testing/selftests/seccomp/seccomp_bpf.c
2438
int bits = 0;
tools/testing/selftests/seccomp/seccomp_bpf.c
2444
bits ++;
tools/testing/selftests/seccomp/seccomp_bpf.c
2447
ASSERT_EQ(1, bits);
tools/testing/selftests/vDSO/parse_vdso.c
35
#define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x
tools/testing/selftests/vDSO/parse_vdso.c
36
#define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x)
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
106
err.bits[0], err.bits[1], err.bits[2], err.bits[3]);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
134
writel(cmd_reg.bits, bar0 + IDXD_CMD_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
177
for (i = 0; i < wqcfg_size / sizeof(wqcfg.bits[0]); i++)
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
178
writel(wqcfg.bits[i], dsa->wqcfg_table + offsetof(union wqcfg, bits[i]));
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
200
dsa->gen_cap.bits = readq(bar0 + IDXD_GENCAP_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
201
dsa->wq_cap.bits = readq(bar0 + IDXD_WQCAP_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
202
dsa->group_cap.bits = readq(bar0 + IDXD_GRPCAP_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
203
dsa->engine_cap.bits = readq(bar0 + IDXD_ENGCAP_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
205
dsa->table_offsets.bits[0] = readq(bar0 + IDXD_TABLE_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
206
dsa->table_offsets.bits[1] = readq(bar0 + IDXD_TABLE_OFFSET + 8);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
58
gen_cap.bits = readq(bar0 + IDXD_GENCAP_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
97
for (i = 0; i < ARRAY_SIZE(err.bits); i++) {
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
98
err.bits[i] = readq(reg + offsetof(union sw_err_reg, bits[i]));
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
102
u64 bits[4];
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
119
u64 bits[2];
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
133
u32 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
144
u32 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
154
u32 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
188
u32 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
218
u32 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
289
u64 bits[4];
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
308
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
325
u64 bits[2];
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
339
u32 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
357
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
416
u32 bits[16];
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
480
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
489
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
50
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
586
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
591
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
605
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
610
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
70
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
84
u64 bits;
tools/testing/selftests/vfio/lib/drivers/dsa/registers.h
93
u64 bits;
tools/testing/selftests/wireguard/qemu/init.c
61
int bits = 256, fd;
tools/testing/selftests/wireguard/qemu/init.c
69
if (ioctl(fd, RNDADDTOENTCNT, &bits) < 0)
tools/testing/selftests/x86/lam.c
130
unsigned long bits = 0;
tools/testing/selftests/x86/lam.c
142
ret = syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &bits);
tools/testing/selftests/x86/lam.c
291
unsigned long bits = 0;
tools/testing/selftests/x86/lam.c
297
if (syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &bits) == -1)
tools/testing/selftests/x86/lam.c
300
return (exp_bits != bits);
tools/testing/vma/include/dup.h
436
#define DECLARE_BITMAP(name, bits) \
tools/testing/vma/include/dup.h
437
unsigned long name[BITS_TO_LONGS(bits)]
tools/testing/vma/include/dup.h
925
size_t count, const vma_flag_t *bits)
tools/testing/vma/include/dup.h
930
vma_flags_set_flag(&flags, bits[i]);
tools/testing/vsock/vsock_perf.c
130
static float get_gbps(unsigned long bits, time_t ns_delta)
tools/testing/vsock/vsock_perf.c
132
return ((float)bits / 1000000000ULL) /
tools/virtio/linux/cpumask.h
8
unsigned long bits[1];
