bnx2_reg_rd_ind
bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1));
bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_MODE),
bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_STATE),
bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_EVENT_MASK));
bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER),
bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER),
bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_INSTRUCTION));
val = bnx2_reg_rd_ind(bp, BNX2_RBUF_STATUS1);
val = bnx2_reg_rd_ind(bp, BNX2_RBUF_FW_BUF_ALLOC);
val = bnx2_reg_rd_ind(bp, BNX2_RBUF_STATUS1);
return bnx2_reg_rd_ind(bp, bp->shmem_base + offset);
io->data = bnx2_reg_rd_ind(bp, io->offset);
val = bnx2_reg_rd_ind(bp, cpu_reg->mode);
if (!bnx2_reg_rd_ind(bp, BNX2_FW_MAX_ISCSI_CONN))
val = bnx2_reg_rd_ind(bp, cpu_reg->mode);
if (bnx2_reg_rd_ind(bp, start + offset) !=
bnx2_reg_rd_ind(bp, BNX2_FW_RX_DROP_COUNT);
bnx2_reg_rd_ind(bp, ftq_arr[i].off));
reg, bnx2_reg_rd_ind(bp, reg),
bnx2_reg_rd_ind(bp, reg + 4),
bnx2_reg_rd_ind(bp, reg + 8),
bnx2_reg_rd_ind(bp, reg + 0x1c),
bnx2_reg_rd_ind(bp, reg + 0x1c),
bnx2_reg_rd_ind(bp, reg + 0x20));
reg = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_SIGNATURE);
if (bnx2_reg_rd_ind(bp, BNX2_MCP_TOE_ID) & BNX2_MCP_TOE_ID_FUNCTION_ID)
bp->shmem_base = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_ADDR_0 + off);
reg = bnx2_reg_rd_ind(bp, addr + i * 4);