bnx2_ctx_wr
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_CTX_TYPE, val);
bnx2_ctx_wr(bp, vcid_addr, offset, 0);
bnx2_ctx_wr(bp, io->cid_addr, io->offset, io->data);
bnx2_ctx_wr(bp, cid_addr, offset0, val);
bnx2_ctx_wr(bp, cid_addr, offset1, val);
bnx2_ctx_wr(bp, cid_addr, offset2, val);
bnx2_ctx_wr(bp, cid_addr, offset3, val);
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_PG_BUF_SIZE, 0);
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_PG_BUF_SIZE, val);
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_RBDC_KEY,
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_NX_PG_BDHADDR_HI, val);
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_NX_PG_BDHADDR_LO, val);
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);