drivers/edac/edac_device.c

121

"%s%d", blk_name, block + off_val);

drivers/edac/edac_device.c

58

char *blk_name, unsigned nr_blocks, unsigned off_val,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1133

const char *blk_name,

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1152

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1161

mcm_info->socket_id, mcm_info->die_id, err_info->ue_count, blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1175

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1185

err_info->de_count, blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1200

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1210

err_info->ce_count, blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1227

const char *blk_name = get_ras_block_str(&query_if->head);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1233

blk_name, false, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1244

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1249

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1256

blk_name, true, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1267

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1272

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1279

blk_name, false, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1290

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1295

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1307

const char *blk_name = get_ras_block_str(&query_if->head);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1318

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1325

blk_name);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

1332

blk_name);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h

154

#define SFB(blk_name, reg_name, field_name, post_fix)\

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h

155

.field_name = blk_name ## reg_name ## __ ## field_name ## post_fix

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

705

#define HWS_SF(blk_name, reg_name, field_name, post_fix)\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

706

.field_name = blk_name ## reg_name ## __ ## field_name ## post_fix

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

708

#define HWS_SF1(blk_name, reg_name, field_name, post_fix)\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

709

.field_name = blk_name ## reg_name ## __ ## blk_name ## field_name ## post_fix

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

104

seq_no, skt, aid, ecc_count.new_ce_count, blk_name(blk));

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

107

seq_no, skt, aid, ecc_count.total_ce_count, blk_name(blk));

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

80

seq_no, skt, aid, ecc_count.new_ue_count, blk_name(blk));

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

83

seq_no, skt, aid, ecc_count.total_ue_count, blk_name(blk));

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

92

blk_name(blk));

drivers/gpu/drm/amd/ras/rascore/ras_aca.c

98

blk_name(blk));

drivers/gpu/drm/panthor/panthor_gpu.c

172

const char *blk_name,

drivers/gpu/drm/panthor/panthor_gpu.c

183

"timeout waiting on %s:%llx power transition", blk_name,

drivers/gpu/drm/panthor/panthor_gpu.c

194

"timeout waiting on %s:%llx power transition", blk_name,

drivers/gpu/drm/panthor/panthor_gpu.c

215

const char *blk_name,

drivers/gpu/drm/panthor/panthor_gpu.c

226

"timeout waiting on %s:%llx power transition", blk_name,

drivers/gpu/drm/panthor/panthor_gpu.c

238

blk_name, mask);

drivers/gpu/drm/panthor/panthor_gpu.h

18

const char *blk_name,

drivers/gpu/drm/panthor/panthor_gpu.h

22

const char *blk_name,