bitmap_and
bitmap_and(applied_alternatives, applied_alternatives,
bitmap_and(info->vq_map, info->vq_map, tmp_map, SVE_VQ_MAX);
bitmap_and(kvm->arch.vcpu_features, host_kvm->arch.vcpu_features,
bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);
bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);
bitmap_and(ext_list->all_harts_isa_bitmap.isa,
bitmap_and(apcb_s, apcb_s, apcb_h,
bitmap_and(apcb_s, apcb_s, apcb_h,
else if (!bitmap_and(bitmap, event_pmcs,
bitmap_and(data->aggregate, tmp, data->aggregate, PLATFORM_PROFILE_LAST);
bitmap_and(has.bits, want->bits, device->cap_mask.bits,
bitmap_and(pending, edges, trigger, gc->ngpio);
bitmap_and(cur_stat, new_stat, chip->irq_trig_level_high, gc->ngpio);
bitmap_and(cur_stat, cur_stat, chip->irq_mask, gc->ngpio);
bitmap_and(cur_stat, cur_stat, reg_direction, gc->ngpio);
bitmap_and(old_stat, cur_stat, chip->irq_trig_level_low, gc->ngpio);
bitmap_and(old_stat, old_stat, chip->irq_mask, gc->ngpio);
bitmap_and(chip->irq_stat, irq_stat, reg_direction, gc->ngpio);
bitmap_and(latched_inputs, latched_inputs, chip->irq_mask, gc->ngpio);
bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
bitmap_and(trigger, int_stat, chip->irq_mask, gc->ngpio);
bitmap_and(int_stat, new_stat, trigger, gc->ngpio);
bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
bitmap_and(rising, rising, hw, 64);
bitmap_and(rising, rising, chip->enable, 64);
bitmap_and(rising, rising, chip->rising_edge, 64);
bitmap_and(falling, falling, chip->last_irq_read, 64);
bitmap_and(falling, falling, chip->enable, 64);
bitmap_and(falling, falling, chip->falling_edge, 64);
bitmap_and(bitmap_access, bitmap_access,
bitmap_and(bitmap_aip, bitmap_aip,
bitmap_and(keys1, keys1, keys, SH_KEYSC_MAXKEYS);
bitmap_and(data->irq_status, data->irq_status, data->fn_irq_bits,
bitmap_and(pending, pending, pcpu_mask, gic_shared_intrs);
bitmap_and(&pending, &pending, &masked, GIC_NUM_LOCAL_INTRS);
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(params->ptypes, params->ptypes, src,
bitmap_and(possible_idx, possible_idx,
bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
bitmap_and(workmask, sparx5->bridge_fwd_mask,
bitmap_and(wil->status, wil->status, &status_flags,
bitmap_and(pending, new_stat, trigger, MAX_LINE);
bitmap_and(parent->features, parent->features, child->features, MPAM_FEATURE_LAST);
do_remove |= bitmap_and(aprem, ap_remove,
do_remove |= bitmap_and(aqrem, aq_remove,
bitmap_and(matrix_mdev->apm_add,
bitmap_and(matrix_mdev->aqm_add,
bitmap_and(matrix_mdev->adm_add,
bitmap_and(matrix_mdev->shadow_apcb.adm, matrix_mdev->matrix.adm,
bitmap_and(matrix_mdev->shadow_apcb.apm, matrix_mdev->matrix.apm,
bitmap_and(matrix_mdev->shadow_apcb.aqm, matrix_mdev->matrix.aqm,
if (!bitmap_and(apm, mdev_apm, assigned_to->matrix.apm, AP_DEVICES))
if (!bitmap_and(aqm, mdev_aqm, assigned_to->matrix.aqm, AP_DOMAINS))
bitmap_and(&bio_ctrl->submit_bitmap, &bio_ctrl->submit_bitmap, &range_bitmap,
bitmap_and(&error, &error, &has_extent, stripe->nr_sectors);
return bitmap_and(cpumask_bits(dstp), cpumask_bits(src1p),
bitmap_and(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS);
return bitmap_and(dstp->bits, src1p->bits, src2p->bits, nbits);
bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
#define ip_tunnel_flags_and(...) __ipt_flag_op(bitmap_and, __VA_ARGS__)
bitmap_and(tmp, map, subsection_map, SUBSECTIONS_PER_SECTION);
bitmap_and(req_wanted, req_wanted, req_mask, NETDEV_FEATURE_COUNT);
bitmap_and(wanted_diff_mask, wanted_diff_mask, req_mask,
bitmap_and(req_wanted, req_wanted, wanted_diff_mask,
bitmap_and(new_active, new_active, active_diff_mask,
bitmap_and(set, c2c_he->cpuset, c2c.nodes[node], c2c.cpus_cnt);
if (!bitmap_and(thread_mask.maps.bits, thread_mask.maps.bits,
if (!bitmap_and(thread_mask.affinity.bits, thread_mask.affinity.bits,