bit_cfg_reg
cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0);
cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), cfgx.u64);
txgpio->register_base + bit_cfg_reg(line));
writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));
writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(line));
writeq(bit_cfg, txgpio->register_base + bit_cfg_reg(txline->line));
u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(i));
u64 bit_cfg = readq(txgpio->register_base + bit_cfg_reg(line));