ax_spi_write
ax_spi_write(xspi, AX_SPI_CR2, ctrl_reg);
ax_spi_write(xspi, AX_SPI_CR1, new_ctrl_reg);
ax_spi_write(xspi, AX_SPI_CR1, 0x03);
ax_spi_write(xspi, AX_SPI_SCDR, (AX_SPI_SCDR_SCS | AX_SPI_SCD_DEFAULT));
ax_spi_write(xspi, AX_SPI_IMR, 0x00);
ax_spi_write(xspi, AX_SPI_ISR, AX_SPI_ISR_MTC);
ax_spi_write(xspi, AX_SPI_IMR, 0x00);
ax_spi_write(xspi, AX_SPI_ISR, AX_SPI_ISR_CLR);
ax_spi_write(xspi, AX_SPI_CR2, (AX_SPI_CR2_HTE | AX_SPI_CR2_SRD | AX_SPI_CR2_SWD));
ax_spi_write(xspi, AX_SPI_IMR, (AX_SPI_IMR_MTCM | AX_SPI_IMR_RFFM));
ax_spi_write(xspi, AX_SPI_CR1, reg_value);
ax_spi_write(xspi, AX_SPI_CR1, reg_value);
ax_spi_write(xspi, AX_SPI_TX_FAETR, ALMOST_EMPTY_TRESHOLD);
ax_spi_write(xspi, AX_SPI_TX_FAETR, ALMOST_EMPTY_TRESHOLD);
ax_spi_write(xspi, AX_SPI_RX_FAFTR, ALMOST_FULL_TRESHOLD);
ax_spi_write(xspi, AX_SPI_CR2, reg_val);
ax_spi_write(xspi, AX_SPI_CR2, reg_val);
ax_spi_write(xspi, AX_SPI_CR1, AX_SPI_CR1_CLR);
ax_spi_write(xspi, AX_SPI_CR1, reg_value);
ax_spi_write(xspi, AX_SPI_CR2, reg_value);
ax_spi_write(xspi, AX_SPI_CR3, AX_SPI_CR3_SDL);
ax_spi_write(xspi, AX_SPI_SCDR, (AX_SPI_SCDR_SCS | AX_SPI_SCD_DEFAULT));
ax_spi_write(xspi, AX_SPI_IMR, AX_SPI_IMR_CLR);
ax_spi_write(xspi, AX_SPI_ISR, AX_SPI_ISR_CLR);