arch/powerpc/perf/generic-compat-pmu.c

123

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/generic-compat-pmu.c

124

CACHE_EVENT_PTR(PM_ST_MISS_L1),

arch/powerpc/perf/generic-compat-pmu.c

125

CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),

arch/powerpc/perf/generic-compat-pmu.c

126

CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),

arch/powerpc/perf/generic-compat-pmu.c

127

CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),

arch/powerpc/perf/generic-compat-pmu.c

128

CACHE_EVENT_PTR(PM_DTLB_MISS),

arch/powerpc/perf/generic-compat-pmu.c

129

CACHE_EVENT_PTR(PM_ITLB_MISS),

arch/powerpc/perf/power10-pmu.c

159

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power10-pmu.c

160

CACHE_EVENT_PTR(PM_LD_REF_L1),

arch/powerpc/perf/power10-pmu.c

161

CACHE_EVENT_PTR(PM_LD_PREFETCH_CACHE_LINE_MISS),

arch/powerpc/perf/power10-pmu.c

162

CACHE_EVENT_PTR(PM_ST_MISS_L1),

arch/powerpc/perf/power10-pmu.c

163

CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),

arch/powerpc/perf/power10-pmu.c

164

CACHE_EVENT_PTR(PM_INST_FROM_L1),

arch/powerpc/perf/power10-pmu.c

165

CACHE_EVENT_PTR(PM_IC_PREF_REQ),

arch/powerpc/perf/power10-pmu.c

166

CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),

arch/powerpc/perf/power10-pmu.c

167

CACHE_EVENT_PTR(PM_DATA_FROM_L3),

arch/powerpc/perf/power10-pmu.c

168

CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),

arch/powerpc/perf/power10-pmu.c

169

CACHE_EVENT_PTR(PM_BR_CMPL),

arch/powerpc/perf/power10-pmu.c

170

CACHE_EVENT_PTR(PM_DTLB_MISS),

arch/powerpc/perf/power10-pmu.c

171

CACHE_EVENT_PTR(PM_ITLB_MISS),

arch/powerpc/perf/power10-pmu.c

184

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power10-pmu.c

185

CACHE_EVENT_PTR(PM_LD_REF_L1),

arch/powerpc/perf/power10-pmu.c

186

CACHE_EVENT_PTR(PM_LD_PREFETCH_CACHE_LINE_MISS),

arch/powerpc/perf/power10-pmu.c

187

CACHE_EVENT_PTR(PM_ST_MISS_L1),

arch/powerpc/perf/power10-pmu.c

188

CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),

arch/powerpc/perf/power10-pmu.c

189

CACHE_EVENT_PTR(PM_INST_FROM_L1),

arch/powerpc/perf/power10-pmu.c

190

CACHE_EVENT_PTR(PM_IC_PREF_REQ),

arch/powerpc/perf/power10-pmu.c

191

CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),

arch/powerpc/perf/power10-pmu.c

192

CACHE_EVENT_PTR(PM_DATA_FROM_L3),

arch/powerpc/perf/power10-pmu.c

193

CACHE_EVENT_PTR(PM_L3_PF_MISS_L3),

arch/powerpc/perf/power10-pmu.c

194

CACHE_EVENT_PTR(PM_L2_ST_MISS),

arch/powerpc/perf/power10-pmu.c

195

CACHE_EVENT_PTR(PM_L2_ST),

arch/powerpc/perf/power10-pmu.c

196

CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),

arch/powerpc/perf/power10-pmu.c

197

CACHE_EVENT_PTR(PM_BR_CMPL),

arch/powerpc/perf/power10-pmu.c

198

CACHE_EVENT_PTR(PM_DTLB_MISS),

arch/powerpc/perf/power10-pmu.c

199

CACHE_EVENT_PTR(PM_ITLB_MISS),

arch/powerpc/perf/power8-pmu.c

164

CACHE_EVENT_PTR(PM_LD_MISS_L1),

arch/powerpc/perf/power8-pmu.c

165

CACHE_EVENT_PTR(PM_LD_REF_L1),

arch/powerpc/perf/power8-pmu.c

166

CACHE_EVENT_PTR(PM_L1_PREF),

arch/powerpc/perf/power8-pmu.c

167

CACHE_EVENT_PTR(PM_ST_MISS_L1),

arch/powerpc/perf/power8-pmu.c

168

CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),

arch/powerpc/perf/power8-pmu.c

169

CACHE_EVENT_PTR(PM_INST_FROM_L1),

arch/powerpc/perf/power8-pmu.c

170

CACHE_EVENT_PTR(PM_IC_PREF_WRITE),

arch/powerpc/perf/power8-pmu.c

171

CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),

arch/powerpc/perf/power8-pmu.c

172

CACHE_EVENT_PTR(PM_DATA_FROM_L3),

arch/powerpc/perf/power8-pmu.c

173

CACHE_EVENT_PTR(PM_L3_PREF_ALL),

arch/powerpc/perf/power8-pmu.c

174

CACHE_EVENT_PTR(PM_L2_ST_MISS),

arch/powerpc/perf/power8-pmu.c

175

CACHE_EVENT_PTR(PM_L2_ST),

arch/powerpc/perf/power8-pmu.c

177

CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),

arch/powerpc/perf/power8-pmu.c

178

CACHE_EVENT_PTR(PM_BRU_FIN),

arch/powerpc/perf/power8-pmu.c

180

CACHE_EVENT_PTR(PM_DTLB_MISS),

arch/powerpc/perf/power8-pmu.c

181

CACHE_EVENT_PTR(PM_ITLB_MISS),

arch/powerpc/perf/power9-pmu.c

203

CACHE_EVENT_PTR(PM_LD_MISS_L1_FIN),

arch/powerpc/perf/power9-pmu.c

204

CACHE_EVENT_PTR(PM_LD_REF_L1),

arch/powerpc/perf/power9-pmu.c

205

CACHE_EVENT_PTR(PM_L1_PREF),

arch/powerpc/perf/power9-pmu.c

206

CACHE_EVENT_PTR(PM_ST_MISS_L1),

arch/powerpc/perf/power9-pmu.c

207

CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),

arch/powerpc/perf/power9-pmu.c

208

CACHE_EVENT_PTR(PM_INST_FROM_L1),

arch/powerpc/perf/power9-pmu.c

209

CACHE_EVENT_PTR(PM_IC_PREF_WRITE),

arch/powerpc/perf/power9-pmu.c

210

CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),

arch/powerpc/perf/power9-pmu.c

211

CACHE_EVENT_PTR(PM_DATA_FROM_L3),

arch/powerpc/perf/power9-pmu.c

212

CACHE_EVENT_PTR(PM_L3_PREF_ALL),

arch/powerpc/perf/power9-pmu.c

213

CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),

arch/powerpc/perf/power9-pmu.c

214

CACHE_EVENT_PTR(PM_BR_CMPL),

arch/powerpc/perf/power9-pmu.c

215

CACHE_EVENT_PTR(PM_DTLB_MISS),

arch/powerpc/perf/power9-pmu.c

216

CACHE_EVENT_PTR(PM_ITLB_MISS),