arch/sparc/include/asm/iommu_64.h

57

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

119

iotsb_num = pbm->iommu->atu->iotsb->iotsb_num;

arch/sparc/kernel/pci_sun4v.c

1215

if (pbm->iommu->atu) {

arch/sparc/kernel/pci_sun4v.c

1218

kfree(pbm->iommu->atu);

arch/sparc/kernel/pci_sun4v.c

1219

pbm->iommu->atu = NULL;

arch/sparc/kernel/pci_sun4v.c

1237

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

1310

iommu->atu = NULL;

arch/sparc/kernel/pci_sun4v.c

1312

atu = kzalloc_obj(*atu);

arch/sparc/kernel/pci_sun4v.c

1313

if (!atu)

arch/sparc/kernel/pci_sun4v.c

1316

iommu->atu = atu;

arch/sparc/kernel/pci_sun4v.c

1328

kfree(iommu->atu);

arch/sparc/kernel/pci_sun4v.c

218

tbl = &iommu->atu->tbl;

arch/sparc/kernel/pci_sun4v.c

328

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

337

atu = iommu->atu;

arch/sparc/kernel/pci_sun4v.c

344

tbl = &atu->tbl;

arch/sparc/kernel/pci_sun4v.c

345

iotsb_num = atu->iotsb->iotsb_num;

arch/sparc/kernel/pci_sun4v.c

360

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

379

atu = iommu->atu;

arch/sparc/kernel/pci_sun4v.c

392

tbl = &atu->tbl;

arch/sparc/kernel/pci_sun4v.c

444

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

459

atu = iommu->atu;

arch/sparc/kernel/pci_sun4v.c

470

iotsb_num = atu->iotsb->iotsb_num;

arch/sparc/kernel/pci_sun4v.c

471

tbl = &atu->tbl;

arch/sparc/kernel/pci_sun4v.c

489

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

500

atu = iommu->atu;

arch/sparc/kernel/pci_sun4v.c

528

tbl = &atu->tbl;

arch/sparc/kernel/pci_sun4v.c

640

struct atu *atu;

arch/sparc/kernel/pci_sun4v.c

649

atu = iommu->atu;

arch/sparc/kernel/pci_sun4v.c

670

iotsb_num = atu->iotsb->iotsb_num;

arch/sparc/kernel/pci_sun4v.c

671

tbl = &atu->tbl;

arch/sparc/kernel/pci_sun4v.c

751

struct atu *atu = pbm->iommu->atu;

arch/sparc/kernel/pci_sun4v.c

764

atu->iotsb = iotsb;

arch/sparc/kernel/pci_sun4v.c

767

table_size = (atu->size / IO_PAGE_SIZE) * 8;

arch/sparc/kernel/pci_sun4v.c

776

iotsb->dvma_size = atu->size;

arch/sparc/kernel/pci_sun4v.c

777

iotsb->dvma_base = atu->base;

arch/sparc/kernel/pci_sun4v.c

80

return iommu->atu && mask > DMA_BIT_MASK(32);

arch/sparc/kernel/pci_sun4v.c

812

struct atu *atu = pbm->iommu->atu;

arch/sparc/kernel/pci_sun4v.c

844

atu->ranges = (struct atu_ranges *)ranges;

arch/sparc/kernel/pci_sun4v.c

845

atu->base = atu->ranges[3].base;

arch/sparc/kernel/pci_sun4v.c

846

atu->size = ATU_64_SPACE_SIZE;

arch/sparc/kernel/pci_sun4v.c

858

dma_mask = (roundup_pow_of_two(atu->size) - 1UL);

arch/sparc/kernel/pci_sun4v.c

859

num_iotte = atu->size / IO_PAGE_SIZE;

arch/sparc/kernel/pci_sun4v.c

861

atu->tbl.table_map_base = atu->base;

arch/sparc/kernel/pci_sun4v.c

862

atu->dma_addr_mask = dma_mask;

arch/sparc/kernel/pci_sun4v.c

863

atu->tbl.map = kzalloc(map_size, GFP_KERNEL);

arch/sparc/kernel/pci_sun4v.c

864

if (!atu->tbl.map)

arch/sparc/kernel/pci_sun4v.c

867

iommu_tbl_pool_init(&atu->tbl, num_iotte, IO_PAGE_SHIFT,

drivers/pci/controller/dwc/pcie-designware-ep.c

331

struct dw_pcie_ob_atu_cfg *atu)

drivers/pci/controller/dwc/pcie-designware-ep.c

343

atu->index = free_win;

drivers/pci/controller/dwc/pcie-designware-ep.c

344

ret = dw_pcie_prog_outbound_atu(pci, atu);

drivers/pci/controller/dwc/pcie-designware-ep.c

349

ep->outbound_addr[free_win] = atu->parent_bus_addr;

drivers/pci/controller/dwc/pcie-designware-ep.c

660

struct dw_pcie_ob_atu_cfg atu = { 0 };

drivers/pci/controller/dwc/pcie-designware-ep.c

662

atu.func_no = func_no;

drivers/pci/controller/dwc/pcie-designware-ep.c

663

atu.type = PCIE_TLP_TYPE_MEM_RDWR;

drivers/pci/controller/dwc/pcie-designware-ep.c

664

atu.parent_bus_addr = addr - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-ep.c

665

atu.pci_addr = pci_addr;

drivers/pci/controller/dwc/pcie-designware-ep.c

666

atu.size = size;

drivers/pci/controller/dwc/pcie-designware-ep.c

667

ret = dw_pcie_ep_outbound_atu(ep, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

1189

struct dw_pcie_ob_atu_cfg atu = { 0 };

drivers/pci/controller/dwc/pcie-designware-host.c

1199

atu.code = PCIE_MSG_CODE_PME_TURN_OFF;

drivers/pci/controller/dwc/pcie-designware-host.c

1200

atu.routing = PCIE_MSG_TYPE_R_BC;

drivers/pci/controller/dwc/pcie-designware-host.c

1201

atu.type = PCIE_TLP_TYPE_MSG;

drivers/pci/controller/dwc/pcie-designware-host.c

1202

atu.size = resource_size(pci->pp.msg_res);

drivers/pci/controller/dwc/pcie-designware-host.c

1203

atu.index = pci->pp.msg_atu_index;

drivers/pci/controller/dwc/pcie-designware-host.c

1205

atu.parent_bus_addr = pci->pp.msg_res->start - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-host.c

1207

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

425

struct dw_pcie_ob_atu_cfg atu = {0};

drivers/pci/controller/dwc/pcie-designware-host.c

438

atu.index = 0;

drivers/pci/controller/dwc/pcie-designware-host.c

439

atu.type = PCIE_TLP_TYPE_CFG0_RDWR;

drivers/pci/controller/dwc/pcie-designware-host.c

440

atu.parent_bus_addr = pp->cfg0_base + SZ_1M;

drivers/pci/controller/dwc/pcie-designware-host.c

442

atu.size = SZ_1M;

drivers/pci/controller/dwc/pcie-designware-host.c

443

atu.ctrl2 = PCIE_ATU_CFG_SHIFT_MODE_ENABLE;

drivers/pci/controller/dwc/pcie-designware-host.c

444

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

454

atu.index = 1;

drivers/pci/controller/dwc/pcie-designware-host.c

455

atu.type = PCIE_TLP_TYPE_CFG1_RDWR;

drivers/pci/controller/dwc/pcie-designware-host.c

456

atu.parent_bus_addr = pp->cfg0_base + SZ_2M;

drivers/pci/controller/dwc/pcie-designware-host.c

457

atu.size = (SZ_1M * bus_range_max) - SZ_2M;

drivers/pci/controller/dwc/pcie-designware-host.c

458

atu.ctrl2 = PCIE_ATU_CFG_SHIFT_MODE_ENABLE;

drivers/pci/controller/dwc/pcie-designware-host.c

460

return dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

733

struct dw_pcie_ob_atu_cfg atu = { 0 };

drivers/pci/controller/dwc/pcie-designware-host.c

756

atu.type = type;

drivers/pci/controller/dwc/pcie-designware-host.c

757

atu.parent_bus_addr = pp->cfg0_base - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-host.c

758

atu.pci_addr = busdev;

drivers/pci/controller/dwc/pcie-designware-host.c

759

atu.size = pp->cfg0_size;

drivers/pci/controller/dwc/pcie-designware-host.c

761

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

773

struct dw_pcie_ob_atu_cfg atu = { 0 };

drivers/pci/controller/dwc/pcie-designware-host.c

781

atu.type = PCIE_TLP_TYPE_IO_RDWR;

drivers/pci/controller/dwc/pcie-designware-host.c

782

atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-host.c

783

atu.pci_addr = pp->io_bus_addr;

drivers/pci/controller/dwc/pcie-designware-host.c

784

atu.size = pp->io_size;

drivers/pci/controller/dwc/pcie-designware-host.c

786

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

799

struct dw_pcie_ob_atu_cfg atu = { 0 };

drivers/pci/controller/dwc/pcie-designware-host.c

807

atu.type = PCIE_TLP_TYPE_IO_RDWR;

drivers/pci/controller/dwc/pcie-designware-host.c

808

atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-host.c

809

atu.pci_addr = pp->io_bus_addr;

drivers/pci/controller/dwc/pcie-designware-host.c

810

atu.size = pp->io_size;

drivers/pci/controller/dwc/pcie-designware-host.c

812

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

869

struct dw_pcie_ob_atu_cfg atu = { 0 };

drivers/pci/controller/dwc/pcie-designware-host.c

915

atu.type = PCIE_TLP_TYPE_MEM_RDWR;

drivers/pci/controller/dwc/pcie-designware-host.c

916

atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-host.c

917

atu.pci_addr = entry->res->start - entry->offset;

drivers/pci/controller/dwc/pcie-designware-host.c

938

atu.index = ob_iatu_index;

drivers/pci/controller/dwc/pcie-designware-host.c

939

atu.size = MIN(pci->region_limit + 1, res_size);

drivers/pci/controller/dwc/pcie-designware-host.c

941

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware-host.c

949

atu.parent_bus_addr += atu.size;

drivers/pci/controller/dwc/pcie-designware-host.c

950

atu.pci_addr += atu.size;

drivers/pci/controller/dwc/pcie-designware-host.c

951

res_size -= atu.size;

drivers/pci/controller/dwc/pcie-designware-host.c

957

atu.index = ob_iatu_index;

drivers/pci/controller/dwc/pcie-designware-host.c

958

atu.type = PCIE_TLP_TYPE_IO_RDWR;

drivers/pci/controller/dwc/pcie-designware-host.c

959

atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;

drivers/pci/controller/dwc/pcie-designware-host.c

960

atu.pci_addr = pp->io_bus_addr;

drivers/pci/controller/dwc/pcie-designware-host.c

961

atu.size = pp->io_size;

drivers/pci/controller/dwc/pcie-designware-host.c

963

ret = dw_pcie_prog_outbound_atu(pci, &atu);

drivers/pci/controller/dwc/pcie-designware.c

534

const struct dw_pcie_ob_atu_cfg *atu)

drivers/pci/controller/dwc/pcie-designware.c

536

u64 parent_bus_addr = atu->parent_bus_addr;

drivers/pci/controller/dwc/pcie-designware.c

540

if (atu->index >= pci->num_ob_windows)

drivers/pci/controller/dwc/pcie-designware.c

543

limit_addr = parent_bus_addr + atu->size - 1;

drivers/pci/controller/dwc/pcie-designware.c

547

!IS_ALIGNED(atu->pci_addr, pci->region_align) || !atu->size) {

drivers/pci/controller/dwc/pcie-designware.c

551

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LOWER_BASE,

drivers/pci/controller/dwc/pcie-designware.c

553

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_BASE,

drivers/pci/controller/dwc/pcie-designware.c

556

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LIMIT,

drivers/pci/controller/dwc/pcie-designware.c

559

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_LIMIT,

drivers/pci/controller/dwc/pcie-designware.c

562

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LOWER_TARGET,

drivers/pci/controller/dwc/pcie-designware.c

563

lower_32_bits(atu->pci_addr));

drivers/pci/controller/dwc/pcie-designware.c

564

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET,

drivers/pci/controller/dwc/pcie-designware.c

565

upper_32_bits(atu->pci_addr));

drivers/pci/controller/dwc/pcie-designware.c

567

val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no);

drivers/pci/controller/dwc/pcie-designware.c

573

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val);

drivers/pci/controller/dwc/pcie-designware.c

575

val = PCIE_ATU_ENABLE | atu->ctrl2;

drivers/pci/controller/dwc/pcie-designware.c

576

if (atu->type == PCIE_TLP_TYPE_MSG) {

drivers/pci/controller/dwc/pcie-designware.c

578

val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code;

drivers/pci/controller/dwc/pcie-designware.c

580

dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val);

drivers/pci/controller/dwc/pcie-designware.c

587

val = dw_pcie_readl_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2);

drivers/pci/controller/dwc/pcie-designware.h

623

const struct dw_pcie_ob_atu_cfg *atu);