CA
ioread32(hcr_base + CA),
done_mask, ioread32(hcr_base + CA),
ioread32(hcr_base + CA));
ioread32(CA + hcr_base),
tag, ioread32(CQ + hcr_base), ioread32(CA + hcr_base));
ioread32(CA + hcr_base),
ioread32(CA + hcr_base), ioread32(CC + hcr_base));
ioread32(CA + hcr_base), ioread32(CC + hcr_base));
RBC(CA, 0, CA, 0),
RBC(CA, 1, CA, 1),
RBC(CA, 2, CA, 2),
RBC(CA, 3, CA, 3),
RBC(CA, 4, CA, 8),
RBC(CA, 8, CA, 9),
RBC(CA, 9, CA, 10),
RBC(CA, 10, CA, 11),
RBC(CA, 11, CA, 12),
RBC(CA, 12, CA, 13),
RBC(CA, 13, CA, 14),
RBC(CA, 14, CA, 15),
RBC(CA, 15, RA, 0),
static const u8 CA[] = { 0x28, 0xd8, 0x14, 0xec };
reg_w(gspca_dev, 0xca, CA, 4);
CA (dev);
CA(dev);
CA(dev);
CA(dev);
CA(dev);
CA(dev);
CA(dev);
CCM(CCM_1_2V) | CA(CA_3_51MA) | RFB);
#define CTRL_RESET_VAL (M(0x0) | CCM(0x4) | CA(0x4) | TST(0x25))
#define CTRL_INIT_VAL (M(0x0) | CCM(0x5) | CA(0x4) | TST(0x25) | RFB)
hdmi_ai->CA = ca;
dp_ai->CA = ca;
u8 CA;
u8 CA;
u8 CA;
dp_ai.CA = ca;