drivers/gpu/drm/i915/gt/gen7_renderclear.c

159

*cs++ = batch_addr(state) + dst_offset;

drivers/gpu/drm/i915/gt/gen7_renderclear.c

242

*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;

drivers/gpu/drm/i915/gt/gen7_renderclear.c

244

*cs++ = (batch_addr(batch) + surface_state_base) | BASE_ADDRESS_MODIFY;

drivers/gpu/drm/i915/gt/gen7_renderclear.c

246

*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;

drivers/gpu/drm/i915/gt/gen7_renderclear.c

248

*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;

drivers/gpu/drm/i915/gt/gen7_renderclear.c

250

*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;

drivers/gpu/drm/i915/i915_cmd_parser.c

1347

u64 batch_addr,

drivers/gpu/drm/i915/i915_cmd_parser.c

1367

jump_offset = jump_target - batch_addr;

drivers/gpu/drm/i915/i915_cmd_parser.c

1452

u64 batch_addr, shadow_addr;

drivers/gpu/drm/i915/i915_cmd_parser.c

1475

batch_addr = gen8_canonical_addr(i915_vma_offset(batch) + batch_offset);

drivers/gpu/drm/i915/i915_cmd_parser.c

1517

batch_addr, shadow_addr,

drivers/gpu/drm/i915/i915_cmd_parser.c

1564

batch_addr,

drivers/gpu/drm/xe/xe_migrate.c

270

u64 batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);

drivers/gpu/drm/xe/xe_migrate.c

272

m->batch_base_ofs = xe_migrate_vram_ofs(xe, batch_addr, false);

drivers/gpu/drm/xe/xe_migrate.c

276

batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);

drivers/gpu/drm/xe/xe_migrate.c

277

m->usm_batch_base_ofs = xe_migrate_vram_ofs(xe, batch_addr, false);

drivers/gpu/drm/xe/xe_pxp_submit.c

367

static int pxp_pkt_submit(struct xe_exec_queue *q, u64 batch_addr)

drivers/gpu/drm/xe/xe_pxp_submit.c

377

job = xe_sched_job_create(q, &batch_addr);

drivers/gpu/drm/xe/xe_ring_ops.c

102

static int emit_bb_start(u64 batch_addr, u32 ppgtt_flag, u32 *dw, int i)

drivers/gpu/drm/xe/xe_ring_ops.c

105

dw[i++] = lower_32_bits(batch_addr);

drivers/gpu/drm/xe/xe_ring_ops.c

106

dw[i++] = upper_32_bits(batch_addr);

drivers/gpu/drm/xe/xe_ring_ops.c

261

u64 batch_addr, u32 *head, u32 seqno)

drivers/gpu/drm/xe/xe_ring_ops.c

281

i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);

drivers/gpu/drm/xe/xe_ring_ops.c

317

u64 batch_addr, u32 *head, u32 seqno)

drivers/gpu/drm/xe/xe_ring_ops.c

349

i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);

drivers/gpu/drm/xe/xe_ring_ops.c

372

u64 batch_addr, u32 *head,

drivers/gpu/drm/xe/xe_ring_ops.c

404

i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);

drivers/gpu/drm/xe/xe_ring_ops.c

442

i = emit_bb_start(job->ptrs[0].batch_addr, BIT(8), dw, i);

drivers/gpu/drm/xe/xe_ring_ops.c

448

i = emit_bb_start(job->ptrs[1].batch_addr, BIT(8), dw, i);

drivers/gpu/drm/xe/xe_ring_ops.c

468

job->ptrs[0].batch_addr,

drivers/gpu/drm/xe/xe_ring_ops.c

486

job->ptrs[i].batch_addr,

drivers/gpu/drm/xe/xe_ring_ops.c

498

job->ptrs[i].batch_addr,

drivers/gpu/drm/xe/xe_ring_ops.c

509

job->ptrs[i].batch_addr,

drivers/gpu/drm/xe/xe_sched_job.c

148

job->ptrs[i].batch_addr = batch_addr[i];

drivers/gpu/drm/xe/xe_sched_job.c

332

snapshot->batch_addr[i] =

drivers/gpu/drm/xe/xe_sched_job.c

333

xe_device_uncanonicalize_addr(xe, job->ptrs[i].batch_addr);

drivers/gpu/drm/xe/xe_sched_job.c

353

drm_printf(p, "batch_addr[%u]: 0x%016llx\n", i, snapshot->batch_addr[i]);

drivers/gpu/drm/xe/xe_sched_job.c

97

u64 *batch_addr)

drivers/gpu/drm/xe/xe_sched_job.h

22

u64 *batch_addr);

drivers/gpu/drm/xe/xe_sched_job_types.h

26

u64 batch_addr;

drivers/gpu/drm/xe/xe_sched_job_types.h

78

u64 batch_addr[] __counted_by(batch_addr_len);

drivers/gpu/drm/xe/xe_trace.h

245

__field(u64, batch_addr)

drivers/gpu/drm/xe/xe_trace.h

259

__entry->batch_addr = (u64)job->ptrs[0].batch_addr;

drivers/gpu/drm/xe/xe_trace.h

265

__entry->batch_addr, __entry->guc_state,