bank_reg
ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®);
ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg,
ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®);
ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg);
regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®);
regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®);
regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®);
ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®);
u32 bank_reg;
.bank_reg = 0x3ca0,
.bank_reg = 0x3ca0,
.bank_reg = 0x3ce0,
.bank_reg = 0x3d00,
.bank_reg = 0x3dc0,
.bank_reg = 0x3d20,
.bank_reg = 0x3d40,
.bank_reg = 0x36C0,
.bank_reg = 0x3d80,
.bank_reg = 0x3c60,
.bank_reg = 0x0080,
.bank_reg = 0x0178,
.bank_reg = 0x00c0,
.bank_reg = 0x00e8,
.bank_reg = 0x00f8,
.bank_reg = 0x0060,
.bank_reg = 0x0074,
addr = bank_reg(gpio, bank, WRITE_DATA);
addr = bank_reg(gpio, bank, WRITE_DATA);
addr = bank_reg(gpio, bank, READ_DATA);
addr = bank_reg(gpio, bank, EVENT_CFG);
addr = bank_reg(gpio, bank, EVENT_STS);
status_addr = bank_reg(gpio, bank, EVENT_STS);
addr = bank_reg(gpio, bank, EVENT_CFG);
reg = ioread8(bank_reg(gpio, bank, EVENT_STS));
iowrite16(0, bank_reg(gpio, bank, EVENT_CFG));
iowrite8(0xff, bank_reg(gpio, bank, EVENT_STS));
if (chip->bank_words && command == chip->bank_reg) {
chip->bank_reg = bank_reg[i];
static u8 bank_reg[MAX_CHIPS];
module_param_array(bank_reg, byte, NULL, S_IRUGO);
MODULE_PARM_DESC(bank_reg, "Bank register");
u8 bank_reg;