b43_write16
b43_write16(dev, offset, value);
b43_write16(dev, offset, (b43_read16(dev, offset) & mask) | set);
b43_write16(dev, addr, val);
b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
b43_write16(dev, 0x3E2, b43_read16(dev, 0x3E2)
b43_write16(dev, 0x3F4, b43_read16(dev, 0x3F4)
b43_write16(dev, 0x3F4, sav->reg_3F4);
b43_write16(dev, 0x3E2, sav->reg_3E2);
b43_write16(dev, B43_MMIO_PS_STATUS, 0x0002);
b43_write16(dev, 0x606, (beacon_int >> 6));
b43_write16(dev, 0x610, beacon_int);
b43_write16(dev, offset, value);
b43_write16(dev, B43_MMIO_GPIO_MASK,
b43_write16(dev, B43_MMIO_GPIO_MASK,
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x1862);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x3e70);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x6666);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
b43_write16(dev, 0x612, cfp_pretbtt);
b43_write16(dev, 0x005E, value16);
b43_write16(dev, 0x060E, 0x0000);
b43_write16(dev, 0x0610, 0x8000);
b43_write16(dev, 0x0604, 0x0000);
b43_write16(dev, 0x0606, 0x0200);
b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74);
b43_write16(dev, B43_MMIO_POWERUP_DELAY,
b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
b43_write16(dev, B43_MMIO_RCMTA_COUNT, B43_NR_PAIRWISE_KEYS);
b43_write16(dev, B43_MMIO_IFSCTL,
b43_write16(dev, B43_MMIO_IFSCTL,
b43_write16(dev, B43_MMIO_TSF_CFP_PRETBTT, pretbtt);
b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED,
b43_write16(dev, B43_MMIO_SHM_DATA,
b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, value);
b43_write16(dev, B43_MMIO_SHM_DATA, value);
b43_write16(dev, B43_MMIO_MACFILTER_CONTROL, offset);
b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time);
b43_write16(dev, B43_MMIO_XMTSEL, 0x0000);
b43_write16(dev, B43_MMIO_WEPCTL, 0x0000);
b43_write16(dev, B43_MMIO_WEPCTL, 0x0100);
b43_write16(dev, B43_MMIO_TXE0_PHYCTL, value);
b43_write16(dev, B43_MMIO_TXE0_PHYCTL1, 0x1A02);
b43_write16(dev, B43_MMIO_TXE0_WM_0, 0x0000);
b43_write16(dev, B43_MMIO_TXE0_WM_1, 0x0000);
b43_write16(dev, B43_MMIO_XMTTPLATETXPTR, 0x0000);
b43_write16(dev, B43_MMIO_XMTTXCNT, 0x0014);
b43_write16(dev, B43_MMIO_XMTSEL, 0x0826);
b43_write16(dev, B43_MMIO_TXE0_CTL, 0x0000);
b43_write16(dev, B43_MMIO_TXE0_AUX, 0x00D0);
b43_write16(dev, B43_MMIO_TXE0_AUX, 0x0050);
b43_write16(dev, B43_MMIO_TXE0_AUX, 0x0030);
b43_write16(dev, B43_MMIO_PHY_DATA,
b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
b43_write16(dev, B43_MMIO_PHY_DATA, value);
b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4);
b43_write16(dev, 0x3EC, 0x3F3F);
b43_write16(dev, 0x3E2, b43_read16(dev, 0x3E2) | 0x8000);
b43_write16(dev, 0x03E6, 0x0122);
b43_write16(dev, B43_MMIO_CHANNEL_EXT,
b43_write16(dev, 0x3E6, sav.reg_3E6);
b43_write16(dev, 0x3F4, sav.reg_3F4);
b43_write16(dev, 0x3EC, sav.reg_3EC);
b43_write16(dev, B43_MMIO_PHY_RADIO,
b43_write16(dev, B43_MMIO_PHY_RADIO, 0x0000);
b43_write16(dev, 0x03EC, 0x3F22);
b43_write16(dev, 0x03E4, 0x3000);
b43_write16(dev, 0x03E4, (b43_read16(dev, 0x03E4) & 0xFFC0) | 0x0004);
b43_write16(dev, 0x3E4, 9);
b43_write16(dev, 0x03E6, 0x0);
b43_write16(dev, B43_MMIO_CHANNEL,
b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(1));
b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));
b43_write16(dev, B43_MMIO_PHY0, (b43_read16(dev, B43_MMIO_PHY0)
b43_write16(dev, B43_MMIO_PHY0, b43_read16(dev, B43_MMIO_PHY0)
b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));
b43_write16(dev, B43_MMIO_CHANNEL_EXT,
b43_write16(dev, B43_MMIO_CHANNEL_EXT,
b43_write16(dev, B43_MMIO_PHY_DATA, value);
b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
b43_write16(dev, 0x03E2, b43_read16(dev, 0x03E2) | 0x8000);
b43_write16(dev, B43_MMIO_CHANNEL_EXT,
b43_write16(dev, 0x03E2, backup[7]);
b43_write16(dev, 0x03E6, backup[8]);
b43_write16(dev, B43_MMIO_CHANNEL_EXT, backup[9]);
b43_write16(dev, B43_MMIO_PHY_DATA,
b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
b43_write16(dev, B43_MMIO_PSM_PHY_HDR,
b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp);
b43_write16(dev, B43_MMIO_PHY_DATA,
b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
b43_write16(dev, B43_MMIO_BTCOEX_CTL, 0x3);
b43_write16(dev, B43_MMIO_BTCOEX_TXCTL, 0xFF);
b43_write16(dev, B43_MMIO_CHANNEL, lpphy->channel);
b43_write16(dev, B43_MMIO_PHY_DATA,
b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16 | 4);
b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16);
b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16 | 4);
b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16);
b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
b43_write16(q->dev, q->mmio_base + offset, value);
b43_write16(q->dev, q->mmio_base + offset, value);