axi_dmac_read
if (axi_dmac_read(dmac, AXI_DMAC_REG_SG_ADDRESS))
if (axi_dmac_read(dmac, AXI_DMAC_REG_Y_LENGTH) == 1)
chan->max_length = axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH);
if (axi_dmac_read(dmac, AXI_DMAC_REG_DEST_ADDRESS) == 0 &&
if (axi_dmac_read(dmac, AXI_DMAC_REG_SRC_ADDRESS) == 0 &&
mask = axi_dmac_read(dmac, AXI_DMAC_REG_DEST_ADDRESS_HIGH);
mask = axi_dmac_read(dmac, AXI_DMAC_REG_SRC_ADDRESS_HIGH);
axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH);
version = axi_dmac_read(dmac, ADI_AXI_REG_VERSION);
ret = axi_dmac_read(dmac, AXI_DMAC_REG_COHERENCY_DESC);
val = axi_dmac_read(dmac, AXI_DMAC_REG_START_TRANSFER);
sg->hw->id = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_ID);
len = axi_dmac_read(dmac, AXI_DMAC_REG_PARTIAL_XFER_LEN);
id = axi_dmac_read(dmac, AXI_DMAC_REG_PARTIAL_XFER_ID);
xfer_done = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);
pending = axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING);
completed = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);
desc = axi_dmac_read(dmac, AXI_DMAC_REG_INTERFACE_DESC);
if (axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS) == AXI_DMAC_FLAG_CYCLIC)