atmel_uart_writel
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_STTTO);
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_TIMEOUT);
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_TIMEOUT);
atmel_uart_writel(port, ATMEL_US_IDR,
atmel_uart_writel(port, ATMEL_US_IDR,
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA);
atmel_uart_writel(port, ATMEL_US_IDR, ATMEL_US_RXBRK);
atmel_uart_writel(port, ATMEL_US_IDR,
atmel_uart_writel(port, ATMEL_US_IDR, mask);
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS);
atmel_uart_writel(port, ATMEL_PDC_TPR, pdc->dma_addr + tail);
atmel_uart_writel(port, ATMEL_PDC_TCR, count);
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_STTTO);
atmel_uart_writel(port, ATMEL_PDC_RNPR, pdc->dma_addr);
atmel_uart_writel(port, ATMEL_PDC_RNCR, pdc->dma_size);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_PDC_RPR, atmel_port->pdc_rx[0].dma_addr);
atmel_uart_writel(port, ATMEL_PDC_RCR, PDC_BUFFER_SIZE);
atmel_uart_writel(port, ATMEL_PDC_RNPR,
atmel_uart_writel(port, ATMEL_PDC_RNCR, PDC_BUFFER_SIZE);
atmel_uart_writel(port, ATMEL_US_IDR, -1);
atmel_uart_writel(port, ATMEL_US_CR,
atmel_uart_writel(port, ATMEL_US_FMR, fmr);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN | ATMEL_US_RXEN);
atmel_uart_writel(port, atmel_port->rtor,
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_STTTO);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
atmel_uart_writel(port, atmel_port->rtor,
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_STTTO);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_RXRDY);
atmel_uart_writel(port, ATMEL_PDC_TCR, 0);
atmel_uart_writel(port, ATMEL_US_IDR, -1);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->backup_imr);
atmel_uart_writel(port, ATMEL_US_IDR, -1);
atmel_uart_writel(port, ATMEL_US_IER, port->read_status_mask);
atmel_uart_writel(port, ATMEL_US_IDR, -1);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
atmel_uart_writel(port, ATMEL_US_TTGR,
atmel_uart_writel(port, ATMEL_US_TTGR, port->iso7816.tg);
atmel_uart_writel(port, ATMEL_US_BRGR, quot);
atmel_uart_writel(port, ATMEL_US_MR, mode);
atmel_uart_writel(port, ATMEL_US_CR, rts_state);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN | ATMEL_US_RXEN);
atmel_uart_writel(port, ATMEL_US_IER, imr);
atmel_uart_writel(port, ATMEL_US_IDR,
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN);
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
atmel_uart_writel(port, ATMEL_US_IER, imr);
atmel_uart_writel(port, ATMEL_US_IDR, -1);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN | ATMEL_US_RXEN);
atmel_uart_writel(port, ATMEL_US_MR, atmel_port->cache.mr);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->cache.imr);
atmel_uart_writel(port, ATMEL_US_BRGR, atmel_port->cache.brgr);
atmel_uart_writel(port, atmel_port->rtor,
atmel_uart_writel(port, ATMEL_US_TTGR, atmel_port->cache.ttgr);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_FIFOEN |
atmel_uart_writel(port, ATMEL_US_FMR,
atmel_uart_writel(port, ATMEL_US_FIER,
atmel_uart_writel(&atmel_port->uart, ATMEL_US_MR,
atmel_uart_writel(&atmel_port->uart, ATMEL_US_CR,
atmel_uart_writel(port, ATMEL_US_IDR, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_TTGR,
atmel_uart_writel(port, ATMEL_US_MR, mode);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_IDR, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_TTGR, iso7816conf->tg);
atmel_uart_writel(port, ATMEL_US_BRGR, cd);
atmel_uart_writel(port, ATMEL_US_FIDI, fidi);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXDIS | ATMEL_US_RXEN);
atmel_uart_writel(port, ATMEL_US_TTGR, 0);
atmel_uart_writel(port, ATMEL_US_BRGR, atmel_port->backup_brgr);
atmel_uart_writel(port, ATMEL_US_FIDI, 0x174);
atmel_uart_writel(port, ATMEL_US_MR, mode);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_TTGR,
atmel_uart_writel(port, ATMEL_US_CR, control);
atmel_uart_writel(port, ATMEL_US_MR, mode);
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXDIS);
atmel_uart_writel(port, ATMEL_US_IDR, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
atmel_uart_writel(port, ATMEL_US_IER, atmel_port->tx_done_mask);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_TXEN);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RXEN);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
atmel_uart_writel(port, ATMEL_US_IER, ATMEL_US_RXRDY);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RXDIS);
atmel_uart_writel(port, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS);
atmel_uart_writel(port, ATMEL_US_IDR,
atmel_uart_writel(port, ATMEL_US_IDR, ATMEL_US_RXRDY);
atmel_uart_writel(port, ATMEL_US_IER, ier);
atmel_uart_writel(port, ATMEL_US_IDR, idr);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_STTBRK);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_STPBRK);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA);
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA);
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IDR,
atmel_uart_writel(port, ATMEL_US_IER,
atmel_uart_writel(port, ATMEL_US_IER,