atiixp_write
atiixp_write(chip, ISR, status);
atiixp_write(chip, PHYS_OUT_ADDR, data);
atiixp_write(chip, PHYS_OUT_ADDR, data);
atiixp_write(chip, IER, CODEC_CHECK_BITS);
atiixp_write(chip, IER, 0); /* disable irqs */
atiixp_write(chip, CMD, reg);
atiixp_write(chip, SPDF_CMD, reg);
atiixp_write(chip, ISR, 0xffffffff);
atiixp_write(chip, IER,
atiixp_write(chip, ISR, atiixp_read(chip, ISR));
atiixp_write(chip, IER, 0);
atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
atiixp_write(chip, CMD, data);
atiixp_write(chip, CMD, data);
atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
atiixp_write(chip, CMD, data);
atiixp_write(chip, OUT_DMA_SLOT, data);
atiixp_write(chip, OUT_DMA_SLOT, data);
atiixp_write(chip, ISR, status);
atiixp_write(chip, PHYS_OUT_ADDR, data);
atiixp_write(chip, PHYS_OUT_ADDR, data);
atiixp_write(chip, MODEM_OUT_GPIO,
atiixp_write(chip, IER, CODEC_CHECK_BITS);
atiixp_write(chip, IER, 0); /* disable irqs */
atiixp_write(chip, CMD, reg);
atiixp_write(chip, ISR, 0xffffffff);
atiixp_write(chip, IER,
atiixp_write(chip, ISR, atiixp_read(chip, ISR));
atiixp_write(chip, IER, 0);
atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
atiixp_write(chip, CMD, data);
atiixp_write(chip, CMD, data);
atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
atiixp_write(chip, MODEM_OUT_FIFO, data);