ath9k_hw_wait
return ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah), AR_PHY_AGC_CONTROL_CAL,
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
if (!ath9k_hw_wait(ah, AR_PHY_SPECTRAL_SCAN,
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL(ah),
if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START(ah),
if (!ath9k_hw_wait(ah, AR9300_OTP_STATUS(ah), AR9300_OTP_STATUS_TYPE,
return ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
if (!ath9k_hw_wait(ah, AR_PHY_SPECTRAL_SCAN,
if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE(ah), 0, AH_WAIT_TIMEOUT)) {
if (!ath9k_hw_wait(ah,
ath9k_hw_wait(ah, AR_CFG, AR_CFG_HALT_ACK, AR_CFG_HALT_ACK,
if (!ath9k_hw_wait(ah, AR_RTC_RC(ah), AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
if (!ath9k_hw_wait(ah,
if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0,
EXPORT_SYMBOL(ath9k_hw_wait);
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
if (!ath9k_hw_wait(ah, AR_OBS_BUS_1, AR_OBS_BUS_1_RX_STATE,
if (!ath9k_hw_wait(ah,