arch/mips/ath79/clock.c

119

ath79_set_clk(ATH79_CLK_CPU, cpu_rate);

arch/mips/ath79/clock.c

120

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

121

ath79_set_clk(ATH79_CLK_AHB, ahb_rate);

arch/mips/ath79/clock.c

339

ath79_set_clk(ATH79_CLK_CPU, cpu_rate);

arch/mips/ath79/clock.c

340

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

341

ath79_set_clk(ATH79_CLK_AHB, ahb_rate);

arch/mips/ath79/clock.c

345

ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000);

arch/mips/ath79/clock.c

428

ath79_set_clk(ATH79_CLK_CPU, cpu_rate);

arch/mips/ath79/clock.c

429

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

430

ath79_set_clk(ATH79_CLK_AHB, ahb_rate);

arch/mips/ath79/clock.c

511

ath79_set_clk(ATH79_CLK_CPU, cpu_rate);

arch/mips/ath79/clock.c

512

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

513

ath79_set_clk(ATH79_CLK_AHB, ahb_rate);

arch/mips/ath79/clock.c

613

ath79_set_clk(ATH79_CLK_CPU, cpu_rate);

arch/mips/ath79/clock.c

614

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

615

ath79_set_clk(ATH79_CLK_AHB, ahb_rate);

arch/mips/ath79/clock.c

88

clk = ath79_set_clk(ATH79_CLK_REF, rate);