ath6kl_bmi_write_hi32
ath6kl_bmi_write_hi32(ar, hi_board_data,
ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param);
ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
status = ath6kl_bmi_write_hi32(ar, hi_desired_baud_rate,
status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,