ath10k_ce_write32
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, shadow_sr_wr_ind_addr(ar, ce_state), value);
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ar->hw_ce_regs->ce_rri_low,
ath10k_ce_write32(ar, ar->hw_ce_regs->ce_rri_high,
ath10k_ce_write32(ar, ce_base_addr + ctrl1_regs, value);
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr,
ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr,
ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr,
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ce_ctrl_addr +
ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr,
ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr,
ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr,
ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr,
ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr,
ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr,
ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr,
ath10k_ce_write32(ar,
ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs->addr, mask);