aq_phy_write_reg
aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1,
void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data);
aq_phy_write_reg(self, MDIO_MMD_PCS, 0xc611, enable ? 0x71 : 0);