aq_phy_read_reg
val = aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 3);
dev_id = aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 2);
dev_id |= aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 3);
val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1,
u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address);
sec_l = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc914);
sec_h = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc915);
nsec_l = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc916);
nsec_h = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc917);