amdgpu_vm_bo_update
ret = amdgpu_vm_bo_update(adev, bo_va, false);
ret = amdgpu_vm_bo_update(adev, fpriv->prt_va, false);
r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false);
r = amdgpu_vm_bo_update(adev, bo_va, false);
r = amdgpu_vm_bo_update(adev, bo_va, false);
r = amdgpu_vm_bo_update(adev, bo_va, false);
r = amdgpu_vm_bo_update(adev, *bo_va, false);
DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
ret = amdgpu_vm_bo_update(adev, bo_va, false);
r = amdgpu_vm_bo_update(adev, bo_va, false);
r = amdgpu_vm_bo_update(adev, bo_va, clear);
int amdgpu_vm_bo_update(struct amdgpu_device *adev,
r = amdgpu_vm_bo_update(adev, *bo_va, false);